src/mesa/drivers/dri/i965/gen7_ds_state.c

   1 /*
   2  * Copyright © 2014 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  */
  23
  24 #include "brw_context.h"
  25 #include "brw_state.h"
  26 #include "brw_defines.h"
  27 #include "intel_batchbuffer.h"
  28 #include "main/shaderapi.h"
  29
  30 static void
  31 gen7_upload_tes_push_constants(struct brw_context *brw)
  32 {
  33    struct brw_stage_state *stage_state = &brw->tes.base;
  34    /* BRW_NEW_TESS_PROGRAMS */
  35    const struct brw_tess_eval_program *tep =
  36       (struct brw_tess_eval_program *) brw->tess_eval_program;
  37
  38    if (tep) {
  39       /* BRW_NEW_TES_PROG_DATA */
  40       const struct brw_stage_prog_data *prog_data = &brw->tes.prog_data->base.base;
  41       _mesa_shader_write_subroutine_indices(&brw->ctx, MESA_SHADER_TESS_EVAL);
  42       gen6_upload_push_constants(brw, &tep->program.Base, prog_data,
  43                                       stage_state, AUB_TRACE_VS_CONSTANTS);
  44    }
  45
  46    gen7_upload_constant_state(brw, stage_state, tep, _3DSTATE_CONSTANT_DS);
  47 }
  48
  49 const struct brw_tracked_state gen7_tes_push_constants = {
  50    .dirty = {
  51       .mesa  = _NEW_PROGRAM_CONSTANTS,
  52       .brw   = BRW_NEW_BATCH |
  53                BRW_NEW_BLORP |
  54                BRW_NEW_PUSH_CONSTANT_ALLOCATION |
  55                BRW_NEW_TESS_PROGRAMS |
  56                BRW_NEW_TES_PROG_DATA,
  57    },
  58    .emit = gen7_upload_tes_push_constants,
  59 };
  60
  61 static void
  62 gen7_upload_ds_state(struct brw_context *brw)
  63 {
  64    const struct gen_device_info *devinfo = &brw->screen->devinfo;
  65    const struct brw_stage_state *stage_state = &brw->tes.base;
  66    /* BRW_NEW_TESS_PROGRAMS */
  67    bool active = brw->tess_eval_program;
  68
  69    /* BRW_NEW_TES_PROG_DATA */
  70    const struct brw_tes_prog_data *tes_prog_data = brw->tes.prog_data;
  71    const struct brw_vue_prog_data *vue_prog_data = &tes_prog_data->base;
  72    const struct brw_stage_prog_data *prog_data = &vue_prog_data->base;
  73
  74    const unsigned thread_count = (devinfo->max_tes_threads - 1) <<
  75       (brw->is_haswell ? HSW_DS_MAX_THREADS_SHIFT : GEN7_DS_MAX_THREADS_SHIFT);
  76
  77    if (active) {
  78       BEGIN_BATCH(6);
  79       OUT_BATCH(_3DSTATE_DS << 16 | (6 - 2));
  80       OUT_BATCH(stage_state->prog_offset);
  81       OUT_BATCH(SET_FIELD(DIV_ROUND_UP(stage_state->sampler_count, 4),
  82                           GEN7_DS_SAMPLER_COUNT) |
  83                 SET_FIELD(prog_data->binding_table.size_bytes / 4,
  84                           GEN7_DS_BINDING_TABLE_ENTRY_COUNT));
  85       if (prog_data->total_scratch) {
  86          OUT_RELOC(stage_state->scratch_bo,
  87                    I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
  88                    ffs(stage_state->per_thread_scratch) - 11);
  89       } else {
  90          OUT_BATCH(0);
  91       }
  92       OUT_BATCH(SET_FIELD(prog_data->dispatch_grf_start_reg,
  93                           GEN7_DS_DISPATCH_START_GRF) |
  94                 SET_FIELD(vue_prog_data->urb_read_length,
  95                           GEN7_DS_URB_READ_LENGTH));
  96
  97       OUT_BATCH(GEN7_DS_ENABLE |
  98                 GEN7_DS_STATISTICS_ENABLE |
  99                 thread_count |
 100                 (tes_prog_data->domain == BRW_TESS_DOMAIN_TRI ?
 101                  GEN7_DS_COMPUTE_W_COORDINATE_ENABLE : 0));
 102       ADVANCE_BATCH();
 103    } else {
 104       BEGIN_BATCH(6);
 105       OUT_BATCH(_3DSTATE_DS << 16 | (6 - 2));
 106       OUT_BATCH(0);
 107       OUT_BATCH(0);
 108       OUT_BATCH(0);
 109       OUT_BATCH(0);
 110       OUT_BATCH(0);
 111       ADVANCE_BATCH();
 112    }
 113    brw->tes.enabled = active;
 114 }
 115
 116 const struct brw_tracked_state gen7_ds_state = {
 117    .dirty = {
 118       .mesa  = _NEW_TRANSFORM,
 119       .brw   = BRW_NEW_BATCH |
 120                BRW_NEW_BLORP |
 121                BRW_NEW_CONTEXT |
 122                BRW_NEW_TESS_PROGRAMS |
 123                BRW_NEW_TES_PROG_DATA,
 124    },
 125    .emit = gen7_upload_ds_state,
 126 };