2 * Copyright © 2014 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
24 #include "brw_context.h"
25 #include "brw_state.h"
26 #include "brw_defines.h"
27 #include "intel_batchbuffer.h"
28 #include "main/shaderapi.h"
31 gen7_upload_tcs_push_constants(struct brw_context
*brw
)
33 struct brw_stage_state
*stage_state
= &brw
->tcs
.base
;
34 /* BRW_NEW_TESS_PROGRAMS */
35 const struct brw_tess_ctrl_program
*tcp
=
36 (struct brw_tess_ctrl_program
*) brw
->tess_ctrl_program
;
37 bool active
= brw
->tess_eval_program
;
40 /* BRW_NEW_TCS_PROG_DATA */
41 const struct brw_stage_prog_data
*prog_data
= &brw
->tcs
.prog_data
->base
.base
;
43 _mesa_shader_write_subroutine_indices(&brw
->ctx
, MESA_SHADER_TESS_CTRL
);
44 gen6_upload_push_constants(brw
, &tcp
->program
.Base
, prog_data
,
45 stage_state
, AUB_TRACE_VS_CONSTANTS
);
48 gen7_upload_constant_state(brw
, stage_state
, active
, _3DSTATE_CONSTANT_HS
);
51 const struct brw_tracked_state gen7_tcs_push_constants
= {
53 .mesa
= _NEW_PROGRAM_CONSTANTS
,
54 .brw
= BRW_NEW_BATCH
|
56 BRW_NEW_DEFAULT_TESS_LEVELS
|
57 BRW_NEW_PUSH_CONSTANT_ALLOCATION
|
58 BRW_NEW_TESS_PROGRAMS
|
59 BRW_NEW_TCS_PROG_DATA
,
61 .emit
= gen7_upload_tcs_push_constants
,
65 gen7_upload_hs_state(struct brw_context
*brw
)
67 const struct gen_device_info
*devinfo
= &brw
->screen
->devinfo
;
68 const struct brw_stage_state
*stage_state
= &brw
->tcs
.base
;
69 /* BRW_NEW_TESS_PROGRAMS */
70 bool active
= brw
->tess_eval_program
;
71 /* BRW_NEW_TCS_PROG_DATA */
72 const struct brw_vue_prog_data
*prog_data
= &brw
->tcs
.prog_data
->base
;
76 OUT_BATCH(_3DSTATE_HS
<< 16 | (7 - 2));
77 OUT_BATCH(SET_FIELD(DIV_ROUND_UP(stage_state
->sampler_count
, 4),
78 GEN7_HS_SAMPLER_COUNT
) |
79 SET_FIELD(prog_data
->base
.binding_table
.size_bytes
/ 4,
80 GEN7_HS_BINDING_TABLE_ENTRY_COUNT
) |
81 (devinfo
->max_hs_threads
- 1));
82 OUT_BATCH(GEN7_HS_ENABLE
|
83 GEN7_HS_STATISTICS_ENABLE
|
84 SET_FIELD(brw
->tcs
.prog_data
->instances
- 1,
85 GEN7_HS_INSTANCE_COUNT
));
86 OUT_BATCH(stage_state
->prog_offset
);
87 if (prog_data
->base
.total_scratch
) {
88 OUT_RELOC(stage_state
->scratch_bo
,
89 I915_GEM_DOMAIN_RENDER
, I915_GEM_DOMAIN_RENDER
,
90 ffs(stage_state
->per_thread_scratch
) - 11);
94 OUT_BATCH(GEN7_HS_INCLUDE_VERTEX_HANDLES
|
95 SET_FIELD(prog_data
->base
.dispatch_grf_start_reg
,
96 GEN7_HS_DISPATCH_START_GRF
));
97 /* Ignore URB semaphores */
102 OUT_BATCH(_3DSTATE_HS
<< 16 | (7 - 2));
111 brw
->tcs
.enabled
= active
;
114 const struct brw_tracked_state gen7_hs_state
= {
117 .brw
= BRW_NEW_BATCH
|
119 BRW_NEW_TCS_PROG_DATA
|
120 BRW_NEW_TESS_PROGRAMS
,
122 .emit
= gen7_upload_hs_state
,