src/mesa/drivers/dri/i965/gen7_misc_state.c

   1 /*
   2  * Copyright © 2011 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "intel_batchbuffer.h"
  25 #include "intel_regions.h"
  26 #include "brw_context.h"
  27 #include "brw_state.h"
  28 #include "brw_defines.h"
  29
  30 unsigned int
  31 gen7_depth_format(struct brw_context *brw)
  32 {
  33    struct intel_region *region = brw->state.depth_region;
  34    struct intel_context *intel = &brw->intel;
  35
  36    if (region == NULL)
  37       return BRW_DEPTHFORMAT_D32_FLOAT;
  38
  39    switch (region->cpp) {
  40    case 2:
  41       return BRW_DEPTHFORMAT_D16_UNORM;
  42    case 4:
  43       if (intel->depth_buffer_is_float)
  44          return BRW_DEPTHFORMAT_D32_FLOAT;
  45       else
  46          return BRW_DEPTHFORMAT_D24_UNORM_X8_UINT;
  47    default:
  48       assert(!"Should not get here.");
  49    }
  50    return 0;
  51 }
  52
  53 static void emit_depthbuffer(struct brw_context *brw)
  54 {
  55    struct intel_region *region = brw->state.depth_region;
  56    struct intel_context *intel = &brw->intel;
  57    struct gl_context *ctx = &intel->ctx;
  58
  59    if (region == NULL) {
  60       BEGIN_BATCH(7);
  61       OUT_BATCH(GEN7_3DSTATE_DEPTH_BUFFER << 16 | (7 - 2));
  62       OUT_BATCH((BRW_DEPTHFORMAT_D32_FLOAT << 18) |
  63                 (BRW_SURFACE_NULL << 29));
  64       OUT_BATCH(0);
  65       OUT_BATCH(0);
  66       OUT_BATCH(0);
  67       OUT_BATCH(0);
  68       OUT_BATCH(0);
  69       ADVANCE_BATCH();
  70    } else {
  71       assert(region->tiling == I915_TILING_Y);
  72
  73       BEGIN_BATCH(7);
  74       OUT_BATCH(GEN7_3DSTATE_DEPTH_BUFFER << 16 | (7 - 2));
  75       OUT_BATCH(((region->pitch * region->cpp) - 1) |
  76                 (gen7_depth_format(brw) << 18) |
  77                 (0 << 22) /* no HiZ buffer */ |
  78                 (0 << 27) /* no stencil write */ |
  79                 ((ctx->Depth.Mask != 0) << 28) |
  80                 (BRW_SURFACE_2D << 29));
  81       OUT_RELOC(region->buffer,
  82                 I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
  83                 0);
  84       OUT_BATCH(((region->width - 1) << 4) | ((region->height - 1) << 18));
  85       OUT_BATCH(0);
  86       OUT_BATCH(0);
  87       OUT_BATCH(0);
  88       ADVANCE_BATCH();
  89    }
  90
  91    BEGIN_BATCH(4);
  92    OUT_BATCH(GEN7_3DSTATE_HIER_DEPTH_BUFFER << 16 | (4 - 2));
  93    OUT_BATCH(0);
  94    OUT_BATCH(0);
  95    OUT_BATCH(0);
  96    ADVANCE_BATCH();
  97
  98    BEGIN_BATCH(4);
  99    OUT_BATCH(GEN7_3DSTATE_STENCIL_BUFFER << 16 | (4 - 2));
 100    OUT_BATCH(0);
 101    OUT_BATCH(0);
 102    OUT_BATCH(0);
 103    ADVANCE_BATCH();
 104
 105    BEGIN_BATCH(3);
 106    OUT_BATCH(GEN7_3DSTATE_CLEAR_PARAMS << 16 | (3 - 2));
 107    OUT_BATCH(0);
 108    OUT_BATCH(0);
 109    ADVANCE_BATCH();
 110 }
 111
 112 /**
 113  * \see brw_context.state.depth_region
 114  */
 115 const struct brw_tracked_state gen7_depthbuffer = {
 116    .dirty = {
 117       .mesa = 0,
 118       .brw = BRW_NEW_DEPTH_BUFFER | BRW_NEW_BATCH,
 119       .cache = 0,
 120    },
 121    .emit = emit_depthbuffer,
 122 };