src/mesa/drivers/dri/i965/gen7_misc_state.c

   1 /*
   2  * Copyright © 2011 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "intel_batchbuffer.h"
  25 #include "intel_mipmap_tree.h"
  26 #include "intel_regions.h"
  27 #include "intel_fbo.h"
  28 #include "brw_context.h"
  29 #include "brw_state.h"
  30 #include "brw_defines.h"
  31
  32 unsigned int
  33 gen7_depth_format(struct brw_context *brw)
  34 {
  35    struct intel_context *intel = &brw->intel;
  36    struct gl_context *ctx = &intel->ctx;
  37    struct gl_framebuffer *fb = ctx->DrawBuffer;
  38    struct intel_renderbuffer *drb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
  39    struct intel_region *region = NULL;
  40
  41    if (drb)
  42       region = drb->mt->region;
  43    else
  44       return BRW_DEPTHFORMAT_D32_FLOAT;
  45
  46    switch (region->cpp) {
  47    case 2:
  48       return BRW_DEPTHFORMAT_D16_UNORM;
  49    case 4:
  50       if (intel->depth_buffer_is_float)
  51          return BRW_DEPTHFORMAT_D32_FLOAT;
  52       else
  53          return BRW_DEPTHFORMAT_D24_UNORM_X8_UINT;
  54    default:
  55       assert(!"Should not get here.");
  56    }
  57    return 0;
  58 }
  59
  60 static void emit_depthbuffer(struct brw_context *brw)
  61 {
  62    struct intel_context *intel = &brw->intel;
  63    struct gl_context *ctx = &intel->ctx;
  64    struct gl_framebuffer *fb = ctx->DrawBuffer;
  65
  66    /* _NEW_BUFFERS */
  67    struct intel_renderbuffer *drb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
  68    struct intel_renderbuffer *srb = intel_get_renderbuffer(fb, BUFFER_STENCIL);
  69
  70    intel_emit_depth_stall_flushes(intel);
  71
  72    /* Gen7 doesn't support packed depth/stencil */
  73    assert(srb == NULL || srb != drb);
  74
  75    if (drb == NULL) {
  76       uint32_t dw1 = BRW_DEPTHFORMAT_D32_FLOAT << 18;
  77       uint32_t dw3 = 0;
  78
  79       if (srb == NULL) {
  80          dw1 |= (BRW_SURFACE_NULL << 29);
  81       } else {
  82          struct intel_region *region = srb->mt->region;
  83
  84          /* _NEW_STENCIL: enable stencil buffer writes */
  85          dw1 |= ((ctx->Stencil.WriteMask != 0) << 27);
  86
  87          /* 3DSTATE_STENCIL_BUFFER inherits surface type and dimensions. */
  88          dw1 |= (BRW_SURFACE_2D << 29);
  89          dw3 = ((region->width - 1) << 4) | ((2 * region->height - 1) << 18);
  90       }
  91
  92       BEGIN_BATCH(7);
  93       OUT_BATCH(GEN7_3DSTATE_DEPTH_BUFFER << 16 | (7 - 2));
  94       OUT_BATCH(dw1);
  95       OUT_BATCH(0);
  96       OUT_BATCH(dw3);
  97       OUT_BATCH(0);
  98       OUT_BATCH(0);
  99       OUT_BATCH(0);
 100       ADVANCE_BATCH();
 101    } else {
 102       struct intel_region *region = drb->mt->region;
 103       uint32_t tile_x, tile_y, offset;
 104
 105       offset = intel_renderbuffer_tile_offsets(drb, &tile_x, &tile_y);
 106
 107       assert(region->tiling == I915_TILING_Y);
 108
 109       /* _NEW_DEPTH, _NEW_STENCIL */
 110       BEGIN_BATCH(7);
 111       OUT_BATCH(GEN7_3DSTATE_DEPTH_BUFFER << 16 | (7 - 2));
 112       OUT_BATCH(((region->pitch * region->cpp) - 1) |
 113                 (gen7_depth_format(brw) << 18) |
 114                 (0 << 22) /* no HiZ buffer */ |
 115                 ((srb != NULL && ctx->Stencil.WriteMask != 0) << 27) |
 116                 ((ctx->Depth.Mask != 0) << 28) |
 117                 (BRW_SURFACE_2D << 29));
 118       OUT_RELOC(region->bo,
 119                 I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
 120                 offset);
 121       OUT_BATCH(((region->width - 1) << 4) | ((region->height - 1) << 18));
 122       OUT_BATCH(0);
 123       OUT_BATCH(tile_x | (tile_y << 16));
 124       OUT_BATCH(0);
 125       ADVANCE_BATCH();
 126    }
 127
 128    BEGIN_BATCH(4);
 129    OUT_BATCH(GEN7_3DSTATE_HIER_DEPTH_BUFFER << 16 | (4 - 2));
 130    OUT_BATCH(0);
 131    OUT_BATCH(0);
 132    OUT_BATCH(0);
 133    ADVANCE_BATCH();
 134
 135    if (srb == NULL) {
 136       BEGIN_BATCH(3);
 137       OUT_BATCH(GEN7_3DSTATE_STENCIL_BUFFER << 16 | (3 - 2));
 138       OUT_BATCH(0);
 139       OUT_BATCH(0);
 140       ADVANCE_BATCH();
 141    } else {
 142       BEGIN_BATCH(3);
 143       OUT_BATCH(GEN7_3DSTATE_STENCIL_BUFFER << 16 | (3 - 2));
 144       OUT_BATCH(srb->mt->region->pitch * srb->mt->region->cpp - 1);
 145       OUT_RELOC(srb->mt->region->bo,
 146                 I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
 147                 0);
 148       ADVANCE_BATCH();
 149    }
 150
 151    BEGIN_BATCH(3);
 152    OUT_BATCH(GEN7_3DSTATE_CLEAR_PARAMS << 16 | (3 - 2));
 153    OUT_BATCH(0);
 154    OUT_BATCH(0);
 155    ADVANCE_BATCH();
 156 }
 157
 158 /**
 159  * \see brw_context.state.depth_region
 160  */
 161 const struct brw_tracked_state gen7_depthbuffer = {
 162    .dirty = {
 163       .mesa = (_NEW_BUFFERS | _NEW_DEPTH | _NEW_STENCIL),
 164       .brw = BRW_NEW_BATCH,
 165       .cache = 0,
 166    },
 167    .emit = emit_depthbuffer,
 168 };