i965: Use unreachable() instead of unconditional assert().
[mesa.git] / src / mesa / drivers / dri / i965 / gen7_sf_state.c
1 /*
2 * Copyright © 2011 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "brw_context.h"
25 #include "brw_state.h"
26 #include "brw_defines.h"
27 #include "brw_util.h"
28 #include "main/macros.h"
29 #include "main/fbobject.h"
30 #include "intel_batchbuffer.h"
31
32 static void
33 upload_sbe_state(struct brw_context *brw)
34 {
35 struct gl_context *ctx = &brw->ctx;
36 /* CACHE_NEW_WM_PROG */
37 uint32_t num_outputs = brw->wm.prog_data->num_varying_inputs;
38 uint32_t dw1;
39 uint32_t point_sprite_enables;
40 uint32_t flat_enables;
41 int i;
42 const int urb_entry_read_offset = BRW_SF_URB_ENTRY_READ_OFFSET;
43 uint16_t attr_overrides[16];
44 /* _NEW_BUFFERS */
45 bool render_to_fbo = _mesa_is_user_fbo(ctx->DrawBuffer);
46 uint32_t point_sprite_origin;
47
48 /* FINISHME: Attribute Swizzle Control Mode? */
49 dw1 = GEN7_SBE_SWIZZLE_ENABLE | num_outputs << GEN7_SBE_NUM_OUTPUTS_SHIFT;
50
51 /* _NEW_POINT
52 *
53 * Window coordinates in an FBO are inverted, which means point
54 * sprite origin must be inverted.
55 */
56 if ((ctx->Point.SpriteOrigin == GL_LOWER_LEFT) != render_to_fbo) {
57 point_sprite_origin = GEN6_SF_POINT_SPRITE_LOWERLEFT;
58 } else {
59 point_sprite_origin = GEN6_SF_POINT_SPRITE_UPPERLEFT;
60 }
61 dw1 |= point_sprite_origin;
62
63 /* BRW_NEW_VUE_MAP_GEOM_OUT | _NEW_POINT | _NEW_LIGHT | _NEW_PROGRAM |
64 * CACHE_NEW_WM_PROG
65 */
66 uint32_t urb_entry_read_length;
67 calculate_attr_overrides(brw, attr_overrides, &point_sprite_enables,
68 &flat_enables, &urb_entry_read_length);
69 dw1 |= urb_entry_read_length << GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT |
70 urb_entry_read_offset << GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT;
71
72 BEGIN_BATCH(14);
73 OUT_BATCH(_3DSTATE_SBE << 16 | (14 - 2));
74 OUT_BATCH(dw1);
75
76 /* Output dwords 2 through 9 */
77 for (i = 0; i < 8; i++) {
78 OUT_BATCH(attr_overrides[i * 2] | attr_overrides[i * 2 + 1] << 16);
79 }
80
81 OUT_BATCH(point_sprite_enables); /* dw10 */
82 OUT_BATCH(flat_enables);
83 OUT_BATCH(0); /* wrapshortest enables 0-7 */
84 OUT_BATCH(0); /* wrapshortest enables 8-15 */
85 ADVANCE_BATCH();
86 }
87
88 const struct brw_tracked_state gen7_sbe_state = {
89 .dirty = {
90 .mesa = (_NEW_BUFFERS |
91 _NEW_LIGHT |
92 _NEW_POINT |
93 _NEW_PROGRAM),
94 .brw = (BRW_NEW_CONTEXT |
95 BRW_NEW_FRAGMENT_PROGRAM |
96 BRW_NEW_VUE_MAP_GEOM_OUT),
97 .cache = CACHE_NEW_WM_PROG
98 },
99 .emit = upload_sbe_state,
100 };
101
102 static void
103 upload_sf_state(struct brw_context *brw)
104 {
105 struct gl_context *ctx = &brw->ctx;
106 uint32_t dw1, dw2, dw3;
107 float point_size;
108 /* _NEW_BUFFERS */
109 bool render_to_fbo = _mesa_is_user_fbo(ctx->DrawBuffer);
110 bool multisampled_fbo = ctx->DrawBuffer->Visual.samples > 1;
111
112 dw1 = GEN6_SF_STATISTICS_ENABLE |
113 GEN6_SF_VIEWPORT_TRANSFORM_ENABLE;
114
115 /* _NEW_BUFFERS */
116 dw1 |= (brw_depthbuffer_format(brw) << GEN7_SF_DEPTH_BUFFER_SURFACE_FORMAT_SHIFT);
117
118 /* _NEW_POLYGON */
119 if ((ctx->Polygon.FrontFace == GL_CCW) ^ render_to_fbo)
120 dw1 |= GEN6_SF_WINDING_CCW;
121
122 if (ctx->Polygon.OffsetFill)
123 dw1 |= GEN6_SF_GLOBAL_DEPTH_OFFSET_SOLID;
124
125 if (ctx->Polygon.OffsetLine)
126 dw1 |= GEN6_SF_GLOBAL_DEPTH_OFFSET_WIREFRAME;
127
128 if (ctx->Polygon.OffsetPoint)
129 dw1 |= GEN6_SF_GLOBAL_DEPTH_OFFSET_POINT;
130
131 switch (ctx->Polygon.FrontMode) {
132 case GL_FILL:
133 dw1 |= GEN6_SF_FRONT_SOLID;
134 break;
135
136 case GL_LINE:
137 dw1 |= GEN6_SF_FRONT_WIREFRAME;
138 break;
139
140 case GL_POINT:
141 dw1 |= GEN6_SF_FRONT_POINT;
142 break;
143
144 default:
145 unreachable("not reached");
146 }
147
148 switch (ctx->Polygon.BackMode) {
149 case GL_FILL:
150 dw1 |= GEN6_SF_BACK_SOLID;
151 break;
152
153 case GL_LINE:
154 dw1 |= GEN6_SF_BACK_WIREFRAME;
155 break;
156
157 case GL_POINT:
158 dw1 |= GEN6_SF_BACK_POINT;
159 break;
160
161 default:
162 unreachable("not reached");
163 }
164
165 dw2 = 0;
166
167 if (ctx->Polygon.CullFlag) {
168 switch (ctx->Polygon.CullFaceMode) {
169 case GL_FRONT:
170 dw2 |= GEN6_SF_CULL_FRONT;
171 break;
172 case GL_BACK:
173 dw2 |= GEN6_SF_CULL_BACK;
174 break;
175 case GL_FRONT_AND_BACK:
176 dw2 |= GEN6_SF_CULL_BOTH;
177 break;
178 default:
179 unreachable("not reached");
180 }
181 } else {
182 dw2 |= GEN6_SF_CULL_NONE;
183 }
184
185 /* _NEW_SCISSOR */
186 if (ctx->Scissor.EnableFlags)
187 dw2 |= GEN6_SF_SCISSOR_ENABLE;
188
189 /* _NEW_LINE */
190 {
191 uint32_t line_width_u3_7 = U_FIXED(CLAMP(ctx->Line.Width, 0.0, 7.99), 7);
192 /* TODO: line width of 0 is not allowed when MSAA enabled */
193 if (line_width_u3_7 == 0)
194 line_width_u3_7 = 1;
195 dw2 |= line_width_u3_7 << GEN6_SF_LINE_WIDTH_SHIFT;
196 }
197 if (ctx->Line.SmoothFlag) {
198 dw2 |= GEN6_SF_LINE_AA_ENABLE;
199 dw2 |= GEN6_SF_LINE_END_CAP_WIDTH_1_0;
200 }
201 if (ctx->Line.StippleFlag && brw->is_haswell) {
202 dw2 |= HSW_SF_LINE_STIPPLE_ENABLE;
203 }
204 /* _NEW_MULTISAMPLE */
205 if (multisampled_fbo && ctx->Multisample.Enabled)
206 dw2 |= GEN6_SF_MSRAST_ON_PATTERN;
207
208 /* FINISHME: Last Pixel Enable? Vertex Sub Pixel Precision Select?
209 */
210
211 dw3 = GEN6_SF_LINE_AA_MODE_TRUE;
212
213 /* _NEW_PROGRAM | _NEW_POINT */
214 if (!(ctx->VertexProgram.PointSizeEnabled || ctx->Point._Attenuated))
215 dw3 |= GEN6_SF_USE_STATE_POINT_WIDTH;
216
217 /* Clamp to ARB_point_parameters user limits */
218 point_size = CLAMP(ctx->Point.Size, ctx->Point.MinSize, ctx->Point.MaxSize);
219
220 /* Clamp to the hardware limits and convert to fixed point */
221 dw3 |= U_FIXED(CLAMP(point_size, 0.125, 255.875), 3);
222
223 /* _NEW_LIGHT */
224 if (ctx->Light.ProvokingVertex != GL_FIRST_VERTEX_CONVENTION) {
225 dw3 |=
226 (2 << GEN6_SF_TRI_PROVOKE_SHIFT) |
227 (2 << GEN6_SF_TRIFAN_PROVOKE_SHIFT) |
228 (1 << GEN6_SF_LINE_PROVOKE_SHIFT);
229 } else {
230 dw3 |= (1 << GEN6_SF_TRIFAN_PROVOKE_SHIFT);
231 }
232
233 BEGIN_BATCH(7);
234 OUT_BATCH(_3DSTATE_SF << 16 | (7 - 2));
235 OUT_BATCH(dw1);
236 OUT_BATCH(dw2);
237 OUT_BATCH(dw3);
238 OUT_BATCH_F(ctx->Polygon.OffsetUnits * 2); /* constant. copied from gen4 */
239 OUT_BATCH_F(ctx->Polygon.OffsetFactor); /* scale */
240 OUT_BATCH_F(0.0); /* XXX: global depth offset clamp */
241 ADVANCE_BATCH();
242 }
243
244 const struct brw_tracked_state gen7_sf_state = {
245 .dirty = {
246 .mesa = (_NEW_LIGHT |
247 _NEW_PROGRAM |
248 _NEW_POLYGON |
249 _NEW_LINE |
250 _NEW_SCISSOR |
251 _NEW_BUFFERS |
252 _NEW_POINT |
253 _NEW_MULTISAMPLE),
254 .brw = BRW_NEW_CONTEXT,
255 .cache = CACHE_NEW_VS_PROG
256 },
257 .emit = upload_sf_state,
258 };