2 * Copyright © 2011 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 #include "brw_context.h"
25 #include "brw_state.h"
26 #include "brw_defines.h"
28 #include "main/macros.h"
29 #include "intel_batchbuffer.h"
32 upload_sbe_state(struct brw_context
*brw
)
34 struct intel_context
*intel
= &brw
->intel
;
35 struct gl_context
*ctx
= &intel
->ctx
;
36 struct brw_vue_map vue_map
;
37 uint32_t urb_entry_read_length
;
38 /* CACHE_NEW_VS_PROG */
39 GLbitfield64 vs_outputs_written
= brw
->vs
.prog_data
->outputs_written
;
40 /* BRW_NEW_FRAGMENT_PROGRAM */
41 uint32_t num_outputs
= _mesa_bitcount_64(brw
->fragment_program
->Base
.InputsRead
);
42 uint32_t dw1
, dw10
, dw11
;
44 int attr
= 0, input_index
= 0;
46 int urb_entry_read_offset
= 1;
47 bool userclip_active
= (ctx
->Transform
.ClipPlanesEnabled
!= 0);
48 uint16_t attr_overrides
[FRAG_ATTRIB_MAX
];
50 brw_compute_vue_map(&vue_map
, intel
, userclip_active
, vs_outputs_written
);
51 urb_entry_read_length
= (vue_map
.num_slots
+ 1)/2 - urb_entry_read_offset
;
52 if (urb_entry_read_length
== 0) {
53 /* Setting the URB entry read length to 0 causes undefined behavior, so
54 * if we have no URB data to read, set it to 1.
56 urb_entry_read_length
= 1;
59 /* FINISHME: Attribute Swizzle Control Mode? */
61 GEN7_SBE_SWIZZLE_ENABLE
|
62 num_outputs
<< GEN7_SBE_NUM_OUTPUTS_SHIFT
|
63 urb_entry_read_length
<< GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT
|
64 urb_entry_read_offset
<< GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT
;
67 if (ctx
->Point
.SpriteOrigin
== GL_LOWER_LEFT
)
68 dw1
|= GEN6_SF_POINT_SPRITE_LOWERLEFT
;
73 /* Create the mapping from the FS inputs we produce to the VS outputs
76 for (; attr
< FRAG_ATTRIB_MAX
; attr
++) {
77 if (!(brw
->fragment_program
->Base
.InputsRead
& BITFIELD64_BIT(attr
)))
80 if (ctx
->Point
.PointSprite
&&
81 attr
>= FRAG_ATTRIB_TEX0
&& attr
<= FRAG_ATTRIB_TEX7
&&
82 ctx
->Point
.CoordReplace
[attr
- FRAG_ATTRIB_TEX0
]) {
83 dw10
|= (1 << input_index
);
86 if (attr
== FRAG_ATTRIB_PNTC
)
87 dw10
|= (1 << input_index
);
90 if (ctx
->Light
.ShadeModel
== GL_FLAT
) {
92 * Setup the Constant Interpolation Enable bit mask for each
93 * corresponding attribute(currently, we only care two attrs:
94 * FRAG_BIT_COL0 and FRAG_BIT_COL1).
96 * FIXME: should we care other attributes?
98 if (attr
== FRAG_ATTRIB_COL0
|| attr
== FRAG_ATTRIB_COL1
)
99 dw11
|= (1 << input_index
);
102 /* The hardware can only do the overrides on 16 overrides at a
103 * time, and the other up to 16 have to be lined up so that the
104 * input index = the output index. We'll need to do some
105 * tweaking to make sure that's the case.
107 assert(input_index
< 16 || attr
== input_index
);
109 attr_overrides
[input_index
++] =
110 get_attr_override(&vue_map
, urb_entry_read_offset
, attr
,
111 ctx
->VertexProgram
._TwoSideEnabled
);
114 for (; attr
< FRAG_ATTRIB_MAX
; attr
++)
115 attr_overrides
[input_index
++] = 0;
118 OUT_BATCH(_3DSTATE_SBE
<< 16 | (14 - 2));
121 /* Output dwords 2 through 9 */
122 for (i
= 0; i
< 8; i
++) {
123 OUT_BATCH(attr_overrides
[i
* 2] | attr_overrides
[i
* 2 + 1] << 16);
126 OUT_BATCH(dw10
); /* point sprite texcoord bitmask */
127 OUT_BATCH(dw11
); /* constant interp bitmask */
128 OUT_BATCH(0); /* wrapshortest enables 0-7 */
129 OUT_BATCH(0); /* wrapshortest enables 8-15 */
133 const struct brw_tracked_state gen7_sbe_state
= {
135 .mesa
= (_NEW_LIGHT
|
138 .brw
= (BRW_NEW_CONTEXT
|
139 BRW_NEW_FRAGMENT_PROGRAM
),
140 .cache
= CACHE_NEW_VS_PROG
142 .emit
= upload_sbe_state
,
146 upload_sf_state(struct brw_context
*brw
)
148 struct intel_context
*intel
= &brw
->intel
;
149 struct gl_context
*ctx
= &intel
->ctx
;
150 uint32_t dw1
, dw2
, dw3
;
153 bool render_to_fbo
= brw
->intel
.ctx
.DrawBuffer
->Name
!= 0;
155 dw1
= GEN6_SF_STATISTICS_ENABLE
| GEN6_SF_VIEWPORT_TRANSFORM_ENABLE
;
158 dw1
|= (gen7_depth_format(brw
) << GEN7_SF_DEPTH_BUFFER_SURFACE_FORMAT_SHIFT
);
161 if ((ctx
->Polygon
.FrontFace
== GL_CCW
) ^ render_to_fbo
)
162 dw1
|= GEN6_SF_WINDING_CCW
;
164 if (ctx
->Polygon
.OffsetFill
)
165 dw1
|= GEN6_SF_GLOBAL_DEPTH_OFFSET_SOLID
;
167 if (ctx
->Polygon
.OffsetLine
)
168 dw1
|= GEN6_SF_GLOBAL_DEPTH_OFFSET_WIREFRAME
;
170 if (ctx
->Polygon
.OffsetPoint
)
171 dw1
|= GEN6_SF_GLOBAL_DEPTH_OFFSET_POINT
;
173 switch (ctx
->Polygon
.FrontMode
) {
175 dw1
|= GEN6_SF_FRONT_SOLID
;
179 dw1
|= GEN6_SF_FRONT_WIREFRAME
;
183 dw1
|= GEN6_SF_FRONT_POINT
;
191 switch (ctx
->Polygon
.BackMode
) {
193 dw1
|= GEN6_SF_BACK_SOLID
;
197 dw1
|= GEN6_SF_BACK_WIREFRAME
;
201 dw1
|= GEN6_SF_BACK_POINT
;
211 if (ctx
->Polygon
.CullFlag
) {
212 switch (ctx
->Polygon
.CullFaceMode
) {
214 dw2
|= GEN6_SF_CULL_FRONT
;
217 dw2
|= GEN6_SF_CULL_BACK
;
219 case GL_FRONT_AND_BACK
:
220 dw2
|= GEN6_SF_CULL_BOTH
;
227 dw2
|= GEN6_SF_CULL_NONE
;
231 if (ctx
->Scissor
.Enabled
)
232 dw2
|= GEN6_SF_SCISSOR_ENABLE
;
235 dw2
|= U_FIXED(CLAMP(ctx
->Line
.Width
, 0.0, 7.99), 7) <<
236 GEN6_SF_LINE_WIDTH_SHIFT
;
237 if (ctx
->Line
.SmoothFlag
) {
238 dw2
|= GEN6_SF_LINE_AA_ENABLE
;
239 dw2
|= GEN6_SF_LINE_AA_MODE_TRUE
;
240 dw2
|= GEN6_SF_LINE_END_CAP_WIDTH_1_0
;
243 /* FINISHME: Last Pixel Enable? Vertex Sub Pixel Precision Select?
244 * FINISHME: AA Line Distance Mode?
250 if (!(ctx
->VertexProgram
.PointSizeEnabled
|| ctx
->Point
._Attenuated
))
251 dw3
|= GEN6_SF_USE_STATE_POINT_WIDTH
;
253 /* Clamp to ARB_point_parameters user limits */
254 point_size
= CLAMP(ctx
->Point
.Size
, ctx
->Point
.MinSize
, ctx
->Point
.MaxSize
);
256 /* Clamp to the hardware limits and convert to fixed point */
257 dw3
|= U_FIXED(CLAMP(point_size
, 0.125, 255.875), 3);
260 if (ctx
->Light
.ProvokingVertex
!= GL_FIRST_VERTEX_CONVENTION
) {
262 (2 << GEN6_SF_TRI_PROVOKE_SHIFT
) |
263 (2 << GEN6_SF_TRIFAN_PROVOKE_SHIFT
) |
264 (1 << GEN6_SF_LINE_PROVOKE_SHIFT
);
266 dw3
|= (1 << GEN6_SF_TRIFAN_PROVOKE_SHIFT
);
270 OUT_BATCH(_3DSTATE_SF
<< 16 | (7 - 2));
274 OUT_BATCH_F(ctx
->Polygon
.OffsetUnits
* 2); /* constant. copied from gen4 */
275 OUT_BATCH_F(ctx
->Polygon
.OffsetFactor
); /* scale */
276 OUT_BATCH_F(0.0); /* XXX: global depth offset clamp */
280 const struct brw_tracked_state gen7_sf_state
= {
282 .mesa
= (_NEW_LIGHT
|
289 .brw
= (BRW_NEW_CONTEXT
),
290 .cache
= CACHE_NEW_VS_PROG
292 .emit
= upload_sf_state
,