src/mesa/drivers/dri/i965/gen7_sf_state.c

   1 /*
   2  * Copyright © 2011 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "brw_context.h"
  25 #include "brw_state.h"
  26 #include "brw_defines.h"
  27 #include "brw_util.h"
  28 #include "main/macros.h"
  29 #include "intel_batchbuffer.h"
  30
  31 static void
  32 upload_sbe_state(struct brw_context *brw)
  33 {
  34    struct intel_context *intel = &brw->intel;
  35    struct gl_context *ctx = &intel->ctx;
  36    /* CACHE_NEW_VS_PROG */
  37    uint32_t num_inputs = brw_count_bits(brw->vs.prog_data->outputs_written);
  38    /* BRW_NEW_FRAGMENT_PROGRAM */
  39    uint32_t num_outputs = brw_count_bits(brw->fragment_program->Base.InputsRead);
  40    uint32_t dw1, dw10, dw11;
  41    int i;
  42    int attr = 0;
  43    /* _NEW_TRANSFORM */
  44    int urb_start = ctx->Transform.ClipPlanesEnabled ? 2 : 1;
  45    /* _NEW_LIGHT */
  46    int two_side_color = (ctx->Light.Enabled && ctx->Light.Model.TwoSide);
  47
  48    /* FINISHME: Attribute Swizzle Control Mode? */
  49    dw1 =
  50       GEN7_SBE_SWIZZLE_ENABLE |
  51       num_outputs << GEN7_SBE_NUM_OUTPUTS_SHIFT |
  52       (num_inputs + 1) / 2 << GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT |
  53       urb_start << GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT;
  54
  55    /* _NEW_POINT */
  56    if (ctx->Point.SpriteOrigin == GL_LOWER_LEFT)
  57       dw1 |= GEN6_SF_POINT_SPRITE_LOWERLEFT;
  58
  59    dw10 = 0;
  60    if (ctx->Point.PointSprite) {
  61        for (i = 0; i < 8; i++) {
  62            if (ctx->Point.CoordReplace[i])
  63                dw10 |= (1 << i);
  64        }
  65    }
  66
  67    /* _NEW_LIGHT (flat shading) */
  68    dw11 = 0;
  69    if (ctx->Light.ShadeModel == GL_FLAT) {
  70        dw11 |= ((brw->fragment_program->Base.InputsRead & (FRAG_BIT_COL0 | FRAG_BIT_COL1)) >>
  71                 ((brw->fragment_program->Base.InputsRead & FRAG_BIT_WPOS) ? 0 : 1));
  72    }
  73
  74    BEGIN_BATCH(14);
  75    OUT_BATCH(_3DSTATE_SBE << 16 | (14 - 2));
  76    OUT_BATCH(dw1);
  77
  78    /* Output dwords 2 through 9 */
  79    for (i = 0; i < 8; i++) {
  80       uint32_t attr_overrides = 0;
  81
  82       for (; attr < 64; attr++) {
  83          if (brw->fragment_program->Base.InputsRead & BITFIELD64_BIT(attr)) {
  84             attr_overrides |= get_attr_override(brw, attr, two_side_color);
  85             attr++;
  86             break;
  87          }
  88       }
  89
  90       for (; attr < 64; attr++) {
  91          if (brw->fragment_program->Base.InputsRead & BITFIELD64_BIT(attr)) {
  92             attr_overrides |= get_attr_override(brw, attr, two_side_color) << 16;
  93             attr++;
  94             break;
  95          }
  96       }
  97       OUT_BATCH(attr_overrides);
  98    }
  99
 100    OUT_BATCH(dw10); /* point sprite texcoord bitmask */
 101    OUT_BATCH(dw11); /* constant interp bitmask */
 102    OUT_BATCH(0); /* wrapshortest enables 0-7 */
 103    OUT_BATCH(0); /* wrapshortest enables 8-15 */
 104    ADVANCE_BATCH();
 105 }
 106
 107 const struct brw_tracked_state gen7_sbe_state = {
 108    .dirty = {
 109       .mesa  = (_NEW_LIGHT |
 110                 _NEW_POINT |
 111                 _NEW_TRANSFORM),
 112       .brw   = (BRW_NEW_CONTEXT |
 113                 BRW_NEW_FRAGMENT_PROGRAM),
 114       .cache = CACHE_NEW_VS_PROG
 115    },
 116    .emit = upload_sbe_state,
 117 };
 118
 119 static void
 120 upload_sf_state(struct brw_context *brw)
 121 {
 122    struct intel_context *intel = &brw->intel;
 123    struct gl_context *ctx = &intel->ctx;
 124    uint32_t dw1, dw2, dw3;
 125    float point_size;
 126    /* _NEW_BUFFERS */
 127    bool render_to_fbo = brw->intel.ctx.DrawBuffer->Name != 0;
 128
 129    dw1 = GEN6_SF_STATISTICS_ENABLE | GEN6_SF_VIEWPORT_TRANSFORM_ENABLE;
 130
 131    /* _NEW_BUFFERS */
 132    dw1 |= (gen7_depth_format(brw) << GEN7_SF_DEPTH_BUFFER_SURFACE_FORMAT_SHIFT);
 133
 134    /* _NEW_POLYGON */
 135    if ((ctx->Polygon.FrontFace == GL_CCW) ^ render_to_fbo)
 136       dw1 |= GEN6_SF_WINDING_CCW;
 137
 138    if (ctx->Polygon.OffsetFill)
 139        dw1 |= GEN6_SF_GLOBAL_DEPTH_OFFSET_SOLID;
 140
 141    if (ctx->Polygon.OffsetLine)
 142        dw1 |= GEN6_SF_GLOBAL_DEPTH_OFFSET_WIREFRAME;
 143
 144    if (ctx->Polygon.OffsetPoint)
 145        dw1 |= GEN6_SF_GLOBAL_DEPTH_OFFSET_POINT;
 146
 147    switch (ctx->Polygon.FrontMode) {
 148    case GL_FILL:
 149        dw1 |= GEN6_SF_FRONT_SOLID;
 150        break;
 151
 152    case GL_LINE:
 153        dw1 |= GEN6_SF_FRONT_WIREFRAME;
 154        break;
 155
 156    case GL_POINT:
 157        dw1 |= GEN6_SF_FRONT_POINT;
 158        break;
 159
 160    default:
 161        assert(0);
 162        break;
 163    }
 164
 165    switch (ctx->Polygon.BackMode) {
 166    case GL_FILL:
 167        dw1 |= GEN6_SF_BACK_SOLID;
 168        break;
 169
 170    case GL_LINE:
 171        dw1 |= GEN6_SF_BACK_WIREFRAME;
 172        break;
 173
 174    case GL_POINT:
 175        dw1 |= GEN6_SF_BACK_POINT;
 176        break;
 177
 178    default:
 179        assert(0);
 180        break;
 181    }
 182
 183    dw2 = 0;
 184
 185    if (ctx->Polygon.CullFlag) {
 186       switch (ctx->Polygon.CullFaceMode) {
 187       case GL_FRONT:
 188          dw2 |= GEN6_SF_CULL_FRONT;
 189          break;
 190       case GL_BACK:
 191          dw2 |= GEN6_SF_CULL_BACK;
 192          break;
 193       case GL_FRONT_AND_BACK:
 194          dw2 |= GEN6_SF_CULL_BOTH;
 195          break;
 196       default:
 197          assert(0);
 198          break;
 199       }
 200    } else {
 201       dw2 |= GEN6_SF_CULL_NONE;
 202    }
 203
 204    /* _NEW_SCISSOR */
 205    if (ctx->Scissor.Enabled)
 206       dw2 |= GEN6_SF_SCISSOR_ENABLE;
 207
 208    /* _NEW_LINE */
 209    dw2 |= U_FIXED(CLAMP(ctx->Line.Width, 0.0, 7.99), 7) <<
 210       GEN6_SF_LINE_WIDTH_SHIFT;
 211    if (ctx->Line.SmoothFlag) {
 212       dw2 |= GEN6_SF_LINE_AA_ENABLE;
 213       dw2 |= GEN6_SF_LINE_AA_MODE_TRUE;
 214       dw2 |= GEN6_SF_LINE_END_CAP_WIDTH_1_0;
 215    }
 216
 217    /* FINISHME: Last Pixel Enable?  Vertex Sub Pixel Precision Select?
 218     * FINISHME: AA Line Distance Mode?
 219     */
 220
 221    dw3 = 0;
 222
 223    /* _NEW_POINT */
 224    if (!(ctx->VertexProgram.PointSizeEnabled || ctx->Point._Attenuated))
 225       dw3 |= GEN6_SF_USE_STATE_POINT_WIDTH;
 226
 227    /* Clamp to ARB_point_parameters user limits */
 228    point_size = CLAMP(ctx->Point.Size, ctx->Point.MinSize, ctx->Point.MaxSize);
 229
 230    /* Clamp to the hardware limits and convert to fixed point */
 231    dw3 |= U_FIXED(CLAMP(point_size, 0.125, 255.875), 3);
 232
 233    /* _NEW_LIGHT */
 234    if (ctx->Light.ProvokingVertex != GL_FIRST_VERTEX_CONVENTION) {
 235       dw3 |=
 236          (2 << GEN6_SF_TRI_PROVOKE_SHIFT) |
 237          (2 << GEN6_SF_TRIFAN_PROVOKE_SHIFT) |
 238          (1 << GEN6_SF_LINE_PROVOKE_SHIFT);
 239    } else {
 240       dw3 |= (1 << GEN6_SF_TRIFAN_PROVOKE_SHIFT);
 241    }
 242
 243    BEGIN_BATCH(7);
 244    OUT_BATCH(_3DSTATE_SF << 16 | (7 - 2));
 245    OUT_BATCH(dw1);
 246    OUT_BATCH(dw2);
 247    OUT_BATCH(dw3);
 248    OUT_BATCH_F(ctx->Polygon.OffsetUnits * 2); /* constant.  copied from gen4 */
 249    OUT_BATCH_F(ctx->Polygon.OffsetFactor); /* scale */
 250    OUT_BATCH_F(0.0); /* XXX: global depth offset clamp */
 251    ADVANCE_BATCH();
 252 }
 253
 254 const struct brw_tracked_state gen7_sf_state = {
 255    .dirty = {
 256       .mesa  = (_NEW_LIGHT |
 257                 _NEW_POLYGON |
 258                 _NEW_LINE |
 259                 _NEW_SCISSOR |
 260                 _NEW_BUFFERS |
 261                 _NEW_POINT),
 262       .brw   = (BRW_NEW_CONTEXT),
 263       .cache = CACHE_NEW_VS_PROG
 264    },
 265    .emit = upload_sf_state,
 266 };