src/mesa/drivers/dri/i965/gen7_sf_state.c

   1 /*
   2  * Copyright © 2011 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "brw_context.h"
  25 #include "brw_state.h"
  26 #include "brw_defines.h"
  27 #include "brw_util.h"
  28 #include "main/macros.h"
  29 #include "intel_batchbuffer.h"
  30
  31 static void
  32 upload_sbe_state(struct brw_context *brw)
  33 {
  34    struct intel_context *intel = &brw->intel;
  35    struct gl_context *ctx = &intel->ctx;
  36    /* CACHE_NEW_VS_PROG */
  37    uint32_t num_inputs = brw_count_bits(brw->vs.prog_data->outputs_written);
  38    /* BRW_NEW_FRAGMENT_PROGRAM */
  39    uint32_t num_outputs = brw_count_bits(brw->fragment_program->Base.InputsRead);
  40    uint32_t dw1, dw10, dw11;
  41    int i;
  42    int attr = 0, input_index = 0;
  43    /* _NEW_TRANSFORM */
  44    int urb_start = ctx->Transform.ClipPlanesEnabled ? 2 : 1;
  45    /* _NEW_LIGHT */
  46    int two_side_color = (ctx->Light.Enabled && ctx->Light.Model.TwoSide);
  47    uint16_t attr_overrides[FRAG_ATTRIB_MAX];
  48
  49    /* FINISHME: Attribute Swizzle Control Mode? */
  50    dw1 =
  51       GEN7_SBE_SWIZZLE_ENABLE |
  52       num_outputs << GEN7_SBE_NUM_OUTPUTS_SHIFT |
  53       (num_inputs + 1) / 2 << GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT |
  54       urb_start << GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT;
  55
  56    /* _NEW_POINT */
  57    if (ctx->Point.SpriteOrigin == GL_LOWER_LEFT)
  58       dw1 |= GEN6_SF_POINT_SPRITE_LOWERLEFT;
  59
  60    dw10 = 0;
  61    if (ctx->Point.PointSprite) {
  62        for (i = 0; i < 8; i++) {
  63            if (ctx->Point.CoordReplace[i])
  64                dw10 |= (1 << i);
  65        }
  66    }
  67
  68    /* _NEW_LIGHT (flat shading) */
  69    dw11 = 0;
  70    if (ctx->Light.ShadeModel == GL_FLAT) {
  71        dw11 |= ((brw->fragment_program->Base.InputsRead & (FRAG_BIT_COL0 | FRAG_BIT_COL1)) >>
  72                 ((brw->fragment_program->Base.InputsRead & FRAG_BIT_WPOS) ? 0 : 1));
  73    }
  74
  75    /* Create the mapping from the FS inputs we produce to the VS outputs
  76     * they source from.
  77     */
  78    for (; attr < FRAG_ATTRIB_MAX; attr++) {
  79       if (!(brw->fragment_program->Base.InputsRead & BITFIELD64_BIT(attr)))
  80          continue;
  81
  82       /* The hardware can only do the overrides on 16 overrides at a
  83        * time, and the other up to 16 have to be lined up so that the
  84        * input index = the output index.  We'll need to do some
  85        * tweaking to make sure that's the case.
  86        */
  87       assert(input_index < 16 || attr == input_index);
  88
  89       attr_overrides[input_index++] = get_attr_override(brw, attr,
  90                                                         two_side_color);
  91    }
  92
  93    for (; attr < FRAG_ATTRIB_MAX; attr++)
  94       attr_overrides[input_index++] = 0;
  95
  96    BEGIN_BATCH(14);
  97    OUT_BATCH(_3DSTATE_SBE << 16 | (14 - 2));
  98    OUT_BATCH(dw1);
  99
 100    /* Output dwords 2 through 9 */
 101    for (i = 0; i < 8; i++) {
 102       OUT_BATCH(attr_overrides[i * 2] | attr_overrides[i * 2 + 1] << 16);
 103    }
 104
 105    OUT_BATCH(dw10); /* point sprite texcoord bitmask */
 106    OUT_BATCH(dw11); /* constant interp bitmask */
 107    OUT_BATCH(0); /* wrapshortest enables 0-7 */
 108    OUT_BATCH(0); /* wrapshortest enables 8-15 */
 109    ADVANCE_BATCH();
 110 }
 111
 112 const struct brw_tracked_state gen7_sbe_state = {
 113    .dirty = {
 114       .mesa  = (_NEW_LIGHT |
 115                 _NEW_POINT |
 116                 _NEW_TRANSFORM),
 117       .brw   = (BRW_NEW_CONTEXT |
 118                 BRW_NEW_FRAGMENT_PROGRAM),
 119       .cache = CACHE_NEW_VS_PROG
 120    },
 121    .emit = upload_sbe_state,
 122 };
 123
 124 static void
 125 upload_sf_state(struct brw_context *brw)
 126 {
 127    struct intel_context *intel = &brw->intel;
 128    struct gl_context *ctx = &intel->ctx;
 129    uint32_t dw1, dw2, dw3;
 130    float point_size;
 131    /* _NEW_BUFFERS */
 132    bool render_to_fbo = brw->intel.ctx.DrawBuffer->Name != 0;
 133
 134    dw1 = GEN6_SF_STATISTICS_ENABLE | GEN6_SF_VIEWPORT_TRANSFORM_ENABLE;
 135
 136    /* _NEW_BUFFERS */
 137    dw1 |= (gen7_depth_format(brw) << GEN7_SF_DEPTH_BUFFER_SURFACE_FORMAT_SHIFT);
 138
 139    /* _NEW_POLYGON */
 140    if ((ctx->Polygon.FrontFace == GL_CCW) ^ render_to_fbo)
 141       dw1 |= GEN6_SF_WINDING_CCW;
 142
 143    if (ctx->Polygon.OffsetFill)
 144        dw1 |= GEN6_SF_GLOBAL_DEPTH_OFFSET_SOLID;
 145
 146    if (ctx->Polygon.OffsetLine)
 147        dw1 |= GEN6_SF_GLOBAL_DEPTH_OFFSET_WIREFRAME;
 148
 149    if (ctx->Polygon.OffsetPoint)
 150        dw1 |= GEN6_SF_GLOBAL_DEPTH_OFFSET_POINT;
 151
 152    switch (ctx->Polygon.FrontMode) {
 153    case GL_FILL:
 154        dw1 |= GEN6_SF_FRONT_SOLID;
 155        break;
 156
 157    case GL_LINE:
 158        dw1 |= GEN6_SF_FRONT_WIREFRAME;
 159        break;
 160
 161    case GL_POINT:
 162        dw1 |= GEN6_SF_FRONT_POINT;
 163        break;
 164
 165    default:
 166        assert(0);
 167        break;
 168    }
 169
 170    switch (ctx->Polygon.BackMode) {
 171    case GL_FILL:
 172        dw1 |= GEN6_SF_BACK_SOLID;
 173        break;
 174
 175    case GL_LINE:
 176        dw1 |= GEN6_SF_BACK_WIREFRAME;
 177        break;
 178
 179    case GL_POINT:
 180        dw1 |= GEN6_SF_BACK_POINT;
 181        break;
 182
 183    default:
 184        assert(0);
 185        break;
 186    }
 187
 188    dw2 = 0;
 189
 190    if (ctx->Polygon.CullFlag) {
 191       switch (ctx->Polygon.CullFaceMode) {
 192       case GL_FRONT:
 193          dw2 |= GEN6_SF_CULL_FRONT;
 194          break;
 195       case GL_BACK:
 196          dw2 |= GEN6_SF_CULL_BACK;
 197          break;
 198       case GL_FRONT_AND_BACK:
 199          dw2 |= GEN6_SF_CULL_BOTH;
 200          break;
 201       default:
 202          assert(0);
 203          break;
 204       }
 205    } else {
 206       dw2 |= GEN6_SF_CULL_NONE;
 207    }
 208
 209    /* _NEW_SCISSOR */
 210    if (ctx->Scissor.Enabled)
 211       dw2 |= GEN6_SF_SCISSOR_ENABLE;
 212
 213    /* _NEW_LINE */
 214    dw2 |= U_FIXED(CLAMP(ctx->Line.Width, 0.0, 7.99), 7) <<
 215       GEN6_SF_LINE_WIDTH_SHIFT;
 216    if (ctx->Line.SmoothFlag) {
 217       dw2 |= GEN6_SF_LINE_AA_ENABLE;
 218       dw2 |= GEN6_SF_LINE_AA_MODE_TRUE;
 219       dw2 |= GEN6_SF_LINE_END_CAP_WIDTH_1_0;
 220    }
 221
 222    /* FINISHME: Last Pixel Enable?  Vertex Sub Pixel Precision Select?
 223     * FINISHME: AA Line Distance Mode?
 224     */
 225
 226    dw3 = 0;
 227
 228    /* _NEW_POINT */
 229    if (!(ctx->VertexProgram.PointSizeEnabled || ctx->Point._Attenuated))
 230       dw3 |= GEN6_SF_USE_STATE_POINT_WIDTH;
 231
 232    /* Clamp to ARB_point_parameters user limits */
 233    point_size = CLAMP(ctx->Point.Size, ctx->Point.MinSize, ctx->Point.MaxSize);
 234
 235    /* Clamp to the hardware limits and convert to fixed point */
 236    dw3 |= U_FIXED(CLAMP(point_size, 0.125, 255.875), 3);
 237
 238    /* _NEW_LIGHT */
 239    if (ctx->Light.ProvokingVertex != GL_FIRST_VERTEX_CONVENTION) {
 240       dw3 |=
 241          (2 << GEN6_SF_TRI_PROVOKE_SHIFT) |
 242          (2 << GEN6_SF_TRIFAN_PROVOKE_SHIFT) |
 243          (1 << GEN6_SF_LINE_PROVOKE_SHIFT);
 244    } else {
 245       dw3 |= (1 << GEN6_SF_TRIFAN_PROVOKE_SHIFT);
 246    }
 247
 248    BEGIN_BATCH(7);
 249    OUT_BATCH(_3DSTATE_SF << 16 | (7 - 2));
 250    OUT_BATCH(dw1);
 251    OUT_BATCH(dw2);
 252    OUT_BATCH(dw3);
 253    OUT_BATCH_F(ctx->Polygon.OffsetUnits * 2); /* constant.  copied from gen4 */
 254    OUT_BATCH_F(ctx->Polygon.OffsetFactor); /* scale */
 255    OUT_BATCH_F(0.0); /* XXX: global depth offset clamp */
 256    ADVANCE_BATCH();
 257 }
 258
 259 const struct brw_tracked_state gen7_sf_state = {
 260    .dirty = {
 261       .mesa  = (_NEW_LIGHT |
 262                 _NEW_POLYGON |
 263                 _NEW_LINE |
 264                 _NEW_SCISSOR |
 265                 _NEW_BUFFERS |
 266                 _NEW_POINT),
 267       .brw   = (BRW_NEW_CONTEXT),
 268       .cache = CACHE_NEW_VS_PROG
 269    },
 270    .emit = upload_sf_state,
 271 };