src/mesa/drivers/dri/i965/gen7_sf_state.c

   1 /*
   2  * Copyright © 2011 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "brw_context.h"
  25 #include "brw_state.h"
  26 #include "brw_defines.h"
  27 #include "brw_util.h"
  28 #include "main/macros.h"
  29 #include "intel_batchbuffer.h"
  30
  31 static void
  32 upload_sbe_state(struct brw_context *brw)
  33 {
  34    struct intel_context *intel = &brw->intel;
  35    struct gl_context *ctx = &intel->ctx;
  36    struct brw_vue_map vue_map;
  37    uint32_t urb_entry_read_length;
  38    /* CACHE_NEW_VS_PROG */
  39    GLbitfield64 vs_outputs_written = brw->vs.prog_data->outputs_written;
  40    /* BRW_NEW_FRAGMENT_PROGRAM */
  41    uint32_t num_outputs = _mesa_bitcount_64(brw->fragment_program->Base.InputsRead);
  42    /* _NEW_LIGHT */
  43    bool shade_model_flat = ctx->Light.ShadeModel == GL_FLAT;
  44    uint32_t dw1, dw10, dw11;
  45    int i;
  46    int attr = 0, input_index = 0;
  47    /* _NEW_TRANSFORM */
  48    int urb_entry_read_offset = 1;
  49    bool userclip_active = (ctx->Transform.ClipPlanesEnabled != 0);
  50    uint16_t attr_overrides[FRAG_ATTRIB_MAX];
  51
  52    brw_compute_vue_map(&vue_map, intel, userclip_active, vs_outputs_written);
  53    urb_entry_read_length = (vue_map.num_slots + 1)/2 - urb_entry_read_offset;
  54    if (urb_entry_read_length == 0) {
  55       /* Setting the URB entry read length to 0 causes undefined behavior, so
  56        * if we have no URB data to read, set it to 1.
  57        */
  58       urb_entry_read_length = 1;
  59    }
  60
  61    /* FINISHME: Attribute Swizzle Control Mode? */
  62    dw1 =
  63       GEN7_SBE_SWIZZLE_ENABLE |
  64       num_outputs << GEN7_SBE_NUM_OUTPUTS_SHIFT |
  65       urb_entry_read_length << GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT |
  66       urb_entry_read_offset << GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT;
  67
  68    /* _NEW_POINT */
  69    if (ctx->Point.SpriteOrigin == GL_LOWER_LEFT)
  70       dw1 |= GEN6_SF_POINT_SPRITE_LOWERLEFT;
  71
  72    dw10 = 0;
  73    dw11 = 0;
  74
  75    /* Create the mapping from the FS inputs we produce to the VS outputs
  76     * they source from.
  77     */
  78    for (; attr < FRAG_ATTRIB_MAX; attr++) {
  79       enum glsl_interp_qualifier interp_qualifier =
  80          brw->fragment_program->InterpQualifier[attr];
  81       bool is_gl_Color = attr == FRAG_ATTRIB_COL0 || attr == FRAG_ATTRIB_COL1;
  82
  83       if (!(brw->fragment_program->Base.InputsRead & BITFIELD64_BIT(attr)))
  84          continue;
  85
  86       if (ctx->Point.PointSprite &&
  87           attr >= FRAG_ATTRIB_TEX0 && attr <= FRAG_ATTRIB_TEX7 &&
  88           ctx->Point.CoordReplace[attr - FRAG_ATTRIB_TEX0]) {
  89          dw10 |= (1 << input_index);
  90       }
  91
  92       if (attr == FRAG_ATTRIB_PNTC)
  93          dw10 |= (1 << input_index);
  94
  95       /* flat shading */
  96       if (interp_qualifier == INTERP_QUALIFIER_FLAT ||
  97           (shade_model_flat && is_gl_Color &&
  98            interp_qualifier == INTERP_QUALIFIER_NONE))
  99          dw11 |= (1 << input_index);
 100
 101       /* The hardware can only do the overrides on 16 overrides at a
 102        * time, and the other up to 16 have to be lined up so that the
 103        * input index = the output index.  We'll need to do some
 104        * tweaking to make sure that's the case.
 105        */
 106       assert(input_index < 16 || attr == input_index);
 107
 108       /* _NEW_LIGHT | _NEW_PROGRAM */
 109       attr_overrides[input_index++] =
 110          get_attr_override(&vue_map, urb_entry_read_offset, attr,
 111                            ctx->VertexProgram._TwoSideEnabled);
 112    }
 113
 114    for (; attr < FRAG_ATTRIB_MAX; attr++)
 115       attr_overrides[input_index++] = 0;
 116
 117    BEGIN_BATCH(14);
 118    OUT_BATCH(_3DSTATE_SBE << 16 | (14 - 2));
 119    OUT_BATCH(dw1);
 120
 121    /* Output dwords 2 through 9 */
 122    for (i = 0; i < 8; i++) {
 123       OUT_BATCH(attr_overrides[i * 2] | attr_overrides[i * 2 + 1] << 16);
 124    }
 125
 126    OUT_BATCH(dw10); /* point sprite texcoord bitmask */
 127    OUT_BATCH(dw11); /* constant interp bitmask */
 128    OUT_BATCH(0); /* wrapshortest enables 0-7 */
 129    OUT_BATCH(0); /* wrapshortest enables 8-15 */
 130    ADVANCE_BATCH();
 131 }
 132
 133 const struct brw_tracked_state gen7_sbe_state = {
 134    .dirty = {
 135       .mesa  = (_NEW_LIGHT |
 136                 _NEW_POINT |
 137                 _NEW_PROGRAM |
 138                 _NEW_TRANSFORM),
 139       .brw   = (BRW_NEW_CONTEXT |
 140                 BRW_NEW_FRAGMENT_PROGRAM),
 141       .cache = CACHE_NEW_VS_PROG
 142    },
 143    .emit = upload_sbe_state,
 144 };
 145
 146 static void
 147 upload_sf_state(struct brw_context *brw)
 148 {
 149    struct intel_context *intel = &brw->intel;
 150    struct gl_context *ctx = &intel->ctx;
 151    uint32_t dw1, dw2, dw3;
 152    float point_size;
 153    /* _NEW_BUFFERS */
 154    bool render_to_fbo = brw->intel.ctx.DrawBuffer->Name != 0;
 155
 156    dw1 = GEN6_SF_STATISTICS_ENABLE | GEN6_SF_VIEWPORT_TRANSFORM_ENABLE;
 157
 158    /* _NEW_BUFFERS */
 159    dw1 |= (brw_depthbuffer_format(brw) << GEN7_SF_DEPTH_BUFFER_SURFACE_FORMAT_SHIFT);
 160
 161    /* _NEW_POLYGON */
 162    if ((ctx->Polygon.FrontFace == GL_CCW) ^ render_to_fbo)
 163       dw1 |= GEN6_SF_WINDING_CCW;
 164
 165    if (ctx->Polygon.OffsetFill)
 166        dw1 |= GEN6_SF_GLOBAL_DEPTH_OFFSET_SOLID;
 167
 168    if (ctx->Polygon.OffsetLine)
 169        dw1 |= GEN6_SF_GLOBAL_DEPTH_OFFSET_WIREFRAME;
 170
 171    if (ctx->Polygon.OffsetPoint)
 172        dw1 |= GEN6_SF_GLOBAL_DEPTH_OFFSET_POINT;
 173
 174    switch (ctx->Polygon.FrontMode) {
 175    case GL_FILL:
 176        dw1 |= GEN6_SF_FRONT_SOLID;
 177        break;
 178
 179    case GL_LINE:
 180        dw1 |= GEN6_SF_FRONT_WIREFRAME;
 181        break;
 182
 183    case GL_POINT:
 184        dw1 |= GEN6_SF_FRONT_POINT;
 185        break;
 186
 187    default:
 188        assert(0);
 189        break;
 190    }
 191
 192    switch (ctx->Polygon.BackMode) {
 193    case GL_FILL:
 194        dw1 |= GEN6_SF_BACK_SOLID;
 195        break;
 196
 197    case GL_LINE:
 198        dw1 |= GEN6_SF_BACK_WIREFRAME;
 199        break;
 200
 201    case GL_POINT:
 202        dw1 |= GEN6_SF_BACK_POINT;
 203        break;
 204
 205    default:
 206        assert(0);
 207        break;
 208    }
 209
 210    dw2 = 0;
 211
 212    if (ctx->Polygon.CullFlag) {
 213       switch (ctx->Polygon.CullFaceMode) {
 214       case GL_FRONT:
 215          dw2 |= GEN6_SF_CULL_FRONT;
 216          break;
 217       case GL_BACK:
 218          dw2 |= GEN6_SF_CULL_BACK;
 219          break;
 220       case GL_FRONT_AND_BACK:
 221          dw2 |= GEN6_SF_CULL_BOTH;
 222          break;
 223       default:
 224          assert(0);
 225          break;
 226       }
 227    } else {
 228       dw2 |= GEN6_SF_CULL_NONE;
 229    }
 230
 231    /* _NEW_SCISSOR */
 232    if (ctx->Scissor.Enabled)
 233       dw2 |= GEN6_SF_SCISSOR_ENABLE;
 234
 235    /* _NEW_LINE */
 236    dw2 |= U_FIXED(CLAMP(ctx->Line.Width, 0.0, 7.99), 7) <<
 237       GEN6_SF_LINE_WIDTH_SHIFT;
 238    if (ctx->Line.SmoothFlag) {
 239       dw2 |= GEN6_SF_LINE_AA_ENABLE;
 240       dw2 |= GEN6_SF_LINE_AA_MODE_TRUE;
 241       dw2 |= GEN6_SF_LINE_END_CAP_WIDTH_1_0;
 242    }
 243
 244    /* FINISHME: Last Pixel Enable?  Vertex Sub Pixel Precision Select?
 245     * FINISHME: AA Line Distance Mode?
 246     */
 247
 248    dw3 = 0;
 249
 250    /* _NEW_POINT */
 251    if (!(ctx->VertexProgram.PointSizeEnabled || ctx->Point._Attenuated))
 252       dw3 |= GEN6_SF_USE_STATE_POINT_WIDTH;
 253
 254    /* Clamp to ARB_point_parameters user limits */
 255    point_size = CLAMP(ctx->Point.Size, ctx->Point.MinSize, ctx->Point.MaxSize);
 256
 257    /* Clamp to the hardware limits and convert to fixed point */
 258    dw3 |= U_FIXED(CLAMP(point_size, 0.125, 255.875), 3);
 259
 260    /* _NEW_LIGHT */
 261    if (ctx->Light.ProvokingVertex != GL_FIRST_VERTEX_CONVENTION) {
 262       dw3 |=
 263          (2 << GEN6_SF_TRI_PROVOKE_SHIFT) |
 264          (2 << GEN6_SF_TRIFAN_PROVOKE_SHIFT) |
 265          (1 << GEN6_SF_LINE_PROVOKE_SHIFT);
 266    } else {
 267       dw3 |= (1 << GEN6_SF_TRIFAN_PROVOKE_SHIFT);
 268    }
 269
 270    BEGIN_BATCH(7);
 271    OUT_BATCH(_3DSTATE_SF << 16 | (7 - 2));
 272    OUT_BATCH(dw1);
 273    OUT_BATCH(dw2);
 274    OUT_BATCH(dw3);
 275    OUT_BATCH_F(ctx->Polygon.OffsetUnits * 2); /* constant.  copied from gen4 */
 276    OUT_BATCH_F(ctx->Polygon.OffsetFactor); /* scale */
 277    OUT_BATCH_F(0.0); /* XXX: global depth offset clamp */
 278    ADVANCE_BATCH();
 279 }
 280
 281 const struct brw_tracked_state gen7_sf_state = {
 282    .dirty = {
 283       .mesa  = (_NEW_LIGHT |
 284                 _NEW_PROGRAM |
 285                 _NEW_POLYGON |
 286                 _NEW_LINE |
 287                 _NEW_SCISSOR |
 288                 _NEW_BUFFERS |
 289                 _NEW_POINT),
 290       .brw   = (BRW_NEW_CONTEXT),
 291       .cache = CACHE_NEW_VS_PROG
 292    },
 293    .emit = upload_sf_state,
 294 };