src/mesa/drivers/dri/i965/gen7_sf_state.c

   1 /*
   2  * Copyright © 2011 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "brw_context.h"
  25 #include "brw_state.h"
  26 #include "brw_defines.h"
  27 #include "brw_util.h"
  28 #include "main/macros.h"
  29 #include "main/fbobject.h"
  30 #include "intel_batchbuffer.h"
  31
  32 static void
  33 upload_sbe_state(struct brw_context *brw)
  34 {
  35    struct intel_context *intel = &brw->intel;
  36    struct gl_context *ctx = &intel->ctx;
  37    /* BRW_NEW_FRAGMENT_PROGRAM */
  38    uint32_t num_outputs = _mesa_bitcount_64(brw->fragment_program->Base.InputsRead);
  39    /* _NEW_LIGHT */
  40    bool shade_model_flat = ctx->Light.ShadeModel == GL_FLAT;
  41    uint32_t dw1, dw10, dw11;
  42    int i;
  43    int attr = 0, input_index = 0;
  44    int urb_entry_read_offset = 1;
  45    uint16_t attr_overrides[VARYING_SLOT_MAX];
  46    /* _NEW_BUFFERS */
  47    bool render_to_fbo = _mesa_is_user_fbo(ctx->DrawBuffer);
  48    uint32_t point_sprite_origin;
  49
  50    /* FINISHME: Attribute Swizzle Control Mode? */
  51    dw1 = GEN7_SBE_SWIZZLE_ENABLE | num_outputs << GEN7_SBE_NUM_OUTPUTS_SHIFT;
  52
  53    /* _NEW_POINT
  54     *
  55     * Window coordinates in an FBO are inverted, which means point
  56     * sprite origin must be inverted.
  57     */
  58    if ((ctx->Point.SpriteOrigin == GL_LOWER_LEFT) != render_to_fbo) {
  59       point_sprite_origin = GEN6_SF_POINT_SPRITE_LOWERLEFT;
  60    } else {
  61       point_sprite_origin = GEN6_SF_POINT_SPRITE_UPPERLEFT;
  62    }
  63    dw1 |= point_sprite_origin;
  64
  65
  66    dw10 = 0;
  67    dw11 = 0;
  68
  69    /* Create the mapping from the FS inputs we produce to the VS outputs
  70     * they source from.
  71     */
  72    uint32_t max_source_attr = 0;
  73    for (; attr < VARYING_SLOT_MAX; attr++) {
  74       enum glsl_interp_qualifier interp_qualifier =
  75          brw->fragment_program->InterpQualifier[attr];
  76       bool is_gl_Color = attr == VARYING_SLOT_COL0 || attr == VARYING_SLOT_COL1;
  77
  78       if (!(brw->fragment_program->Base.InputsRead & BITFIELD64_BIT(attr)))
  79          continue;
  80
  81       if (ctx->Point.PointSprite &&
  82           attr >= VARYING_SLOT_TEX0 && attr <= VARYING_SLOT_TEX7 &&
  83           ctx->Point.CoordReplace[attr - VARYING_SLOT_TEX0]) {
  84          dw10 |= (1 << input_index);
  85       }
  86
  87       if (attr == VARYING_SLOT_PNTC)
  88          dw10 |= (1 << input_index);
  89
  90       /* flat shading */
  91       if (interp_qualifier == INTERP_QUALIFIER_FLAT ||
  92           (shade_model_flat && is_gl_Color &&
  93            interp_qualifier == INTERP_QUALIFIER_NONE))
  94          dw11 |= (1 << input_index);
  95
  96       /* The hardware can only do the overrides on 16 overrides at a
  97        * time, and the other up to 16 have to be lined up so that the
  98        * input index = the output index.  We'll need to do some
  99        * tweaking to make sure that's the case.
 100        */
 101       assert(input_index < 16 || attr == input_index);
 102
 103       /* BRW_NEW_VUE_MAP_GEOM_OUT | _NEW_LIGHT | _NEW_PROGRAM */
 104       attr_overrides[input_index++] =
 105          get_attr_override(&brw->vue_map_geom_out,
 106                            urb_entry_read_offset, attr,
 107                            ctx->VertexProgram._TwoSideEnabled,
 108                            &max_source_attr);
 109    }
 110
 111    /* From the Ivy Bridge PRM, Volume 2, Part 1, documentation for
 112     * 3DSTATE_SBE DWord 1 bits 15:11, "Vertex URB Entry Read Length":
 113     *
 114     * "This field should be set to the minimum length required to read the
 115     *  maximum source attribute.  The maximum source attribute is indicated
 116     *  by the maximum value of the enabled Attribute # Source Attribute if
 117     *  Attribute Swizzle Enable is set, Number of Output Attributes-1 if
 118     *  enable is not set.
 119     *
 120     *  read_length = ceiling((max_source_attr + 1) / 2)"
 121     */
 122    uint32_t urb_entry_read_length = ALIGN(max_source_attr + 1, 2) / 2;
 123    dw1 |= urb_entry_read_length << GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT |
 124           urb_entry_read_offset << GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT;
 125
 126    for (; input_index < VARYING_SLOT_MAX; input_index++)
 127       attr_overrides[input_index] = 0;
 128
 129    BEGIN_BATCH(14);
 130    OUT_BATCH(_3DSTATE_SBE << 16 | (14 - 2));
 131    OUT_BATCH(dw1);
 132
 133    /* Output dwords 2 through 9 */
 134    for (i = 0; i < 8; i++) {
 135       OUT_BATCH(attr_overrides[i * 2] | attr_overrides[i * 2 + 1] << 16);
 136    }
 137
 138    OUT_BATCH(dw10); /* point sprite texcoord bitmask */
 139    OUT_BATCH(dw11); /* constant interp bitmask */
 140    OUT_BATCH(0); /* wrapshortest enables 0-7 */
 141    OUT_BATCH(0); /* wrapshortest enables 8-15 */
 142    ADVANCE_BATCH();
 143 }
 144
 145 const struct brw_tracked_state gen7_sbe_state = {
 146    .dirty = {
 147       .mesa  = (_NEW_BUFFERS |
 148                 _NEW_LIGHT |
 149                 _NEW_POINT |
 150                 _NEW_PROGRAM),
 151       .brw   = (BRW_NEW_CONTEXT |
 152                 BRW_NEW_FRAGMENT_PROGRAM |
 153                 BRW_NEW_VUE_MAP_GEOM_OUT)
 154    },
 155    .emit = upload_sbe_state,
 156 };
 157
 158 static void
 159 upload_sf_state(struct brw_context *brw)
 160 {
 161    struct intel_context *intel = &brw->intel;
 162    struct gl_context *ctx = &intel->ctx;
 163    uint32_t dw1, dw2, dw3;
 164    float point_size;
 165    /* _NEW_BUFFERS */
 166    bool render_to_fbo = _mesa_is_user_fbo(brw->intel.ctx.DrawBuffer);
 167    bool multisampled_fbo = ctx->DrawBuffer->Visual.samples > 1;
 168
 169    dw1 = GEN6_SF_STATISTICS_ENABLE |
 170          GEN6_SF_VIEWPORT_TRANSFORM_ENABLE;
 171
 172    /* _NEW_BUFFERS */
 173    dw1 |= (brw_depthbuffer_format(brw) << GEN7_SF_DEPTH_BUFFER_SURFACE_FORMAT_SHIFT);
 174
 175    /* _NEW_POLYGON */
 176    if ((ctx->Polygon.FrontFace == GL_CCW) ^ render_to_fbo)
 177       dw1 |= GEN6_SF_WINDING_CCW;
 178
 179    if (ctx->Polygon.OffsetFill)
 180        dw1 |= GEN6_SF_GLOBAL_DEPTH_OFFSET_SOLID;
 181
 182    if (ctx->Polygon.OffsetLine)
 183        dw1 |= GEN6_SF_GLOBAL_DEPTH_OFFSET_WIREFRAME;
 184
 185    if (ctx->Polygon.OffsetPoint)
 186        dw1 |= GEN6_SF_GLOBAL_DEPTH_OFFSET_POINT;
 187
 188    switch (ctx->Polygon.FrontMode) {
 189    case GL_FILL:
 190        dw1 |= GEN6_SF_FRONT_SOLID;
 191        break;
 192
 193    case GL_LINE:
 194        dw1 |= GEN6_SF_FRONT_WIREFRAME;
 195        break;
 196
 197    case GL_POINT:
 198        dw1 |= GEN6_SF_FRONT_POINT;
 199        break;
 200
 201    default:
 202        assert(0);
 203        break;
 204    }
 205
 206    switch (ctx->Polygon.BackMode) {
 207    case GL_FILL:
 208        dw1 |= GEN6_SF_BACK_SOLID;
 209        break;
 210
 211    case GL_LINE:
 212        dw1 |= GEN6_SF_BACK_WIREFRAME;
 213        break;
 214
 215    case GL_POINT:
 216        dw1 |= GEN6_SF_BACK_POINT;
 217        break;
 218
 219    default:
 220        assert(0);
 221        break;
 222    }
 223
 224    dw2 = 0;
 225
 226    if (ctx->Polygon.CullFlag) {
 227       switch (ctx->Polygon.CullFaceMode) {
 228       case GL_FRONT:
 229          dw2 |= GEN6_SF_CULL_FRONT;
 230          break;
 231       case GL_BACK:
 232          dw2 |= GEN6_SF_CULL_BACK;
 233          break;
 234       case GL_FRONT_AND_BACK:
 235          dw2 |= GEN6_SF_CULL_BOTH;
 236          break;
 237       default:
 238          assert(0);
 239          break;
 240       }
 241    } else {
 242       dw2 |= GEN6_SF_CULL_NONE;
 243    }
 244
 245    /* _NEW_SCISSOR */
 246    if (ctx->Scissor.Enabled)
 247       dw2 |= GEN6_SF_SCISSOR_ENABLE;
 248
 249    /* _NEW_LINE */
 250    {
 251       uint32_t line_width_u3_7 = U_FIXED(CLAMP(ctx->Line.Width, 0.0, 7.99), 7);
 252       /* TODO: line width of 0 is not allowed when MSAA enabled */
 253       if (line_width_u3_7 == 0)
 254          line_width_u3_7 = 1;
 255       dw2 |= line_width_u3_7 << GEN6_SF_LINE_WIDTH_SHIFT;
 256    }
 257    if (ctx->Line.SmoothFlag) {
 258       dw2 |= GEN6_SF_LINE_AA_ENABLE;
 259       dw2 |= GEN6_SF_LINE_END_CAP_WIDTH_1_0;
 260    }
 261    if (ctx->Line.StippleFlag && intel->is_haswell) {
 262       dw2 |= HSW_SF_LINE_STIPPLE_ENABLE;
 263    }
 264    /* _NEW_MULTISAMPLE */
 265    if (multisampled_fbo && ctx->Multisample.Enabled)
 266       dw2 |= GEN6_SF_MSRAST_ON_PATTERN;
 267
 268    /* FINISHME: Last Pixel Enable?  Vertex Sub Pixel Precision Select?
 269     */
 270
 271    dw3 = GEN6_SF_LINE_AA_MODE_TRUE;
 272
 273    /* _NEW_PROGRAM | _NEW_POINT */
 274    if (!(ctx->VertexProgram.PointSizeEnabled || ctx->Point._Attenuated))
 275       dw3 |= GEN6_SF_USE_STATE_POINT_WIDTH;
 276
 277    /* Clamp to ARB_point_parameters user limits */
 278    point_size = CLAMP(ctx->Point.Size, ctx->Point.MinSize, ctx->Point.MaxSize);
 279
 280    /* Clamp to the hardware limits and convert to fixed point */
 281    dw3 |= U_FIXED(CLAMP(point_size, 0.125, 255.875), 3);
 282
 283    /* _NEW_LIGHT */
 284    if (ctx->Light.ProvokingVertex != GL_FIRST_VERTEX_CONVENTION) {
 285       dw3 |=
 286          (2 << GEN6_SF_TRI_PROVOKE_SHIFT) |
 287          (2 << GEN6_SF_TRIFAN_PROVOKE_SHIFT) |
 288          (1 << GEN6_SF_LINE_PROVOKE_SHIFT);
 289    } else {
 290       dw3 |= (1 << GEN6_SF_TRIFAN_PROVOKE_SHIFT);
 291    }
 292
 293    BEGIN_BATCH(7);
 294    OUT_BATCH(_3DSTATE_SF << 16 | (7 - 2));
 295    OUT_BATCH(dw1);
 296    OUT_BATCH(dw2);
 297    OUT_BATCH(dw3);
 298    OUT_BATCH_F(ctx->Polygon.OffsetUnits * 2); /* constant.  copied from gen4 */
 299    OUT_BATCH_F(ctx->Polygon.OffsetFactor); /* scale */
 300    OUT_BATCH_F(0.0); /* XXX: global depth offset clamp */
 301    ADVANCE_BATCH();
 302 }
 303
 304 const struct brw_tracked_state gen7_sf_state = {
 305    .dirty = {
 306       .mesa  = (_NEW_LIGHT |
 307                 _NEW_PROGRAM |
 308                 _NEW_POLYGON |
 309                 _NEW_LINE |
 310                 _NEW_SCISSOR |
 311                 _NEW_BUFFERS |
 312                 _NEW_POINT |
 313                 _NEW_MULTISAMPLE),
 314       .brw   = BRW_NEW_CONTEXT,
 315       .cache = CACHE_NEW_VS_PROG
 316    },
 317    .emit = upload_sf_state,
 318 };