src/mesa/drivers/dri/i965/gen7_sol_state.c

   1 /*
   2  * Copyright © 2011 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 /**
  25  * @file gen7_sol_state.c
  26  *
  27  * Controls the stream output logic (SOL) stage of the gen7 hardware, which is
  28  * used to implement GL_EXT_transform_feedback.
  29  */
  30
  31 #include "brw_context.h"
  32 #include "brw_state.h"
  33 #include "brw_defines.h"
  34 #include "intel_batchbuffer.h"
  35 #include "intel_buffer_objects.h"
  36 #include "main/transformfeedback.h"
  37
  38 static void
  39 upload_3dstate_so_buffers(struct brw_context *brw)
  40 {
  41    struct intel_context *intel = &brw->intel;
  42    struct gl_context *ctx = &intel->ctx;
  43    /* BRW_NEW_VERTEX_PROGRAM */
  44    const struct gl_shader_program *vs_prog =
  45       ctx->Shader.CurrentVertexProgram;
  46    const struct gl_transform_feedback_info *linked_xfb_info =
  47       &vs_prog->LinkedTransformFeedback;
  48    /* BRW_NEW_TRANSFORM_FEEDBACK */
  49    struct gl_transform_feedback_object *xfb_obj =
  50       ctx->TransformFeedback.CurrentObject;
  51    int i;
  52
  53    /* Set up the up to 4 output buffers.  These are the ranges defined in the
  54     * gl_transform_feedback_object.
  55     */
  56    for (i = 0; i < 4; i++) {
  57       struct intel_buffer_object *bufferobj =
  58          intel_buffer_object(xfb_obj->Buffers[i]);
  59       drm_intel_bo *bo;
  60       uint32_t start, end;
  61       uint32_t stride;
  62
  63       if (!xfb_obj->Buffers[i]) {
  64          /* The pitch of 0 in this command indicates that the buffer is
  65           * unbound and won't be written to.
  66           */
  67          BEGIN_BATCH(4);
  68          OUT_BATCH(_3DSTATE_SO_BUFFER << 16 | (4 - 2));
  69          OUT_BATCH((i << SO_BUFFER_INDEX_SHIFT));
  70          OUT_BATCH(0);
  71          OUT_BATCH(0);
  72          ADVANCE_BATCH();
  73
  74          continue;
  75       }
  76
  77       bo = intel_bufferobj_buffer(intel, bufferobj, INTEL_WRITE_PART);
  78       stride = linked_xfb_info->BufferStride[i] * 4;
  79
  80       start = xfb_obj->Offset[i];
  81       assert(start % 4 == 0);
  82       end = ALIGN(start + xfb_obj->Size[i], 4);
  83       assert(end <= bo->size);
  84
  85       BEGIN_BATCH(4);
  86       OUT_BATCH(_3DSTATE_SO_BUFFER << 16 | (4 - 2));
  87       OUT_BATCH((i << SO_BUFFER_INDEX_SHIFT) | stride);
  88       OUT_RELOC(bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, start);
  89       OUT_RELOC(bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, end);
  90       ADVANCE_BATCH();
  91    }
  92 }
  93
  94 /**
  95  * Outputs the 3DSTATE_SO_DECL_LIST command.
  96  *
  97  * The data output is a series of 64-bit entries containing a SO_DECL per
  98  * stream.  We only have one stream of rendering coming out of the GS unit, so
  99  * we only emit stream 0 (low 16 bits) SO_DECLs.
 100  */
 101 static void
 102 upload_3dstate_so_decl_list(struct brw_context *brw,
 103                             const struct brw_vue_map *vue_map)
 104 {
 105    struct intel_context *intel = &brw->intel;
 106    struct gl_context *ctx = &intel->ctx;
 107    /* BRW_NEW_VERTEX_PROGRAM */
 108    const struct gl_shader_program *vs_prog =
 109       ctx->Shader.CurrentVertexProgram;
 110    /* BRW_NEW_TRANSFORM_FEEDBACK */
 111    const struct gl_transform_feedback_info *linked_xfb_info =
 112       &vs_prog->LinkedTransformFeedback;
 113    int i;
 114    uint16_t so_decl[128];
 115    int buffer_mask = 0;
 116    int next_offset[4] = {0, 0, 0, 0};
 117
 118    STATIC_ASSERT(ARRAY_SIZE(so_decl) >= MAX_PROGRAM_OUTPUTS);
 119
 120    /* Construct the list of SO_DECLs to be emitted.  The formatting of the
 121     * command is feels strange -- each dword pair contains a SO_DECL per stream.
 122     */
 123    for (i = 0; i < linked_xfb_info->NumOutputs; i++) {
 124       int buffer = linked_xfb_info->Outputs[i].OutputBuffer;
 125       uint16_t decl = 0;
 126       int varying = linked_xfb_info->Outputs[i].OutputRegister;
 127       unsigned component_mask =
 128          (1 << linked_xfb_info->Outputs[i].NumComponents) - 1;
 129
 130       /* gl_PointSize is stored in VARYING_SLOT_PSIZ.w. */
 131       if (varying == VARYING_SLOT_PSIZ) {
 132          assert(linked_xfb_info->Outputs[i].NumComponents == 1);
 133          component_mask <<= 3;
 134       } else {
 135          component_mask <<= linked_xfb_info->Outputs[i].ComponentOffset;
 136       }
 137
 138       buffer_mask |= 1 << buffer;
 139
 140       decl |= buffer << SO_DECL_OUTPUT_BUFFER_SLOT_SHIFT;
 141       decl |= vue_map->varying_to_slot[varying] <<
 142          SO_DECL_REGISTER_INDEX_SHIFT;
 143       decl |= component_mask << SO_DECL_COMPONENT_MASK_SHIFT;
 144
 145       /* This assert should be true until GL_ARB_transform_feedback_instanced
 146        * is added and we start using the hole flag.
 147        */
 148       assert(linked_xfb_info->Outputs[i].DstOffset == next_offset[buffer]);
 149
 150       next_offset[buffer] += linked_xfb_info->Outputs[i].NumComponents;
 151
 152       so_decl[i] = decl;
 153    }
 154
 155    BEGIN_BATCH(linked_xfb_info->NumOutputs * 2 + 3);
 156    OUT_BATCH(_3DSTATE_SO_DECL_LIST << 16 |
 157              (linked_xfb_info->NumOutputs * 2 + 1));
 158
 159    OUT_BATCH((buffer_mask << SO_STREAM_TO_BUFFER_SELECTS_0_SHIFT) |
 160              (0 << SO_STREAM_TO_BUFFER_SELECTS_1_SHIFT) |
 161              (0 << SO_STREAM_TO_BUFFER_SELECTS_2_SHIFT) |
 162              (0 << SO_STREAM_TO_BUFFER_SELECTS_3_SHIFT));
 163
 164    OUT_BATCH((linked_xfb_info->NumOutputs << SO_NUM_ENTRIES_0_SHIFT) |
 165              (0 << SO_NUM_ENTRIES_1_SHIFT) |
 166              (0 << SO_NUM_ENTRIES_2_SHIFT) |
 167              (0 << SO_NUM_ENTRIES_3_SHIFT));
 168
 169    for (i = 0; i < linked_xfb_info->NumOutputs; i++) {
 170       OUT_BATCH(so_decl[i]);
 171       OUT_BATCH(0);
 172    }
 173
 174    ADVANCE_BATCH();
 175 }
 176
 177 static void
 178 upload_3dstate_streamout(struct brw_context *brw, bool active,
 179                          const struct brw_vue_map *vue_map)
 180 {
 181    struct intel_context *intel = &brw->intel;
 182    struct gl_context *ctx = &intel->ctx;
 183    /* BRW_NEW_TRANSFORM_FEEDBACK */
 184    struct gl_transform_feedback_object *xfb_obj =
 185       ctx->TransformFeedback.CurrentObject;
 186    uint32_t dw1 = 0, dw2 = 0;
 187    int i;
 188
 189    if (active) {
 190       int urb_entry_read_offset = 0;
 191       int urb_entry_read_length = (vue_map->num_slots + 1) / 2 -
 192          urb_entry_read_offset;
 193
 194       dw1 |= SO_FUNCTION_ENABLE;
 195       dw1 |= SO_STATISTICS_ENABLE;
 196
 197       /* _NEW_LIGHT */
 198       if (ctx->Light.ProvokingVertex != GL_FIRST_VERTEX_CONVENTION)
 199          dw1 |= SO_REORDER_TRAILING;
 200
 201       for (i = 0; i < 4; i++) {
 202          if (xfb_obj->Buffers[i]) {
 203             dw1 |= SO_BUFFER_ENABLE(i);
 204          }
 205       }
 206
 207       /* We always read the whole vertex.  This could be reduced at some
 208        * point by reading less and offsetting the register index in the
 209        * SO_DECLs.
 210        */
 211       dw2 |= urb_entry_read_offset << SO_STREAM_0_VERTEX_READ_OFFSET_SHIFT;
 212       dw2 |= (urb_entry_read_length - 1) <<
 213          SO_STREAM_0_VERTEX_READ_LENGTH_SHIFT;
 214    }
 215
 216    BEGIN_BATCH(3);
 217    OUT_BATCH(_3DSTATE_STREAMOUT << 16 | (3 - 2));
 218    OUT_BATCH(dw1);
 219    OUT_BATCH(dw2);
 220    ADVANCE_BATCH();
 221 }
 222
 223 static void
 224 upload_sol_state(struct brw_context *brw)
 225 {
 226    struct intel_context *intel = &brw->intel;
 227    struct gl_context *ctx = &intel->ctx;
 228    /* BRW_NEW_TRANSFORM_FEEDBACK */
 229    bool active = _mesa_is_xfb_active_and_unpaused(ctx);
 230
 231    if (active) {
 232       upload_3dstate_so_buffers(brw);
 233       /* BRW_NEW_VUE_MAP_GEOM_OUT */
 234       upload_3dstate_so_decl_list(brw, &brw->vue_map_geom_out);
 235    }
 236
 237    /* Finally, set up the SOL stage.  This command must always follow updates to
 238     * the nonpipelined SOL state (3DSTATE_SO_BUFFER, 3DSTATE_SO_DECL_LIST) or
 239     * MMIO register updates (current performed by the kernel at each batch
 240     * emit).
 241     */
 242    upload_3dstate_streamout(brw, active, &brw->vue_map_geom_out);
 243 }
 244
 245 const struct brw_tracked_state gen7_sol_state = {
 246    .dirty = {
 247       .mesa  = (_NEW_LIGHT),
 248       .brw   = (BRW_NEW_BATCH |
 249                 BRW_NEW_VERTEX_PROGRAM |
 250                 BRW_NEW_VUE_MAP_GEOM_OUT |
 251                 BRW_NEW_TRANSFORM_FEEDBACK)
 252    },
 253    .emit = upload_sol_state,
 254 };
 255
 256 void
 257 gen7_begin_transform_feedback(struct gl_context *ctx, GLenum mode,
 258                               struct gl_transform_feedback_object *obj)
 259 {
 260    struct brw_context *brw = brw_context(ctx);
 261    struct intel_context *intel = &brw->intel;
 262
 263    intel_batchbuffer_flush(intel);
 264    intel->batch.needs_sol_reset = true;
 265 }
 266
 267 void
 268 gen7_end_transform_feedback(struct gl_context *ctx,
 269                             struct gl_transform_feedback_object *obj)
 270 {
 271    /* Because we have to rely on the kernel to reset our SO write offsets, and
 272     * we only get to do it once per batchbuffer, flush the batch after feedback
 273     * so another transform feedback can get the write offset reset it needs.
 274     *
 275     * This also covers any cache flushing required.
 276     */
 277    struct brw_context *brw = brw_context(ctx);
 278    struct intel_context *intel = &brw->intel;
 279
 280    intel_batchbuffer_flush(intel);
 281 }