src/mesa/drivers/dri/i965/gen7_vs_state.c

   1 /*
   2  * Copyright © 2011 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "brw_context.h"
  25 #include "brw_state.h"
  26 #include "brw_defines.h"
  27 #include "brw_util.h"
  28 #include "program/prog_parameter.h"
  29 #include "program/prog_statevars.h"
  30 #include "intel_batchbuffer.h"
  31
  32 static void
  33 upload_vs_state(struct brw_context *brw)
  34 {
  35    const struct brw_stage_state *stage_state = &brw->vs.base;
  36    uint32_t floating_point_mode = 0;
  37    const int max_threads_shift = brw->is_haswell ?
  38       HSW_VS_MAX_THREADS_SHIFT : GEN6_VS_MAX_THREADS_SHIFT;
  39    const struct brw_vue_prog_data *prog_data = &brw->vs.prog_data->base;
  40
  41    if (!brw->is_haswell && !brw->is_baytrail)
  42       gen7_emit_vs_workaround_flush(brw);
  43
  44    if (brw->vs.prog_data->base.base.use_alt_mode)
  45       floating_point_mode = GEN6_VS_FLOATING_POINT_MODE_ALT;
  46
  47    BEGIN_BATCH(6);
  48    OUT_BATCH(_3DSTATE_VS << 16 | (6 - 2));
  49    OUT_BATCH(stage_state->prog_offset);
  50    OUT_BATCH(floating_point_mode |
  51              ((ALIGN(stage_state->sampler_count, 4)/4) <<
  52               GEN6_VS_SAMPLER_COUNT_SHIFT) |
  53              ((brw->vs.prog_data->base.base.binding_table.size_bytes / 4) <<
  54               GEN6_VS_BINDING_TABLE_ENTRY_COUNT_SHIFT));
  55
  56    if (prog_data->base.total_scratch) {
  57       OUT_RELOC(stage_state->scratch_bo,
  58                 I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
  59                 ffs(stage_state->per_thread_scratch) - 11);
  60    } else {
  61       OUT_BATCH(0);
  62    }
  63
  64    OUT_BATCH((prog_data->base.dispatch_grf_start_reg <<
  65               GEN6_VS_DISPATCH_START_GRF_SHIFT) |
  66              (prog_data->urb_read_length << GEN6_VS_URB_READ_LENGTH_SHIFT) |
  67              (0 << GEN6_VS_URB_ENTRY_READ_OFFSET_SHIFT));
  68
  69    OUT_BATCH(((brw->max_vs_threads - 1) << max_threads_shift) |
  70              GEN6_VS_STATISTICS_ENABLE |
  71              GEN6_VS_ENABLE);
  72    ADVANCE_BATCH();
  73 }
  74
  75 const struct brw_tracked_state gen7_vs_state = {
  76    .dirty = {
  77       .mesa  = _NEW_TRANSFORM,
  78       .brw   = BRW_NEW_BATCH |
  79                BRW_NEW_BLORP |
  80                BRW_NEW_CONTEXT |
  81                BRW_NEW_VS_PROG_DATA,
  82    },
  83    .emit = upload_vs_state,
  84 };