mesa/i965/i915/r200: eliminate gl_vertex_program
[mesa.git] / src / mesa / drivers / dri / i965 / gen7_wm_surface_state.c
1 /*
2 * Copyright © 2011 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23 #include "main/mtypes.h"
24 #include "main/blend.h"
25 #include "main/samplerobj.h"
26 #include "main/texformat.h"
27 #include "main/teximage.h"
28 #include "program/prog_parameter.h"
29 #include "program/prog_instruction.h"
30
31 #include "intel_mipmap_tree.h"
32 #include "intel_batchbuffer.h"
33 #include "intel_tex.h"
34 #include "intel_fbo.h"
35 #include "intel_buffer_objects.h"
36
37 #include "brw_context.h"
38 #include "brw_state.h"
39 #include "brw_defines.h"
40 #include "brw_wm.h"
41
42 void
43 gen7_check_surface_setup(uint32_t *surf, bool is_render_target)
44 {
45 unsigned num_multisamples = surf[4] & INTEL_MASK(5, 3);
46 unsigned multisampled_surface_storage_format = surf[4] & (1 << 6);
47 unsigned surface_array_spacing = surf[0] & (1 << 10);
48 bool is_multisampled = num_multisamples != GEN7_SURFACE_MULTISAMPLECOUNT_1;
49
50 (void) surface_array_spacing;
51
52 /* From the Ivybridge PRM, Volume 4 Part 1, page 66 (RENDER_SURFACE_STATE
53 * dword 0 bit 10 "Surface Array Spacing" Programming Notes):
54 *
55 * If Multisampled Surface Storage Format is MSFMT_MSS and Number of
56 * Multisamples is not MULTISAMPLECOUNT_1, this field must be set to
57 * ARYSPC_LOD0.
58 */
59 if (multisampled_surface_storage_format == GEN7_SURFACE_MSFMT_MSS
60 && is_multisampled)
61 assert(surface_array_spacing == GEN7_SURFACE_ARYSPC_LOD0);
62
63 /* From the Ivybridge PRM, Volume 4 Part 1, page 72 (RENDER_SURFACE_STATE
64 * dword 4 bit 6 "Multisampled Surface Storage" Programming Notes):
65 *
66 * All multisampled render target surfaces must have this field set to
67 * MSFMT_MSS.
68 *
69 * But also:
70 *
71 * This field is ignored if Number of Multisamples is MULTISAMPLECOUNT_1.
72 */
73 if (is_render_target && is_multisampled) {
74 assert(multisampled_surface_storage_format == GEN7_SURFACE_MSFMT_MSS);
75 }
76
77 /* From the Ivybridge PRM, Volume 4 Part 1, page 72 (RENDER_SURFACE_STATE
78 * dword 4 bit 6 "Multisampled Surface Storage Format" Errata):
79 *
80 * If the surface’s Number of Multisamples is MULTISAMPLECOUNT_8, Width
81 * is >= 8192 (meaning the actual surface width is >= 8193 pixels), this
82 * field must be set to MSFMT_MSS.
83 */
84 uint32_t width = GET_FIELD(surf[2], GEN7_SURFACE_WIDTH) + 1;
85 if (num_multisamples == GEN7_SURFACE_MULTISAMPLECOUNT_8 && width >= 8193) {
86 assert(multisampled_surface_storage_format == GEN7_SURFACE_MSFMT_MSS);
87 }
88
89 /* From the Ivybridge PRM, Volume 4 Part 1, page 72 (RENDER_SURFACE_STATE
90 * dword 4 bit 6 "Multisampled Surface Storage Format" Errata):
91 *
92 * If the surface’s Number of Multisamples is MULTISAMPLECOUNT_8,
93 * ((Depth+1) * (Height+1)) is > 4,194,304, OR if the surface’s Number of
94 * Multisamples is MULTISAMPLECOUNT_4, ((Depth+1) * (Height+1)) is >
95 * 8,388,608, this field must be set to MSFMT_DEPTH_STENCIL.This field
96 * must be set to MSFMT_DEPTH_STENCIL if Surface Format is one of the
97 * following: I24X8_UNORM, L24X8_UNORM, A24X8_UNORM, or
98 * R24_UNORM_X8_TYPELESS.
99 *
100 * But also (from the Programming Notes):
101 *
102 * This field is ignored if Number of Multisamples is MULTISAMPLECOUNT_1.
103 */
104 uint32_t depth = GET_FIELD(surf[3], BRW_SURFACE_DEPTH) + 1;
105 uint32_t height = GET_FIELD(surf[2], GEN7_SURFACE_HEIGHT) + 1;
106 if (num_multisamples == GEN7_SURFACE_MULTISAMPLECOUNT_8 &&
107 depth * height > 4194304) {
108 assert(multisampled_surface_storage_format ==
109 GEN7_SURFACE_MSFMT_DEPTH_STENCIL);
110 }
111 if (num_multisamples == GEN7_SURFACE_MULTISAMPLECOUNT_4 &&
112 depth * height > 8388608) {
113 assert(multisampled_surface_storage_format ==
114 GEN7_SURFACE_MSFMT_DEPTH_STENCIL);
115 }
116 if (is_multisampled) {
117 switch (GET_FIELD(surf[0], BRW_SURFACE_FORMAT)) {
118 case BRW_SURFACEFORMAT_I24X8_UNORM:
119 case BRW_SURFACEFORMAT_L24X8_UNORM:
120 case BRW_SURFACEFORMAT_A24X8_UNORM:
121 case BRW_SURFACEFORMAT_R24_UNORM_X8_TYPELESS:
122 assert(multisampled_surface_storage_format ==
123 GEN7_SURFACE_MSFMT_DEPTH_STENCIL);
124 }
125 }
126 }
127
128 /**
129 * Creates a null surface.
130 *
131 * This is used when the shader doesn't write to any color output. An FB
132 * write to target 0 will still be emitted, because that's how the thread is
133 * terminated (and computed depth is returned), so we need to have the
134 * hardware discard the target 0 color output..
135 */
136 static void
137 gen7_emit_null_surface_state(struct brw_context *brw,
138 unsigned width,
139 unsigned height,
140 unsigned samples,
141 uint32_t *out_offset)
142 {
143 /* From the Ivy bridge PRM, Vol4 Part1 p62 (Surface Type: Programming
144 * Notes):
145 *
146 * A null surface is used in instances where an actual surface is not
147 * bound. When a write message is generated to a null surface, no
148 * actual surface is written to. When a read message (including any
149 * sampling engine message) is generated to a null surface, the result
150 * is all zeros. Note that a null surface type is allowed to be used
151 * with all messages, even if it is not specificially indicated as
152 * supported. All of the remaining fields in surface state are ignored
153 * for null surfaces, with the following exceptions: Width, Height,
154 * Depth, LOD, and Render Target View Extent fields must match the
155 * depth buffer’s corresponding state for all render target surfaces,
156 * including null.
157 */
158 uint32_t *surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE, 8 * 4, 32,
159 out_offset);
160 memset(surf, 0, 8 * 4);
161
162 /* From the Ivybridge PRM, Volume 4, Part 1, page 65,
163 * Tiled Surface: Programming Notes:
164 * "If Surface Type is SURFTYPE_NULL, this field must be TRUE."
165 */
166 surf[0] = BRW_SURFACE_NULL << BRW_SURFACE_TYPE_SHIFT |
167 BRW_SURFACEFORMAT_B8G8R8A8_UNORM << BRW_SURFACE_FORMAT_SHIFT |
168 GEN7_SURFACE_TILING_Y;
169
170 surf[2] = SET_FIELD(width - 1, GEN7_SURFACE_WIDTH) |
171 SET_FIELD(height - 1, GEN7_SURFACE_HEIGHT);
172
173 gen7_check_surface_setup(surf, true /* is_render_target */);
174 }
175
176 void
177 gen7_init_vtable_surface_functions(struct brw_context *brw)
178 {
179 brw->vtbl.update_renderbuffer_surface = brw_update_renderbuffer_surface;
180 brw->vtbl.emit_null_surface_state = gen7_emit_null_surface_state;
181 }