src/mesa/drivers/dri/i965/gen7_wm_surface_state.c

   1 /*
   2  * Copyright © 2011 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23 #include "main/mtypes.h"
  24 #include "main/blend.h"
  25 #include "main/samplerobj.h"
  26 #include "main/texformat.h"
  27 #include "main/teximage.h"
  28 #include "program/prog_parameter.h"
  29 #include "program/prog_instruction.h"
  30
  31 #include "intel_mipmap_tree.h"
  32 #include "intel_batchbuffer.h"
  33 #include "intel_tex.h"
  34 #include "intel_fbo.h"
  35 #include "intel_buffer_objects.h"
  36
  37 #include "brw_context.h"
  38 #include "brw_state.h"
  39 #include "brw_defines.h"
  40 #include "brw_wm.h"
  41
  42 void
  43 gen7_check_surface_setup(uint32_t *surf, bool is_render_target)
  44 {
  45    unsigned num_multisamples = surf[4] & INTEL_MASK(5, 3);
  46    unsigned multisampled_surface_storage_format = surf[4] & (1 << 6);
  47    unsigned surface_array_spacing = surf[0] & (1 << 10);
  48    bool is_multisampled = num_multisamples != GEN7_SURFACE_MULTISAMPLECOUNT_1;
  49
  50    (void) surface_array_spacing;
  51
  52    /* From the Ivybridge PRM, Volume 4 Part 1, page 66 (RENDER_SURFACE_STATE
  53     * dword 0 bit 10 "Surface Array Spacing" Programming Notes):
  54     *
  55     *   If Multisampled Surface Storage Format is MSFMT_MSS and Number of
  56     *   Multisamples is not MULTISAMPLECOUNT_1, this field must be set to
  57     *   ARYSPC_LOD0.
  58     */
  59    if (multisampled_surface_storage_format == GEN7_SURFACE_MSFMT_MSS
  60        && is_multisampled)
  61       assert(surface_array_spacing == GEN7_SURFACE_ARYSPC_LOD0);
  62
  63    /* From the Ivybridge PRM, Volume 4 Part 1, page 72 (RENDER_SURFACE_STATE
  64     * dword 4 bit 6 "Multisampled Surface Storage" Programming Notes):
  65     *
  66     *   All multisampled render target surfaces must have this field set to
  67     *   MSFMT_MSS.
  68     *
  69     * But also:
  70     *
  71     *   This field is ignored if Number of Multisamples is MULTISAMPLECOUNT_1.
  72     */
  73    if (is_render_target && is_multisampled) {
  74       assert(multisampled_surface_storage_format == GEN7_SURFACE_MSFMT_MSS);
  75    }
  76
  77    /* From the Ivybridge PRM, Volume 4 Part 1, page 72 (RENDER_SURFACE_STATE
  78     * dword 4 bit 6 "Multisampled Surface Storage Format" Errata):
  79     *
  80     *   If the surface’s Number of Multisamples is MULTISAMPLECOUNT_8, Width
  81     *   is >= 8192 (meaning the actual surface width is >= 8193 pixels), this
  82     *   field must be set to MSFMT_MSS.
  83     */
  84    uint32_t width = GET_FIELD(surf[2], GEN7_SURFACE_WIDTH) + 1;
  85    if (num_multisamples == GEN7_SURFACE_MULTISAMPLECOUNT_8 && width >= 8193) {
  86       assert(multisampled_surface_storage_format == GEN7_SURFACE_MSFMT_MSS);
  87    }
  88
  89    /* From the Ivybridge PRM, Volume 4 Part 1, page 72 (RENDER_SURFACE_STATE
  90     * dword 4 bit 6 "Multisampled Surface Storage Format" Errata):
  91     *
  92     *   If the surface’s Number of Multisamples is MULTISAMPLECOUNT_8,
  93     *   ((Depth+1) * (Height+1)) is > 4,194,304, OR if the surface’s Number of
  94     *   Multisamples is MULTISAMPLECOUNT_4, ((Depth+1) * (Height+1)) is >
  95     *   8,388,608, this field must be set to MSFMT_DEPTH_STENCIL.This field
  96     *   must be set to MSFMT_DEPTH_STENCIL if Surface Format is one of the
  97     *   following: I24X8_UNORM, L24X8_UNORM, A24X8_UNORM, or
  98     *   R24_UNORM_X8_TYPELESS.
  99     *
 100     * But also (from the Programming Notes):
 101     *
 102     *   This field is ignored if Number of Multisamples is MULTISAMPLECOUNT_1.
 103     */
 104    uint32_t depth = GET_FIELD(surf[3], BRW_SURFACE_DEPTH) + 1;
 105    uint32_t height = GET_FIELD(surf[2], GEN7_SURFACE_HEIGHT) + 1;
 106    if (num_multisamples == GEN7_SURFACE_MULTISAMPLECOUNT_8 &&
 107        depth * height > 4194304) {
 108       assert(multisampled_surface_storage_format ==
 109              GEN7_SURFACE_MSFMT_DEPTH_STENCIL);
 110    }
 111    if (num_multisamples == GEN7_SURFACE_MULTISAMPLECOUNT_4 &&
 112        depth * height > 8388608) {
 113       assert(multisampled_surface_storage_format ==
 114              GEN7_SURFACE_MSFMT_DEPTH_STENCIL);
 115    }
 116    if (is_multisampled) {
 117       switch (GET_FIELD(surf[0], BRW_SURFACE_FORMAT)) {
 118       case BRW_SURFACEFORMAT_I24X8_UNORM:
 119       case BRW_SURFACEFORMAT_L24X8_UNORM:
 120       case BRW_SURFACEFORMAT_A24X8_UNORM:
 121       case BRW_SURFACEFORMAT_R24_UNORM_X8_TYPELESS:
 122          assert(multisampled_surface_storage_format ==
 123                 GEN7_SURFACE_MSFMT_DEPTH_STENCIL);
 124       }
 125    }
 126 }
 127
 128 static void
 129 gen7_emit_buffer_surface_state(struct brw_context *brw,
 130                                uint32_t *out_offset,
 131                                drm_intel_bo *bo,
 132                                unsigned buffer_offset,
 133                                unsigned surface_format,
 134                                unsigned buffer_size,
 135                                unsigned pitch,
 136                                bool rw)
 137 {
 138    unsigned elements = buffer_size / pitch;
 139    uint32_t *surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
 140                                     8 * 4, 32, out_offset);
 141    memset(surf, 0, 8 * 4);
 142
 143    surf[0] = BRW_SURFACE_BUFFER << BRW_SURFACE_TYPE_SHIFT |
 144              surface_format << BRW_SURFACE_FORMAT_SHIFT |
 145              BRW_SURFACE_RC_READ_WRITE;
 146    surf[1] = (bo ? bo->offset64 : 0) + buffer_offset; /* reloc */
 147    surf[2] = SET_FIELD((elements - 1) & 0x7f, GEN7_SURFACE_WIDTH) |
 148              SET_FIELD(((elements - 1) >> 7) & 0x3fff, GEN7_SURFACE_HEIGHT);
 149    if (surface_format == BRW_SURFACEFORMAT_RAW)
 150       surf[3] = SET_FIELD(((elements - 1) >> 21) & 0x3ff, BRW_SURFACE_DEPTH);
 151    else
 152       surf[3] = SET_FIELD(((elements - 1) >> 21) & 0x3f, BRW_SURFACE_DEPTH);
 153    surf[3] |= (pitch - 1);
 154
 155    surf[5] = SET_FIELD(GEN7_MOCS_L3, GEN7_SURFACE_MOCS);
 156
 157    if (brw->is_haswell) {
 158       surf[7] |= (SET_FIELD(HSW_SCS_RED,   GEN7_SURFACE_SCS_R) |
 159                   SET_FIELD(HSW_SCS_GREEN, GEN7_SURFACE_SCS_G) |
 160                   SET_FIELD(HSW_SCS_BLUE,  GEN7_SURFACE_SCS_B) |
 161                   SET_FIELD(HSW_SCS_ALPHA, GEN7_SURFACE_SCS_A));
 162    }
 163
 164    /* Emit relocation to surface contents */
 165    if (bo) {
 166       drm_intel_bo_emit_reloc(brw->batch.bo, *out_offset + 4,
 167                               bo, buffer_offset, I915_GEM_DOMAIN_SAMPLER,
 168                               (rw ? I915_GEM_DOMAIN_SAMPLER : 0));
 169    }
 170
 171    gen7_check_surface_setup(surf, false /* is_render_target */);
 172 }
 173
 174 /**
 175  * Creates a null surface.
 176  *
 177  * This is used when the shader doesn't write to any color output.  An FB
 178  * write to target 0 will still be emitted, because that's how the thread is
 179  * terminated (and computed depth is returned), so we need to have the
 180  * hardware discard the target 0 color output..
 181  */
 182 static void
 183 gen7_emit_null_surface_state(struct brw_context *brw,
 184                              unsigned width,
 185                              unsigned height,
 186                              unsigned samples,
 187                              uint32_t *out_offset)
 188 {
 189    /* From the Ivy bridge PRM, Vol4 Part1 p62 (Surface Type: Programming
 190     * Notes):
 191     *
 192     *     A null surface is used in instances where an actual surface is not
 193     *     bound. When a write message is generated to a null surface, no
 194     *     actual surface is written to. When a read message (including any
 195     *     sampling engine message) is generated to a null surface, the result
 196     *     is all zeros. Note that a null surface type is allowed to be used
 197     *     with all messages, even if it is not specificially indicated as
 198     *     supported. All of the remaining fields in surface state are ignored
 199     *     for null surfaces, with the following exceptions: Width, Height,
 200     *     Depth, LOD, and Render Target View Extent fields must match the
 201     *     depth buffer’s corresponding state for all render target surfaces,
 202     *     including null.
 203     */
 204    uint32_t *surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE, 8 * 4, 32,
 205                                     out_offset);
 206    memset(surf, 0, 8 * 4);
 207
 208    /* From the Ivybridge PRM, Volume 4, Part 1, page 65,
 209     * Tiled Surface: Programming Notes:
 210     * "If Surface Type is SURFTYPE_NULL, this field must be TRUE."
 211     */
 212    surf[0] = BRW_SURFACE_NULL << BRW_SURFACE_TYPE_SHIFT |
 213              BRW_SURFACEFORMAT_B8G8R8A8_UNORM << BRW_SURFACE_FORMAT_SHIFT |
 214              GEN7_SURFACE_TILING_Y;
 215
 216    surf[2] = SET_FIELD(width - 1, GEN7_SURFACE_WIDTH) |
 217              SET_FIELD(height - 1, GEN7_SURFACE_HEIGHT);
 218
 219    gen7_check_surface_setup(surf, true /* is_render_target */);
 220 }
 221
 222 void
 223 gen7_init_vtable_surface_functions(struct brw_context *brw)
 224 {
 225    brw->vtbl.update_texture_surface = brw_update_texture_surface;
 226    brw->vtbl.update_renderbuffer_surface = brw_update_renderbuffer_surface;
 227    brw->vtbl.emit_null_surface_state = gen7_emit_null_surface_state;
 228    brw->vtbl.emit_buffer_surface_state = gen7_emit_buffer_surface_state;
 229 }