src/mesa/drivers/dri/i965/gen8_draw_upload.c

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "main/glheader.h"
  25 #include "main/bufferobj.h"
  26 #include "main/context.h"
  27 #include "main/enums.h"
  28 #include "main/macros.h"
  29
  30 #include "brw_draw.h"
  31 #include "brw_defines.h"
  32 #include "brw_context.h"
  33 #include "brw_state.h"
  34
  35 #include "intel_batchbuffer.h"
  36 #include "intel_buffer_objects.h"
  37
  38 static void
  39 gen8_emit_vertices(struct brw_context *brw)
  40 {
  41    struct gl_context *ctx = &brw->ctx;
  42    uint32_t mocs_wb = brw->gen >= 9 ? SKL_MOCS_WB : BDW_MOCS_WB;
  43    bool uses_edge_flag;
  44
  45    brw_prepare_vertices(brw);
  46    brw_prepare_shader_draw_parameters(brw);
  47
  48    uses_edge_flag = (ctx->Polygon.FrontMode != GL_FILL ||
  49                      ctx->Polygon.BackMode != GL_FILL);
  50
  51    if (brw->vs.prog_data->uses_vertexid || brw->vs.prog_data->uses_instanceid) {
  52       unsigned vue = brw->vb.nr_enabled;
  53
  54       /* The element for the edge flags must always be last, so we have to
  55        * insert the SGVS before it in that case.
  56        */
  57       if (uses_edge_flag) {
  58          assert(vue > 0);
  59          vue--;
  60       }
  61
  62       WARN_ONCE(vue >= 33,
  63                 "Trying to insert VID/IID past 33rd vertex element, "
  64                 "need to reorder the vertex attrbutes.");
  65
  66       unsigned dw1 = 0;
  67       if (brw->vs.prog_data->uses_vertexid) {
  68          dw1 |= GEN8_SGVS_ENABLE_VERTEX_ID |
  69                 (2 << GEN8_SGVS_VERTEX_ID_COMPONENT_SHIFT) |  /* .z channel */
  70                 (vue << GEN8_SGVS_VERTEX_ID_ELEMENT_OFFSET_SHIFT);
  71       }
  72
  73       if (brw->vs.prog_data->uses_instanceid) {
  74          dw1 |= GEN8_SGVS_ENABLE_INSTANCE_ID |
  75                 (3 << GEN8_SGVS_INSTANCE_ID_COMPONENT_SHIFT) | /* .w channel */
  76                 (vue << GEN8_SGVS_INSTANCE_ID_ELEMENT_OFFSET_SHIFT);
  77       }
  78
  79       BEGIN_BATCH(2);
  80       OUT_BATCH(_3DSTATE_VF_SGVS << 16 | (2 - 2));
  81       OUT_BATCH(dw1);
  82       ADVANCE_BATCH();
  83
  84       BEGIN_BATCH(3);
  85       OUT_BATCH(_3DSTATE_VF_INSTANCING << 16 | (3 - 2));
  86       OUT_BATCH(vue | GEN8_VF_INSTANCING_ENABLE);
  87       OUT_BATCH(0);
  88       ADVANCE_BATCH();
  89    } else {
  90       BEGIN_BATCH(2);
  91       OUT_BATCH(_3DSTATE_VF_SGVS << 16 | (2 - 2));
  92       OUT_BATCH(0);
  93       ADVANCE_BATCH();
  94    }
  95
  96    /* If the VS doesn't read any inputs (calculating vertex position from
  97     * a state variable for some reason, for example), emit a single pad
  98     * VERTEX_ELEMENT struct and bail.
  99     *
 100     * The stale VB state stays in place, but they don't do anything unless
 101     * a VE loads from them.
 102     */
 103    if (brw->vb.nr_enabled == 0) {
 104       BEGIN_BATCH(3);
 105       OUT_BATCH((_3DSTATE_VERTEX_ELEMENTS << 16) | (3 - 2));
 106       OUT_BATCH((0 << GEN6_VE0_INDEX_SHIFT) |
 107                 GEN6_VE0_VALID |
 108                 (BRW_SURFACEFORMAT_R32G32B32A32_FLOAT << BRW_VE0_FORMAT_SHIFT) |
 109                 (0 << BRW_VE0_SRC_OFFSET_SHIFT));
 110       OUT_BATCH((BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_0_SHIFT) |
 111                 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_1_SHIFT) |
 112                 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_2_SHIFT) |
 113                 (BRW_VE1_COMPONENT_STORE_1_FLT << BRW_VE1_COMPONENT_3_SHIFT));
 114       ADVANCE_BATCH();
 115       return;
 116    }
 117
 118    /* Now emit 3DSTATE_VERTEX_BUFFERS and 3DSTATE_VERTEX_ELEMENTS packets. */
 119    unsigned nr_buffers = brw->vb.nr_buffers + brw->vs.prog_data->uses_vertexid;
 120    if (nr_buffers) {
 121       assert(nr_buffers <= 33);
 122
 123       BEGIN_BATCH(1 + 4 * nr_buffers);
 124       OUT_BATCH((_3DSTATE_VERTEX_BUFFERS << 16) | (4 * nr_buffers - 1));
 125       for (unsigned i = 0; i < brw->vb.nr_buffers; i++) {
 126          struct brw_vertex_buffer *buffer = &brw->vb.buffers[i];
 127          uint32_t dw0 = 0;
 128
 129          dw0 |= i << GEN6_VB0_INDEX_SHIFT;
 130          dw0 |= GEN7_VB0_ADDRESS_MODIFYENABLE;
 131          dw0 |= buffer->stride << BRW_VB0_PITCH_SHIFT;
 132          dw0 |= mocs_wb << 16;
 133
 134          OUT_BATCH(dw0);
 135          OUT_RELOC64(buffer->bo, I915_GEM_DOMAIN_VERTEX, 0, buffer->offset);
 136          OUT_BATCH(buffer->bo->size);
 137       }
 138
 139       if (brw->vs.prog_data->uses_vertexid) {
 140          OUT_BATCH(brw->vb.nr_buffers << GEN6_VB0_INDEX_SHIFT |
 141                    GEN7_VB0_ADDRESS_MODIFYENABLE |
 142                    mocs_wb << 16);
 143          OUT_RELOC64(brw->draw.draw_params_bo, I915_GEM_DOMAIN_VERTEX, 0,
 144                      brw->draw.draw_params_offset);
 145          OUT_BATCH(brw->draw.draw_params_bo->size);
 146       }
 147       ADVANCE_BATCH();
 148    }
 149
 150    /* Normally we don't need an element for the SGVS attribute because the
 151     * 3DSTATE_VF_SGVS instruction lets you store the generated attribute in an
 152     * element that is past the list in 3DSTATE_VERTEX_ELEMENTS. However if the
 153     * vertex ID is used then it needs an element for the base vertex buffer.
 154     * Additionally if there is an edge flag element then the SGVS can't be
 155     * inserted past that so we need a dummy element to ensure that the edge
 156     * flag is the last one.
 157     */
 158    bool needs_sgvs_element = (brw->vs.prog_data->uses_vertexid ||
 159                               (brw->vs.prog_data->uses_instanceid &&
 160                                uses_edge_flag));
 161    unsigned nr_elements = brw->vb.nr_enabled + needs_sgvs_element;
 162
 163    /* The hardware allows one more VERTEX_ELEMENTS than VERTEX_BUFFERS,
 164     * presumably for VertexID/InstanceID.
 165     */
 166    assert(nr_elements <= 34);
 167
 168    struct brw_vertex_element *gen6_edgeflag_input = NULL;
 169
 170    BEGIN_BATCH(1 + nr_elements * 2);
 171    OUT_BATCH((_3DSTATE_VERTEX_ELEMENTS << 16) | (2 * nr_elements - 1));
 172    for (unsigned i = 0; i < brw->vb.nr_enabled; i++) {
 173       struct brw_vertex_element *input = brw->vb.enabled[i];
 174       uint32_t format = brw_get_vertex_surface_type(brw, input->glarray);
 175       uint32_t comp0 = BRW_VE1_COMPONENT_STORE_SRC;
 176       uint32_t comp1 = BRW_VE1_COMPONENT_STORE_SRC;
 177       uint32_t comp2 = BRW_VE1_COMPONENT_STORE_SRC;
 178       uint32_t comp3 = BRW_VE1_COMPONENT_STORE_SRC;
 179
 180       /* The gen4 driver expects edgeflag to come in as a float, and passes
 181        * that float on to the tests in the clipper.  Mesa's current vertex
 182        * attribute value for EdgeFlag is stored as a float, which works out.
 183        * glEdgeFlagPointer, on the other hand, gives us an unnormalized
 184        * integer ubyte.  Just rewrite that to convert to a float.
 185        */
 186       if (input == &brw->vb.inputs[VERT_ATTRIB_EDGEFLAG]) {
 187          /* Gen6+ passes edgeflag as sideband along with the vertex, instead
 188           * of in the VUE.  We have to upload it sideband as the last vertex
 189           * element according to the B-Spec.
 190           */
 191          gen6_edgeflag_input = input;
 192          continue;
 193       }
 194
 195       switch (input->glarray->Size) {
 196       case 0: comp0 = BRW_VE1_COMPONENT_STORE_0;
 197       case 1: comp1 = BRW_VE1_COMPONENT_STORE_0;
 198       case 2: comp2 = BRW_VE1_COMPONENT_STORE_0;
 199       case 3: comp3 = input->glarray->Integer ? BRW_VE1_COMPONENT_STORE_1_INT
 200                                               : BRW_VE1_COMPONENT_STORE_1_FLT;
 201          break;
 202       }
 203
 204       OUT_BATCH((input->buffer << GEN6_VE0_INDEX_SHIFT) |
 205                 GEN6_VE0_VALID |
 206                 (format << BRW_VE0_FORMAT_SHIFT) |
 207                 (input->offset << BRW_VE0_SRC_OFFSET_SHIFT));
 208
 209       OUT_BATCH((comp0 << BRW_VE1_COMPONENT_0_SHIFT) |
 210                 (comp1 << BRW_VE1_COMPONENT_1_SHIFT) |
 211                 (comp2 << BRW_VE1_COMPONENT_2_SHIFT) |
 212                 (comp3 << BRW_VE1_COMPONENT_3_SHIFT));
 213    }
 214
 215    if (needs_sgvs_element) {
 216       if (brw->vs.prog_data->uses_vertexid) {
 217          OUT_BATCH(GEN6_VE0_VALID |
 218                    brw->vb.nr_buffers << GEN6_VE0_INDEX_SHIFT |
 219                    BRW_SURFACEFORMAT_R32_UINT << BRW_VE0_FORMAT_SHIFT);
 220          OUT_BATCH((BRW_VE1_COMPONENT_STORE_SRC << BRW_VE1_COMPONENT_0_SHIFT) |
 221                    (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_1_SHIFT) |
 222                    (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_2_SHIFT) |
 223                    (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_3_SHIFT));
 224       } else {
 225          OUT_BATCH(GEN6_VE0_VALID);
 226          OUT_BATCH((BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_0_SHIFT) |
 227                    (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_1_SHIFT) |
 228                    (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_2_SHIFT) |
 229                    (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_3_SHIFT));
 230       }
 231    }
 232
 233    if (gen6_edgeflag_input) {
 234       uint32_t format =
 235          brw_get_vertex_surface_type(brw, gen6_edgeflag_input->glarray);
 236
 237       OUT_BATCH((gen6_edgeflag_input->buffer << GEN6_VE0_INDEX_SHIFT) |
 238                 GEN6_VE0_VALID |
 239                 GEN6_VE0_EDGE_FLAG_ENABLE |
 240                 (format << BRW_VE0_FORMAT_SHIFT) |
 241                 (gen6_edgeflag_input->offset << BRW_VE0_SRC_OFFSET_SHIFT));
 242       OUT_BATCH((BRW_VE1_COMPONENT_STORE_SRC << BRW_VE1_COMPONENT_0_SHIFT) |
 243                 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_1_SHIFT) |
 244                 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_2_SHIFT) |
 245                 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_3_SHIFT));
 246    }
 247    ADVANCE_BATCH();
 248
 249    for (unsigned i = 0, j = 0; i < brw->vb.nr_enabled; i++) {
 250       const struct brw_vertex_element *input = brw->vb.enabled[i];
 251       const struct brw_vertex_buffer *buffer = &brw->vb.buffers[input->buffer];
 252       unsigned element_index;
 253
 254       /* The edge flag element is reordered to be the last one in the code
 255        * above so we need to compensate for that in the element indices used
 256        * below.
 257        */
 258       if (input == gen6_edgeflag_input)
 259          element_index = nr_elements - 1;
 260       else
 261          element_index = j++;
 262
 263       BEGIN_BATCH(3);
 264       OUT_BATCH(_3DSTATE_VF_INSTANCING << 16 | (3 - 2));
 265       OUT_BATCH(element_index |
 266                 (buffer->step_rate ? GEN8_VF_INSTANCING_ENABLE : 0));
 267       OUT_BATCH(buffer->step_rate);
 268       ADVANCE_BATCH();
 269    }
 270 }
 271
 272 const struct brw_tracked_state gen8_vertices = {
 273    .dirty = {
 274       .mesa = _NEW_POLYGON,
 275       .brw = BRW_NEW_BATCH |
 276              BRW_NEW_VERTICES |
 277              BRW_NEW_VS_PROG_DATA,
 278    },
 279    .emit = gen8_emit_vertices,
 280 };
 281
 282 static void
 283 gen8_emit_index_buffer(struct brw_context *brw)
 284 {
 285    const struct _mesa_index_buffer *index_buffer = brw->ib.ib;
 286    uint32_t mocs_wb = brw->gen >= 9 ? SKL_MOCS_WB : BDW_MOCS_WB;
 287
 288    if (index_buffer == NULL)
 289       return;
 290
 291    BEGIN_BATCH(5);
 292    OUT_BATCH(CMD_INDEX_BUFFER << 16 | (5 - 2));
 293    OUT_BATCH(brw_get_index_type(index_buffer->type) | mocs_wb);
 294    OUT_RELOC64(brw->ib.bo, I915_GEM_DOMAIN_VERTEX, 0, 0);
 295    OUT_BATCH(brw->ib.bo->size);
 296    ADVANCE_BATCH();
 297 }
 298
 299 const struct brw_tracked_state gen8_index_buffer = {
 300    .dirty = {
 301       .mesa = 0,
 302       .brw = BRW_NEW_BATCH |
 303              BRW_NEW_INDEX_BUFFER,
 304    },
 305    .emit = gen8_emit_index_buffer,
 306 };
 307
 308 static void
 309 gen8_emit_vf_topology(struct brw_context *brw)
 310 {
 311    BEGIN_BATCH(2);
 312    OUT_BATCH(_3DSTATE_VF_TOPOLOGY << 16 | (2 - 2));
 313    OUT_BATCH(brw->primitive);
 314    ADVANCE_BATCH();
 315 }
 316
 317 const struct brw_tracked_state gen8_vf_topology = {
 318    .dirty = {
 319       .mesa = 0,
 320       .brw = BRW_NEW_PRIMITIVE,
 321    },
 322    .emit = gen8_emit_vf_topology,
 323 };