2 * Copyright © 2012 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 #include "main/bufferobj.h"
25 #include "main/context.h"
26 #include "main/enums.h"
27 #include "main/macros.h"
30 #include "brw_defines.h"
31 #include "brw_context.h"
32 #include "brw_state.h"
34 #include "intel_batchbuffer.h"
35 #include "intel_buffer_objects.h"
38 gen8_emit_vertices(struct brw_context
*brw
)
40 struct gl_context
*ctx
= &brw
->ctx
;
41 uint32_t mocs_wb
= brw
->gen
>= 9 ? SKL_MOCS_WB
: BDW_MOCS_WB
;
44 brw_prepare_vertices(brw
);
45 brw_prepare_shader_draw_parameters(brw
);
47 uses_edge_flag
= (ctx
->Polygon
.FrontMode
!= GL_FILL
||
48 ctx
->Polygon
.BackMode
!= GL_FILL
);
50 if (brw
->vs
.prog_data
->uses_vertexid
|| brw
->vs
.prog_data
->uses_instanceid
) {
51 unsigned vue
= brw
->vb
.nr_enabled
;
53 /* The element for the edge flags must always be last, so we have to
54 * insert the SGVS before it in that case.
62 "Trying to insert VID/IID past 33rd vertex element, "
63 "need to reorder the vertex attrbutes.");
66 if (brw
->vs
.prog_data
->uses_vertexid
) {
67 dw1
|= GEN8_SGVS_ENABLE_VERTEX_ID
|
68 (2 << GEN8_SGVS_VERTEX_ID_COMPONENT_SHIFT
) | /* .z channel */
69 (vue
<< GEN8_SGVS_VERTEX_ID_ELEMENT_OFFSET_SHIFT
);
72 if (brw
->vs
.prog_data
->uses_instanceid
) {
73 dw1
|= GEN8_SGVS_ENABLE_INSTANCE_ID
|
74 (3 << GEN8_SGVS_INSTANCE_ID_COMPONENT_SHIFT
) | /* .w channel */
75 (vue
<< GEN8_SGVS_INSTANCE_ID_ELEMENT_OFFSET_SHIFT
);
79 OUT_BATCH(_3DSTATE_VF_SGVS
<< 16 | (2 - 2));
84 OUT_BATCH(_3DSTATE_VF_INSTANCING
<< 16 | (3 - 2));
85 OUT_BATCH(vue
| GEN8_VF_INSTANCING_ENABLE
);
90 OUT_BATCH(_3DSTATE_VF_SGVS
<< 16 | (2 - 2));
95 /* If the VS doesn't read any inputs (calculating vertex position from
96 * a state variable for some reason, for example), emit a single pad
97 * VERTEX_ELEMENT struct and bail.
99 * The stale VB state stays in place, but they don't do anything unless
100 * a VE loads from them.
102 if (brw
->vb
.nr_enabled
== 0) {
104 OUT_BATCH((_3DSTATE_VERTEX_ELEMENTS
<< 16) | (3 - 2));
105 OUT_BATCH((0 << GEN6_VE0_INDEX_SHIFT
) |
107 (BRW_SURFACEFORMAT_R32G32B32A32_FLOAT
<< BRW_VE0_FORMAT_SHIFT
) |
108 (0 << BRW_VE0_SRC_OFFSET_SHIFT
));
109 OUT_BATCH((BRW_VE1_COMPONENT_STORE_0
<< BRW_VE1_COMPONENT_0_SHIFT
) |
110 (BRW_VE1_COMPONENT_STORE_0
<< BRW_VE1_COMPONENT_1_SHIFT
) |
111 (BRW_VE1_COMPONENT_STORE_0
<< BRW_VE1_COMPONENT_2_SHIFT
) |
112 (BRW_VE1_COMPONENT_STORE_1_FLT
<< BRW_VE1_COMPONENT_3_SHIFT
));
117 /* Now emit 3DSTATE_VERTEX_BUFFERS and 3DSTATE_VERTEX_ELEMENTS packets. */
118 unsigned nr_buffers
= brw
->vb
.nr_buffers
+ brw
->vs
.prog_data
->uses_vertexid
;
120 assert(nr_buffers
<= 33);
122 BEGIN_BATCH(1 + 4 * nr_buffers
);
123 OUT_BATCH((_3DSTATE_VERTEX_BUFFERS
<< 16) | (4 * nr_buffers
- 1));
124 for (unsigned i
= 0; i
< brw
->vb
.nr_buffers
; i
++) {
125 struct brw_vertex_buffer
*buffer
= &brw
->vb
.buffers
[i
];
128 dw0
|= i
<< GEN6_VB0_INDEX_SHIFT
;
129 dw0
|= GEN7_VB0_ADDRESS_MODIFYENABLE
;
130 dw0
|= buffer
->stride
<< BRW_VB0_PITCH_SHIFT
;
131 dw0
|= mocs_wb
<< 16;
134 OUT_RELOC64(buffer
->bo
, I915_GEM_DOMAIN_VERTEX
, 0, buffer
->offset
);
135 OUT_BATCH(buffer
->bo
->size
);
138 if (brw
->vs
.prog_data
->uses_vertexid
) {
139 OUT_BATCH(brw
->vb
.nr_buffers
<< GEN6_VB0_INDEX_SHIFT
|
140 GEN7_VB0_ADDRESS_MODIFYENABLE
|
142 OUT_RELOC64(brw
->draw
.draw_params_bo
, I915_GEM_DOMAIN_VERTEX
, 0,
143 brw
->draw
.draw_params_offset
);
144 OUT_BATCH(brw
->draw
.draw_params_bo
->size
);
149 /* Normally we don't need an element for the SGVS attribute because the
150 * 3DSTATE_VF_SGVS instruction lets you store the generated attribute in an
151 * element that is past the list in 3DSTATE_VERTEX_ELEMENTS. However if the
152 * vertex ID is used then it needs an element for the base vertex buffer.
153 * Additionally if there is an edge flag element then the SGVS can't be
154 * inserted past that so we need a dummy element to ensure that the edge
155 * flag is the last one.
157 bool needs_sgvs_element
= (brw
->vs
.prog_data
->uses_vertexid
||
158 (brw
->vs
.prog_data
->uses_instanceid
&&
160 unsigned nr_elements
= brw
->vb
.nr_enabled
+ needs_sgvs_element
;
162 /* The hardware allows one more VERTEX_ELEMENTS than VERTEX_BUFFERS,
163 * presumably for VertexID/InstanceID.
165 assert(nr_elements
<= 34);
167 struct brw_vertex_element
*gen6_edgeflag_input
= NULL
;
169 BEGIN_BATCH(1 + nr_elements
* 2);
170 OUT_BATCH((_3DSTATE_VERTEX_ELEMENTS
<< 16) | (2 * nr_elements
- 1));
171 for (unsigned i
= 0; i
< brw
->vb
.nr_enabled
; i
++) {
172 struct brw_vertex_element
*input
= brw
->vb
.enabled
[i
];
173 uint32_t format
= brw_get_vertex_surface_type(brw
, input
->glarray
);
174 uint32_t comp0
= BRW_VE1_COMPONENT_STORE_SRC
;
175 uint32_t comp1
= BRW_VE1_COMPONENT_STORE_SRC
;
176 uint32_t comp2
= BRW_VE1_COMPONENT_STORE_SRC
;
177 uint32_t comp3
= BRW_VE1_COMPONENT_STORE_SRC
;
179 /* The gen4 driver expects edgeflag to come in as a float, and passes
180 * that float on to the tests in the clipper. Mesa's current vertex
181 * attribute value for EdgeFlag is stored as a float, which works out.
182 * glEdgeFlagPointer, on the other hand, gives us an unnormalized
183 * integer ubyte. Just rewrite that to convert to a float.
185 if (input
== &brw
->vb
.inputs
[VERT_ATTRIB_EDGEFLAG
]) {
186 /* Gen6+ passes edgeflag as sideband along with the vertex, instead
187 * of in the VUE. We have to upload it sideband as the last vertex
188 * element according to the B-Spec.
190 gen6_edgeflag_input
= input
;
194 switch (input
->glarray
->Size
) {
195 case 0: comp0
= BRW_VE1_COMPONENT_STORE_0
;
196 case 1: comp1
= BRW_VE1_COMPONENT_STORE_0
;
197 case 2: comp2
= BRW_VE1_COMPONENT_STORE_0
;
198 case 3: comp3
= input
->glarray
->Integer
? BRW_VE1_COMPONENT_STORE_1_INT
199 : BRW_VE1_COMPONENT_STORE_1_FLT
;
203 OUT_BATCH((input
->buffer
<< GEN6_VE0_INDEX_SHIFT
) |
205 (format
<< BRW_VE0_FORMAT_SHIFT
) |
206 (input
->offset
<< BRW_VE0_SRC_OFFSET_SHIFT
));
208 OUT_BATCH((comp0
<< BRW_VE1_COMPONENT_0_SHIFT
) |
209 (comp1
<< BRW_VE1_COMPONENT_1_SHIFT
) |
210 (comp2
<< BRW_VE1_COMPONENT_2_SHIFT
) |
211 (comp3
<< BRW_VE1_COMPONENT_3_SHIFT
));
214 if (needs_sgvs_element
) {
215 if (brw
->vs
.prog_data
->uses_vertexid
) {
216 OUT_BATCH(GEN6_VE0_VALID
|
217 brw
->vb
.nr_buffers
<< GEN6_VE0_INDEX_SHIFT
|
218 BRW_SURFACEFORMAT_R32_UINT
<< BRW_VE0_FORMAT_SHIFT
);
219 OUT_BATCH((BRW_VE1_COMPONENT_STORE_SRC
<< BRW_VE1_COMPONENT_0_SHIFT
) |
220 (BRW_VE1_COMPONENT_STORE_0
<< BRW_VE1_COMPONENT_1_SHIFT
) |
221 (BRW_VE1_COMPONENT_STORE_0
<< BRW_VE1_COMPONENT_2_SHIFT
) |
222 (BRW_VE1_COMPONENT_STORE_0
<< BRW_VE1_COMPONENT_3_SHIFT
));
224 OUT_BATCH(GEN6_VE0_VALID
);
225 OUT_BATCH((BRW_VE1_COMPONENT_STORE_0
<< BRW_VE1_COMPONENT_0_SHIFT
) |
226 (BRW_VE1_COMPONENT_STORE_0
<< BRW_VE1_COMPONENT_1_SHIFT
) |
227 (BRW_VE1_COMPONENT_STORE_0
<< BRW_VE1_COMPONENT_2_SHIFT
) |
228 (BRW_VE1_COMPONENT_STORE_0
<< BRW_VE1_COMPONENT_3_SHIFT
));
232 if (gen6_edgeflag_input
) {
234 brw_get_vertex_surface_type(brw
, gen6_edgeflag_input
->glarray
);
236 OUT_BATCH((gen6_edgeflag_input
->buffer
<< GEN6_VE0_INDEX_SHIFT
) |
238 GEN6_VE0_EDGE_FLAG_ENABLE
|
239 (format
<< BRW_VE0_FORMAT_SHIFT
) |
240 (gen6_edgeflag_input
->offset
<< BRW_VE0_SRC_OFFSET_SHIFT
));
241 OUT_BATCH((BRW_VE1_COMPONENT_STORE_SRC
<< BRW_VE1_COMPONENT_0_SHIFT
) |
242 (BRW_VE1_COMPONENT_STORE_0
<< BRW_VE1_COMPONENT_1_SHIFT
) |
243 (BRW_VE1_COMPONENT_STORE_0
<< BRW_VE1_COMPONENT_2_SHIFT
) |
244 (BRW_VE1_COMPONENT_STORE_0
<< BRW_VE1_COMPONENT_3_SHIFT
));
248 for (unsigned i
= 0, j
= 0; i
< brw
->vb
.nr_enabled
; i
++) {
249 const struct brw_vertex_element
*input
= brw
->vb
.enabled
[i
];
250 const struct brw_vertex_buffer
*buffer
= &brw
->vb
.buffers
[input
->buffer
];
251 unsigned element_index
;
253 /* The edge flag element is reordered to be the last one in the code
254 * above so we need to compensate for that in the element indices used
257 if (input
== gen6_edgeflag_input
)
258 element_index
= nr_elements
- 1;
263 OUT_BATCH(_3DSTATE_VF_INSTANCING
<< 16 | (3 - 2));
264 OUT_BATCH(element_index
|
265 (buffer
->step_rate
? GEN8_VF_INSTANCING_ENABLE
: 0));
266 OUT_BATCH(buffer
->step_rate
);
271 const struct brw_tracked_state gen8_vertices
= {
273 .mesa
= _NEW_POLYGON
,
274 .brw
= BRW_NEW_BATCH
|
276 BRW_NEW_VS_PROG_DATA
,
278 .emit
= gen8_emit_vertices
,
282 gen8_emit_index_buffer(struct brw_context
*brw
)
284 const struct _mesa_index_buffer
*index_buffer
= brw
->ib
.ib
;
285 uint32_t mocs_wb
= brw
->gen
>= 9 ? SKL_MOCS_WB
: BDW_MOCS_WB
;
287 if (index_buffer
== NULL
)
291 OUT_BATCH(CMD_INDEX_BUFFER
<< 16 | (5 - 2));
292 OUT_BATCH(brw_get_index_type(index_buffer
->type
) | mocs_wb
);
293 OUT_RELOC64(brw
->ib
.bo
, I915_GEM_DOMAIN_VERTEX
, 0, 0);
294 OUT_BATCH(brw
->ib
.bo
->size
);
298 const struct brw_tracked_state gen8_index_buffer
= {
301 .brw
= BRW_NEW_BATCH
|
302 BRW_NEW_INDEX_BUFFER
,
304 .emit
= gen8_emit_index_buffer
,
308 gen8_emit_vf_topology(struct brw_context
*brw
)
311 OUT_BATCH(_3DSTATE_VF_TOPOLOGY
<< 16 | (2 - 2));
312 OUT_BATCH(brw
->primitive
);
316 const struct brw_tracked_state gen8_vf_topology
= {
319 .brw
= BRW_NEW_PRIMITIVE
,
321 .emit
= gen8_emit_vf_topology
,