src/mesa/drivers/dri/i965/gen8_ds_state.c

   1 /*
   2  * Copyright © 2014 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  */
  23
  24 #include "brw_context.h"
  25 #include "brw_state.h"
  26 #include "brw_defines.h"
  27 #include "intel_batchbuffer.h"
  28
  29 static void
  30 gen8_upload_ds_state(struct brw_context *brw)
  31 {
  32    struct gl_context *ctx = &brw->ctx;
  33    const struct brw_stage_state *stage_state = &brw->tes.base;
  34    /* BRW_NEW_TESS_PROGRAMS */
  35    bool active = brw->tess_eval_program;
  36
  37    /* BRW_NEW_TES_PROG_DATA */
  38    const struct brw_tes_prog_data *tes_prog_data = brw->tes.prog_data;
  39    const struct brw_vue_prog_data *vue_prog_data = &tes_prog_data->base;
  40    const struct brw_stage_prog_data *prog_data = &vue_prog_data->base;
  41    const int ds_pkt_len = brw->gen >= 9 ? 11 : 9;
  42
  43    if (active) {
  44       BEGIN_BATCH(ds_pkt_len);
  45       OUT_BATCH(_3DSTATE_DS << 16 | (ds_pkt_len - 2));
  46       OUT_BATCH(stage_state->prog_offset);
  47       OUT_BATCH(0);
  48       OUT_BATCH(SET_FIELD(DIV_ROUND_UP(stage_state->sampler_count, 4),
  49                           GEN7_DS_SAMPLER_COUNT) |
  50                 SET_FIELD(prog_data->binding_table.size_bytes / 4,
  51                           GEN7_DS_BINDING_TABLE_ENTRY_COUNT));
  52       if (prog_data->total_scratch) {
  53          OUT_RELOC64(stage_state->scratch_bo,
  54                      I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
  55                      ffs(prog_data->total_scratch) - 11);
  56       } else {
  57          OUT_BATCH(0);
  58          OUT_BATCH(0);
  59       }
  60       OUT_BATCH(SET_FIELD(prog_data->dispatch_grf_start_reg,
  61                           GEN7_DS_DISPATCH_START_GRF) |
  62                 SET_FIELD(vue_prog_data->urb_read_length,
  63                           GEN7_DS_URB_READ_LENGTH));
  64
  65       OUT_BATCH(GEN7_DS_ENABLE |
  66                 GEN7_DS_STATISTICS_ENABLE |
  67                 (brw->max_ds_threads - 1) << HSW_DS_MAX_THREADS_SHIFT |
  68                 (vue_prog_data->dispatch_mode == DISPATCH_MODE_SIMD8 ?
  69                  GEN7_DS_SIMD8_DISPATCH_ENABLE : 0) |
  70                 (tes_prog_data->domain == BRW_TESS_DOMAIN_TRI ?
  71                  GEN7_DS_COMPUTE_W_COORDINATE_ENABLE : 0));
  72       OUT_BATCH(SET_FIELD(vue_prog_data->cull_distance_mask |
  73                           ctx->Transform.ClipPlanesEnabled,
  74                           GEN8_DS_USER_CLIP_DISTANCE));
  75
  76       if (brw->gen >= 9) {
  77          OUT_BATCH(0);
  78          OUT_BATCH(0);
  79       }
  80
  81       ADVANCE_BATCH();
  82    } else {
  83       BEGIN_BATCH(ds_pkt_len);
  84       OUT_BATCH(_3DSTATE_DS << 16 | (ds_pkt_len - 2));
  85       OUT_BATCH(0);
  86       OUT_BATCH(0);
  87       OUT_BATCH(0);
  88       OUT_BATCH(0);
  89       OUT_BATCH(0);
  90       OUT_BATCH(0);
  91       OUT_BATCH(0);
  92       OUT_BATCH(0);
  93
  94       if (brw->gen >= 9) {
  95          OUT_BATCH(0);
  96          OUT_BATCH(0);
  97       }
  98
  99       ADVANCE_BATCH();
 100    }
 101
 102    brw->tes.enabled = active;
 103 }
 104
 105 const struct brw_tracked_state gen8_ds_state = {
 106    .dirty = {
 107       .mesa  = 0,
 108       .brw   = BRW_NEW_BATCH |
 109                BRW_NEW_BLORP |
 110                BRW_NEW_TESS_PROGRAMS |
 111                BRW_NEW_TES_PROG_DATA,
 112    },
 113    .emit = gen8_upload_ds_state,
 114 };