Merge remote-tracking branch 'origin/master' into vulkan
[mesa.git] / src / mesa / drivers / dri / i965 / gen8_ds_state.c
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 */
23
24 #include "brw_context.h"
25 #include "brw_state.h"
26 #include "brw_defines.h"
27 #include "intel_batchbuffer.h"
28
29 static void
30 gen8_upload_ds_state(struct brw_context *brw)
31 {
32 struct gl_context *ctx = &brw->ctx;
33 const struct brw_stage_state *stage_state = &brw->tes.base;
34 /* BRW_NEW_TESS_PROGRAMS */
35 bool active = brw->tess_eval_program;
36
37 /* BRW_NEW_TES_PROG_DATA */
38 const struct brw_tes_prog_data *tes_prog_data = brw->tes.prog_data;
39 const struct brw_vue_prog_data *vue_prog_data = &tes_prog_data->base;
40 const struct brw_stage_prog_data *prog_data = &vue_prog_data->base;
41
42 if (active) {
43 BEGIN_BATCH(9);
44 OUT_BATCH(_3DSTATE_DS << 16 | (9 - 2));
45 OUT_BATCH(stage_state->prog_offset);
46 OUT_BATCH(0);
47 OUT_BATCH(SET_FIELD(DIV_ROUND_UP(stage_state->sampler_count, 4),
48 GEN7_DS_SAMPLER_COUNT) |
49 SET_FIELD(prog_data->binding_table.size_bytes / 4,
50 GEN7_DS_BINDING_TABLE_ENTRY_COUNT));
51 if (prog_data->total_scratch) {
52 OUT_RELOC64(stage_state->scratch_bo,
53 I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
54 ffs(prog_data->total_scratch) - 11);
55 } else {
56 OUT_BATCH(0);
57 OUT_BATCH(0);
58 }
59 OUT_BATCH(SET_FIELD(prog_data->dispatch_grf_start_reg,
60 GEN7_DS_DISPATCH_START_GRF) |
61 SET_FIELD(vue_prog_data->urb_read_length,
62 GEN7_DS_URB_READ_LENGTH));
63
64 OUT_BATCH(GEN7_DS_ENABLE |
65 GEN7_DS_STATISTICS_ENABLE |
66 (brw->max_ds_threads - 1) << HSW_DS_MAX_THREADS_SHIFT |
67 (vue_prog_data->dispatch_mode == DISPATCH_MODE_SIMD8 ?
68 GEN7_DS_SIMD8_DISPATCH_ENABLE : 0) |
69 (tes_prog_data->domain == BRW_TESS_DOMAIN_TRI ?
70 GEN7_DS_COMPUTE_W_COORDINATE_ENABLE : 0));
71 OUT_BATCH(SET_FIELD(ctx->Transform.ClipPlanesEnabled,
72 GEN8_DS_USER_CLIP_DISTANCE));
73 ADVANCE_BATCH();
74 } else {
75 BEGIN_BATCH(9);
76 OUT_BATCH(_3DSTATE_DS << 16 | (9 - 2));
77 OUT_BATCH(0);
78 OUT_BATCH(0);
79 OUT_BATCH(0);
80 OUT_BATCH(0);
81 OUT_BATCH(0);
82 OUT_BATCH(0);
83 OUT_BATCH(0);
84 OUT_BATCH(0);
85 ADVANCE_BATCH();
86 }
87 brw->tes.enabled = active;
88 }
89
90 const struct brw_tracked_state gen8_ds_state = {
91 .dirty = {
92 .mesa = 0,
93 .brw = BRW_NEW_BATCH |
94 BRW_NEW_TESS_PROGRAMS |
95 BRW_NEW_TES_PROG_DATA,
96 },
97 .emit = gen8_upload_ds_state,
98 };