2 * Copyright © 2012 Intel Corporation
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5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
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9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
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15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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25 * @file gen8_generator.h
27 * Code generation for Gen8+ hardware, replacing the brw_eu_emit.c layer.
33 #include "main/macros.h"
36 #include "gen8_instruction.h"
38 class gen8_generator
{
40 gen8_generator(struct brw_context
*brw
,
41 struct gl_shader_program
*shader_prog
,
42 struct gl_program
*prog
,
47 * Instruction emitters.
51 gen8_instruction *OP(struct brw_reg dst, struct brw_reg src);
53 gen8_instruction *OP(struct brw_reg d, struct brw_reg, struct brw_reg);
55 gen8_instruction *OP(struct brw_reg d, \
56 struct brw_reg, struct brw_reg, struct brw_reg);
98 gen8_instruction
*CMP(struct brw_reg dst
, unsigned conditional
,
99 struct brw_reg src0
, struct brw_reg src1
);
100 gen8_instruction
*IF(unsigned predicate
);
101 gen8_instruction
*ELSE();
102 gen8_instruction
*ENDIF();
104 gen8_instruction
*BREAK();
105 gen8_instruction
*CONTINUE();
106 gen8_instruction
*WHILE();
108 gen8_instruction
*HALT();
110 gen8_instruction
*MATH(unsigned math_function
,
112 struct brw_reg src0
);
113 gen8_instruction
*MATH(unsigned math_function
,
116 struct brw_reg src1
);
117 gen8_instruction
*NOP();
121 gen8_instruction
*alu3(unsigned opcode
,
125 struct brw_reg src2
);
127 gen8_instruction
*math(unsigned math_function
,
129 struct brw_reg src0
);
131 gen8_instruction
*next_inst(unsigned opcode
);
133 struct gl_shader_program
*shader_prog
;
134 struct gl_program
*prog
;
136 struct brw_context
*brw
;
137 struct intel_context
*intel
;
138 struct gl_context
*ctx
;
140 gen8_instruction
*store
;
143 unsigned next_inst_offset
;
146 * Control flow stacks:
148 * if_stack contains IF and ELSE instructions which must be patched with
149 * the final jump offsets (and popped) once the matching ENDIF is encountered.
151 * We actually store an array index into the store, rather than pointers
152 * to the instructions. This is necessary since we may realloc the store.
158 int if_stack_array_size
;
161 int loop_stack_depth
;
162 int loop_stack_array_size
;
164 int if_depth_in_loop
;
166 void push_if_stack(gen8_instruction
*inst
);
167 gen8_instruction
*pop_if_stack();
170 void patch_IF_ELSE(gen8_instruction
*if_inst
,
171 gen8_instruction
*else_inst
,
172 gen8_instruction
*endif_inst
);
174 unsigned next_ip(unsigned ip
) const;
175 unsigned find_next_block_end(unsigned start_ip
) const;
176 unsigned find_loop_end(unsigned start
) const;
178 void patch_jump_targets();
181 * Default state for new instructions.
185 unsigned access_mode
;
186 unsigned mask_control
;
187 unsigned qtr_control
;
188 unsigned flag_subreg_nr
;
189 unsigned conditional_mod
;
191 bool predicate_inverse
;