2 * Copyright © 2014 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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21 * DEALINGS IN THE SOFTWARE.
24 #include "brw_context.h"
25 #include "brw_state.h"
26 #include "brw_defines.h"
27 #include "intel_batchbuffer.h"
30 gen8_upload_hs_state(struct brw_context
*brw
)
32 const struct brw_stage_state
*stage_state
= &brw
->tcs
.base
;
33 /* BRW_NEW_TESS_PROGRAMS */
34 bool active
= brw
->tess_eval_program
;
35 /* BRW_NEW_HS_PROG_DATA */
36 const struct brw_vue_prog_data
*prog_data
= &brw
->tcs
.prog_data
->base
;
40 OUT_BATCH(_3DSTATE_HS
<< 16 | (9 - 2));
41 OUT_BATCH(SET_FIELD(DIV_ROUND_UP(stage_state
->sampler_count
, 4),
42 GEN7_HS_SAMPLER_COUNT
) |
43 SET_FIELD(prog_data
->base
.binding_table
.size_bytes
/ 4,
44 GEN7_HS_BINDING_TABLE_ENTRY_COUNT
));
45 OUT_BATCH(GEN7_HS_ENABLE
|
46 GEN7_HS_STATISTICS_ENABLE
|
47 (brw
->max_hs_threads
- 1) << GEN8_HS_MAX_THREADS_SHIFT
|
48 SET_FIELD(brw
->tcs
.prog_data
->instances
- 1,
49 GEN7_HS_INSTANCE_COUNT
));
50 OUT_BATCH(stage_state
->prog_offset
);
52 if (prog_data
->base
.total_scratch
) {
53 OUT_RELOC64(stage_state
->scratch_bo
,
54 I915_GEM_DOMAIN_RENDER
, I915_GEM_DOMAIN_RENDER
,
55 ffs(stage_state
->per_thread_scratch
) - 11);
60 OUT_BATCH(GEN7_HS_INCLUDE_VERTEX_HANDLES
|
61 SET_FIELD(prog_data
->base
.dispatch_grf_start_reg
,
62 GEN7_HS_DISPATCH_START_GRF
));
63 OUT_BATCH(0); /* MBZ */
67 OUT_BATCH(_3DSTATE_HS
<< 16 | (9 - 2));
78 brw
->tcs
.enabled
= active
;
81 const struct brw_tracked_state gen8_hs_state
= {
84 .brw
= BRW_NEW_BATCH
|
86 BRW_NEW_TCS_PROG_DATA
|
87 BRW_NEW_TESS_PROGRAMS
,
89 .emit
= gen8_upload_hs_state
,