2 * Copyright © 2012 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 #include "intel_batchbuffer.h"
25 #include "brw_context.h"
26 #include "brw_state.h"
27 #include "brw_defines.h"
30 * Define the base addresses which some state is referenced from.
32 static void upload_state_base_address(struct brw_context
*brw
)
34 uint32_t mocs_wb
= brw
->gen
>= 9 ? SKL_MOCS_WB
: BDW_MOCS_WB
;
35 int pkt_len
= brw
->gen
>= 9 ? 19 : 16;
38 OUT_BATCH(CMD_STATE_BASE_ADDRESS
<< 16 | (pkt_len
- 2));
39 /* General state base address: stateless DP read/write requests */
40 OUT_BATCH(mocs_wb
<< 4 | 1);
42 OUT_BATCH(mocs_wb
<< 16);
43 /* Surface state base address: */
44 OUT_RELOC64(brw
->batch
.bo
, I915_GEM_DOMAIN_SAMPLER
, 0,
46 /* Dynamic state base address: */
47 OUT_RELOC64(brw
->batch
.bo
,
48 I915_GEM_DOMAIN_RENDER
| I915_GEM_DOMAIN_INSTRUCTION
, 0,
50 /* Indirect object base address: MEDIA_OBJECT data */
51 OUT_BATCH(mocs_wb
<< 4 | 1);
53 /* Instruction base address: shader kernels (incl. SIP) */
54 OUT_RELOC64(brw
->cache
.bo
, I915_GEM_DOMAIN_INSTRUCTION
, 0,
57 /* General state buffer size */
58 OUT_BATCH(0xfffff001);
59 /* Dynamic state buffer size */
60 OUT_BATCH(ALIGN(brw
->batch
.bo
->size
, 4096) | 1);
61 /* Indirect object upper bound */
62 OUT_BATCH(0xfffff001);
63 /* Instruction access upper bound */
64 OUT_BATCH(ALIGN(brw
->cache
.bo
->size
, 4096) | 1);
72 brw
->ctx
.NewDriverState
|= BRW_NEW_STATE_BASE_ADDRESS
;
75 const struct brw_tracked_state gen8_state_base_address
= {
78 .brw
= BRW_NEW_BATCH
|
79 BRW_NEW_PROGRAM_CACHE
,
81 .emit
= upload_state_base_address