a5cd9f8878156450a9125b948bac390aa708f108
[mesa.git] / src / mesa / drivers / dri / i965 / gen8_sf_state.c
1 /*
2 * Copyright © 2011 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "brw_context.h"
25 #include "brw_state.h"
26 #include "brw_defines.h"
27 #include "brw_util.h"
28 #include "main/macros.h"
29 #include "main/fbobject.h"
30 #include "intel_batchbuffer.h"
31
32 static void
33 upload_sbe(struct brw_context *brw)
34 {
35 struct gl_context *ctx = &brw->ctx;
36 /* CACHE_NEW_WM_PROG */
37 uint32_t num_outputs = brw->wm.prog_data->num_varying_inputs;
38 uint16_t attr_overrides[VARYING_SLOT_MAX];
39 uint32_t urb_entry_read_length;
40 uint32_t point_sprite_enables;
41 uint32_t flat_enables;
42
43 uint32_t dw1 =
44 GEN7_SBE_SWIZZLE_ENABLE |
45 num_outputs << GEN7_SBE_NUM_OUTPUTS_SHIFT;
46
47 /* _NEW_BUFFERS */
48 bool render_to_fbo = _mesa_is_user_fbo(ctx->DrawBuffer);
49
50 /* _NEW_POINT
51 *
52 * Window coordinates in an FBO are inverted, which means point
53 * sprite origin must be inverted.
54 */
55 if ((ctx->Point.SpriteOrigin == GL_LOWER_LEFT) != render_to_fbo)
56 dw1 |= GEN6_SF_POINT_SPRITE_LOWERLEFT;
57 else
58 dw1 |= GEN6_SF_POINT_SPRITE_UPPERLEFT;
59
60 /* BRW_NEW_VUE_MAP_GEOM_OUT | _NEW_POINT | _NEW_LIGHT | _NEW_PROGRAM |
61 * CACHE_NEW_WM_PROG
62 */
63 calculate_attr_overrides(brw, attr_overrides,
64 &point_sprite_enables,
65 &flat_enables,
66 &urb_entry_read_length);
67
68 /* Typically, the URB entry read length and offset should be programmed in
69 * 3DSTATE_VS and 3DSTATE_GS; SBE inherits it from the last active stage
70 * which produces geometry. However, we don't know the proper value until
71 * we call calculate_attr_overrides().
72 *
73 * To fit with our existing code, we override the inherited values and
74 * specify it here directly, as we did on previous generations.
75 */
76 dw1 |=
77 urb_entry_read_length << GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT |
78 BRW_SF_URB_ENTRY_READ_OFFSET << GEN8_SBE_URB_ENTRY_READ_OFFSET_SHIFT |
79 GEN8_SBE_FORCE_URB_ENTRY_READ_LENGTH |
80 GEN8_SBE_FORCE_URB_ENTRY_READ_OFFSET;
81
82 BEGIN_BATCH(4);
83 OUT_BATCH(_3DSTATE_SBE << 16 | (4 - 2));
84 OUT_BATCH(dw1);
85 OUT_BATCH(point_sprite_enables);
86 OUT_BATCH(flat_enables);
87 ADVANCE_BATCH();
88
89 BEGIN_BATCH(11);
90 OUT_BATCH(_3DSTATE_SBE_SWIZ << 16 | (11 - 2));
91
92 /* Output DWords 1 through 8: */
93 for (int i = 0; i < 8; i++) {
94 OUT_BATCH(attr_overrides[i * 2] | attr_overrides[i * 2 + 1] << 16);
95 }
96
97 OUT_BATCH(0); /* wrapshortest enables 0-7 */
98 OUT_BATCH(0); /* wrapshortest enables 8-15 */
99 ADVANCE_BATCH();
100 }
101
102 const struct brw_tracked_state gen8_sbe_state = {
103 .dirty = {
104 .mesa = _NEW_LIGHT | _NEW_POINT,
105 .brw = BRW_NEW_CONTEXT |
106 BRW_NEW_FRAGMENT_PROGRAM |
107 BRW_NEW_VUE_MAP_GEOM_OUT,
108 .cache = 0
109 },
110 .emit = upload_sbe,
111 };
112
113 static void
114 upload_sf(struct brw_context *brw)
115 {
116 struct gl_context *ctx = &brw->ctx;
117 uint32_t dw1 = 0, dw2 = 0, dw3 = 0;
118 float point_size;
119
120 dw1 = GEN6_SF_STATISTICS_ENABLE | GEN6_SF_VIEWPORT_TRANSFORM_ENABLE;
121
122 /* _NEW_LINE */
123 uint32_t line_width_u3_7 = U_FIXED(CLAMP(ctx->Line.Width, 0.0, 7.99), 7);
124 if (line_width_u3_7 == 0)
125 line_width_u3_7 = 1;
126 dw2 |= line_width_u3_7 << GEN6_SF_LINE_WIDTH_SHIFT;
127
128 if (ctx->Line.SmoothFlag) {
129 dw2 |= GEN6_SF_LINE_END_CAP_WIDTH_1_0;
130 }
131
132 /* Clamp to ARB_point_parameters user limits */
133 point_size = CLAMP(ctx->Point.Size, ctx->Point.MinSize, ctx->Point.MaxSize);
134
135 /* Clamp to the hardware limits and convert to fixed point */
136 dw3 |= U_FIXED(CLAMP(point_size, 0.125, 255.875), 3);
137
138 /* _NEW_PROGRAM | _NEW_POINT */
139 if (!(ctx->VertexProgram.PointSizeEnabled || ctx->Point._Attenuated))
140 dw3 |= GEN6_SF_USE_STATE_POINT_WIDTH;
141
142 if (ctx->Point.SmoothFlag)
143 dw3 |= GEN8_SF_SMOOTH_POINT_ENABLE;
144
145 dw3 |= GEN6_SF_LINE_AA_MODE_TRUE;
146
147 /* _NEW_LIGHT */
148 if (ctx->Light.ProvokingVertex != GL_FIRST_VERTEX_CONVENTION) {
149 dw3 |= (2 << GEN6_SF_TRI_PROVOKE_SHIFT) |
150 (2 << GEN6_SF_TRIFAN_PROVOKE_SHIFT) |
151 (1 << GEN6_SF_LINE_PROVOKE_SHIFT);
152 } else {
153 dw3 |= (1 << GEN6_SF_TRIFAN_PROVOKE_SHIFT);
154 }
155
156 BEGIN_BATCH(4);
157 OUT_BATCH(_3DSTATE_SF << 16 | (4 - 2));
158 OUT_BATCH(dw1);
159 OUT_BATCH(dw2);
160 OUT_BATCH(dw3);
161 ADVANCE_BATCH();
162 }
163
164 const struct brw_tracked_state gen8_sf_state = {
165 .dirty = {
166 .mesa = _NEW_LIGHT |
167 _NEW_PROGRAM |
168 _NEW_LINE |
169 _NEW_POINT,
170 .brw = BRW_NEW_CONTEXT,
171 .cache = 0,
172 },
173 .emit = upload_sf,
174 };
175
176 static void
177 upload_raster(struct brw_context *brw)
178 {
179 struct gl_context *ctx = &brw->ctx;
180 uint32_t dw1 = 0;
181
182 /* _NEW_BUFFERS */
183 bool render_to_fbo = _mesa_is_user_fbo(brw->ctx.DrawBuffer);
184
185 /* _NEW_POLYGON */
186 if ((ctx->Polygon.FrontFace == GL_CCW) ^ render_to_fbo)
187 dw1 |= GEN8_RASTER_FRONT_WINDING_CCW;
188
189 if (ctx->Polygon.CullFlag) {
190 switch (ctx->Polygon.CullFaceMode) {
191 case GL_FRONT:
192 dw1 |= GEN8_RASTER_CULL_FRONT;
193 break;
194 case GL_BACK:
195 dw1 |= GEN8_RASTER_CULL_BACK;
196 break;
197 case GL_FRONT_AND_BACK:
198 dw1 |= GEN8_RASTER_CULL_BOTH;
199 break;
200 default:
201 assert(0);
202 break;
203 }
204 } else {
205 dw1 |= GEN8_RASTER_CULL_NONE;
206 }
207
208 /* _NEW_POINT */
209 if (ctx->Point.SmoothFlag)
210 dw1 |= GEN8_RASTER_SMOOTH_POINT_ENABLE;
211
212 if (ctx->Polygon.OffsetFill)
213 dw1 |= GEN6_SF_GLOBAL_DEPTH_OFFSET_SOLID;
214
215 if (ctx->Polygon.OffsetLine)
216 dw1 |= GEN6_SF_GLOBAL_DEPTH_OFFSET_WIREFRAME;
217
218 if (ctx->Polygon.OffsetPoint)
219 dw1 |= GEN6_SF_GLOBAL_DEPTH_OFFSET_POINT;
220
221 switch (ctx->Polygon.FrontMode) {
222 case GL_FILL:
223 dw1 |= GEN6_SF_FRONT_SOLID;
224 break;
225 case GL_LINE:
226 dw1 |= GEN6_SF_FRONT_WIREFRAME;
227 break;
228 case GL_POINT:
229 dw1 |= GEN6_SF_FRONT_POINT;
230 break;
231
232 default:
233 assert(0);
234 break;
235 }
236
237 switch (ctx->Polygon.BackMode) {
238 case GL_FILL:
239 dw1 |= GEN6_SF_BACK_SOLID;
240 break;
241 case GL_LINE:
242 dw1 |= GEN6_SF_BACK_WIREFRAME;
243 break;
244 case GL_POINT:
245 dw1 |= GEN6_SF_BACK_POINT;
246 break;
247 default:
248 assert(0);
249 break;
250 }
251
252 /* _NEW_LINE */
253 if (ctx->Line.SmoothFlag)
254 dw1 |= GEN8_RASTER_LINE_AA_ENABLE;
255
256 /* _NEW_SCISSOR */
257 if (ctx->Scissor.EnableFlags)
258 dw1 |= GEN8_RASTER_SCISSOR_ENABLE;
259
260 /* _NEW_TRANSFORM */
261 if (!ctx->Transform.DepthClamp)
262 dw1 |= GEN8_RASTER_VIEWPORT_Z_CLIP_TEST_ENABLE;
263
264 BEGIN_BATCH(5);
265 OUT_BATCH(_3DSTATE_RASTER << 16 | (5 - 2));
266 OUT_BATCH(dw1);
267 OUT_BATCH_F(ctx->Polygon.OffsetUnits * 2); /* constant. copied from gen4 */
268 OUT_BATCH_F(ctx->Polygon.OffsetFactor); /* scale */
269 OUT_BATCH_F(0.0);
270 ADVANCE_BATCH();
271 }
272
273 const struct brw_tracked_state gen8_raster_state = {
274 .dirty = {
275 .mesa = _NEW_BUFFERS |
276 _NEW_LINE |
277 _NEW_POINT |
278 _NEW_POLYGON |
279 _NEW_SCISSOR |
280 _NEW_TRANSFORM,
281 .brw = BRW_NEW_CONTEXT,
282 .cache = 0,
283 },
284 .emit = upload_raster,
285 };