src/mesa/drivers/dri/i965/gen8_sol_state.c

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 /**
  25  * @file gen8_sol_state.c
  26  *
  27  * Controls the stream output logic (SOL) stage of the gen8 hardware, which is
  28  * used to implement GL_EXT_transform_feedback.
  29  */
  30
  31 #include "brw_context.h"
  32 #include "brw_state.h"
  33 #include "brw_defines.h"
  34 #include "intel_batchbuffer.h"
  35 #include "intel_buffer_objects.h"
  36 #include "main/transformfeedback.h"
  37
  38 void
  39 gen8_upload_3dstate_so_buffers(struct brw_context *brw)
  40 {
  41    struct gl_context *ctx = &brw->ctx;
  42    /* BRW_NEW_TRANSFORM_FEEDBACK */
  43    struct gl_transform_feedback_object *xfb_obj =
  44       ctx->TransformFeedback.CurrentObject;
  45    struct brw_transform_feedback_object *brw_obj =
  46       (struct brw_transform_feedback_object *) xfb_obj;
  47    uint32_t mocs_wb = brw->gen >= 9 ? SKL_MOCS_WB : BDW_MOCS_WB;
  48
  49    /* Set up the up to 4 output buffers.  These are the ranges defined in the
  50     * gl_transform_feedback_object.
  51     */
  52    for (int i = 0; i < 4; i++) {
  53       struct intel_buffer_object *bufferobj =
  54          intel_buffer_object(xfb_obj->Buffers[i]);
  55
  56       if (!bufferobj) {
  57          BEGIN_BATCH(8);
  58          OUT_BATCH(_3DSTATE_SO_BUFFER << 16 | (8 - 2));
  59          OUT_BATCH((i << SO_BUFFER_INDEX_SHIFT));
  60          OUT_BATCH(0);
  61          OUT_BATCH(0);
  62          OUT_BATCH(0);
  63          OUT_BATCH(0);
  64          OUT_BATCH(0);
  65          OUT_BATCH(0);
  66          ADVANCE_BATCH();
  67          continue;
  68       }
  69
  70       uint32_t start = xfb_obj->Offset[i];
  71       assert(start % 4 == 0);
  72       uint32_t end = ALIGN(start + xfb_obj->Size[i], 4);
  73       drm_intel_bo *bo =
  74          intel_bufferobj_buffer(brw, bufferobj, start, end - start);
  75       assert(end <= bo->size);
  76
  77       BEGIN_BATCH(8);
  78       OUT_BATCH(_3DSTATE_SO_BUFFER << 16 | (8 - 2));
  79       OUT_BATCH(GEN8_SO_BUFFER_ENABLE | (i << SO_BUFFER_INDEX_SHIFT) |
  80                 GEN8_SO_BUFFER_OFFSET_WRITE_ENABLE |
  81                 GEN8_SO_BUFFER_OFFSET_ADDRESS_ENABLE |
  82                 (mocs_wb << 22));
  83       OUT_RELOC64(bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, start);
  84       OUT_BATCH(xfb_obj->Size[i] / 4 - 1);
  85       OUT_RELOC64(brw_obj->offset_bo,
  86                   I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
  87                   i * sizeof(uint32_t));
  88       if (brw_obj->zero_offsets)
  89          OUT_BATCH(0); /* Zero out the offset and write that to offset_bo */
  90       else
  91          OUT_BATCH(0xFFFFFFFF); /* Use offset_bo as the "Stream Offset." */
  92       ADVANCE_BATCH();
  93    }
  94    brw_obj->zero_offsets = false;
  95 }