35a77ac37cf653323e261fc02cfcda4caa079e4d
[mesa.git] / src / mesa / drivers / dri / i965 / gen8_sol_state.c
1 /*
2 * Copyright © 2012 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 /**
25 * @file gen8_sol_state.c
26 *
27 * Controls the stream output logic (SOL) stage of the gen8 hardware, which is
28 * used to implement GL_EXT_transform_feedback.
29 */
30
31 #include "brw_context.h"
32 #include "brw_state.h"
33 #include "brw_defines.h"
34 #include "intel_batchbuffer.h"
35 #include "intel_buffer_objects.h"
36 #include "main/transformfeedback.h"
37
38 static void
39 gen8_upload_3dstate_so_buffers(struct brw_context *brw)
40 {
41 struct gl_context *ctx = &brw->ctx;
42 /* BRW_NEW_TRANSFORM_FEEDBACK */
43 struct gl_transform_feedback_object *xfb_obj =
44 ctx->TransformFeedback.CurrentObject;
45 struct brw_transform_feedback_object *brw_obj =
46 (struct brw_transform_feedback_object *) xfb_obj;
47
48 /* Set up the up to 4 output buffers. These are the ranges defined in the
49 * gl_transform_feedback_object.
50 */
51 for (int i = 0; i < 4; i++) {
52 struct intel_buffer_object *bufferobj =
53 intel_buffer_object(xfb_obj->Buffers[i]);
54
55 if (!bufferobj) {
56 BEGIN_BATCH(8);
57 OUT_BATCH(_3DSTATE_SO_BUFFER << 16 | (8 - 2));
58 OUT_BATCH((i << SO_BUFFER_INDEX_SHIFT));
59 OUT_BATCH(0);
60 OUT_BATCH(0);
61 OUT_BATCH(0);
62 OUT_BATCH(0);
63 OUT_BATCH(0);
64 OUT_BATCH(0);
65 ADVANCE_BATCH();
66 continue;
67 }
68
69 uint32_t start = xfb_obj->Offset[i];
70 assert(start % 4 == 0);
71 uint32_t end = ALIGN(start + xfb_obj->Size[i], 4);
72 drm_intel_bo *bo =
73 intel_bufferobj_buffer(brw, bufferobj, start, end - start);
74 assert(end <= bo->size);
75
76 perf_debug("Missing MOCS setup for 3DSTATE_SO_BUFFER.");
77
78 BEGIN_BATCH(8);
79 OUT_BATCH(_3DSTATE_SO_BUFFER << 16 | (8 - 2));
80 OUT_BATCH(GEN8_SO_BUFFER_ENABLE | (i << SO_BUFFER_INDEX_SHIFT) |
81 GEN8_SO_BUFFER_OFFSET_WRITE_ENABLE |
82 GEN8_SO_BUFFER_OFFSET_ADDRESS_ENABLE);
83 OUT_RELOC64(bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, start);
84 OUT_BATCH(xfb_obj->Size[i] / 4 - 1);
85 OUT_RELOC64(brw_obj->offset_bo,
86 I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
87 i * sizeof(uint32_t));
88 if (brw_obj->zero_offsets)
89 OUT_BATCH(0); /* Zero out the offset and write that to offset_bo */
90 else
91 OUT_BATCH(0xFFFFFFFF); /* Use offset_bo as the "Stream Offset." */
92 ADVANCE_BATCH();
93 }
94 brw_obj->zero_offsets = false;
95 }
96
97 static void
98 gen8_upload_3dstate_streamout(struct brw_context *brw, bool active,
99 struct brw_vue_map *vue_map)
100 {
101 struct gl_context *ctx = &brw->ctx;
102
103 /* BRW_NEW_VERTEX_PROGRAM */
104 const struct gl_shader_program *vs_prog =
105 ctx->Shader.CurrentProgram[MESA_SHADER_VERTEX];
106 /* BRW_NEW_TRANSFORM_FEEDBACK */
107 const struct gl_transform_feedback_info *linked_xfb_info =
108 &vs_prog->LinkedTransformFeedback;
109 struct gl_transform_feedback_object *xfb_obj =
110 ctx->TransformFeedback.CurrentObject;
111 uint32_t dw1 = 0, dw2 = 0, dw3 = 0, dw4 = 0;
112
113 if (active) {
114 int urb_entry_read_offset = 0;
115 int urb_entry_read_length = (vue_map->num_slots + 1) / 2 -
116 urb_entry_read_offset;
117
118 dw1 |= SO_FUNCTION_ENABLE;
119 dw1 |= SO_STATISTICS_ENABLE;
120
121 /* _NEW_LIGHT */
122 if (ctx->Light.ProvokingVertex != GL_FIRST_VERTEX_CONVENTION)
123 dw1 |= SO_REORDER_TRAILING;
124
125 /* We always read the whole vertex. This could be reduced at some
126 * point by reading less and offsetting the register index in the
127 * SO_DECLs.
128 */
129 dw2 |= urb_entry_read_offset << SO_STREAM_0_VERTEX_READ_OFFSET_SHIFT;
130 dw2 |= (urb_entry_read_length - 1) << SO_STREAM_0_VERTEX_READ_LENGTH_SHIFT;
131
132 /* Set buffer pitches; 0 means unbound. */
133 if (xfb_obj->Buffers[0])
134 dw3 |= linked_xfb_info->BufferStride[0] * 4;
135 if (xfb_obj->Buffers[1])
136 dw3 |= (linked_xfb_info->BufferStride[1] * 4) << 16;
137 if (xfb_obj->Buffers[2])
138 dw4 |= linked_xfb_info->BufferStride[2] * 4;
139 if (xfb_obj->Buffers[3])
140 dw4 |= (linked_xfb_info->BufferStride[3] * 4) << 16;
141 }
142
143 BEGIN_BATCH(5);
144 OUT_BATCH(_3DSTATE_STREAMOUT << 16 | (5 - 2));
145 OUT_BATCH(dw1);
146 OUT_BATCH(dw2);
147 OUT_BATCH(dw3);
148 OUT_BATCH(dw4);
149 ADVANCE_BATCH();
150 }
151
152 static void
153 upload_sol_state(struct brw_context *brw)
154 {
155 struct gl_context *ctx = &brw->ctx;
156 /* BRW_NEW_TRANSFORM_FEEDBACK */
157 bool active = _mesa_is_xfb_active_and_unpaused(ctx);
158
159 if (active) {
160 gen8_upload_3dstate_so_buffers(brw);
161 /* BRW_NEW_VUE_MAP_GEOM_OUT */
162 gen7_upload_3dstate_so_decl_list(brw, &brw->vue_map_geom_out);
163 }
164
165 gen8_upload_3dstate_streamout(brw, active, &brw->vue_map_geom_out);
166 }
167
168 const struct brw_tracked_state gen8_sol_state = {
169 .dirty = {
170 .mesa = _NEW_LIGHT,
171 .brw = BRW_NEW_BATCH |
172 BRW_NEW_RASTERIZER_DISCARD |
173 BRW_NEW_TRANSFORM_FEEDBACK |
174 BRW_NEW_VERTEX_PROGRAM |
175 BRW_NEW_VUE_MAP_GEOM_OUT,
176 .cache = 0,
177 },
178 .emit = upload_sol_state,
179 };