src/mesa/drivers/dri/i965/gen8_sol_state.c

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 /**
  25  * @file gen8_sol_state.c
  26  *
  27  * Controls the stream output logic (SOL) stage of the gen8 hardware, which is
  28  * used to implement GL_EXT_transform_feedback.
  29  */
  30
  31 #include "brw_context.h"
  32 #include "brw_state.h"
  33 #include "brw_defines.h"
  34 #include "intel_batchbuffer.h"
  35 #include "intel_buffer_objects.h"
  36 #include "main/transformfeedback.h"
  37
  38 static void
  39 gen8_upload_3dstate_so_buffers(struct brw_context *brw)
  40 {
  41    struct gl_context *ctx = &brw->ctx;
  42    /* BRW_NEW_TRANSFORM_FEEDBACK */
  43    struct gl_transform_feedback_object *xfb_obj =
  44       ctx->TransformFeedback.CurrentObject;
  45    struct brw_transform_feedback_object *brw_obj =
  46       (struct brw_transform_feedback_object *) xfb_obj;
  47
  48    /* Set up the up to 4 output buffers.  These are the ranges defined in the
  49     * gl_transform_feedback_object.
  50     */
  51    for (int i = 0; i < 4; i++) {
  52       struct intel_buffer_object *bufferobj =
  53          intel_buffer_object(xfb_obj->Buffers[i]);
  54
  55       if (!bufferobj) {
  56          BEGIN_BATCH(8);
  57          OUT_BATCH(_3DSTATE_SO_BUFFER << 16 | (8 - 2));
  58          OUT_BATCH((i << SO_BUFFER_INDEX_SHIFT));
  59          OUT_BATCH(0);
  60          OUT_BATCH(0);
  61          OUT_BATCH(0);
  62          OUT_BATCH(0);
  63          OUT_BATCH(0);
  64          OUT_BATCH(0);
  65          ADVANCE_BATCH();
  66          continue;
  67       }
  68
  69       uint32_t start = xfb_obj->Offset[i];
  70       assert(start % 4 == 0);
  71       uint32_t end = ALIGN(start + xfb_obj->Size[i], 4);
  72       drm_intel_bo *bo =
  73          intel_bufferobj_buffer(brw, bufferobj, start, end - start);
  74       assert(end <= bo->size);
  75
  76       perf_debug("Missing MOCS setup for 3DSTATE_SO_BUFFER.");
  77
  78       BEGIN_BATCH(8);
  79       OUT_BATCH(_3DSTATE_SO_BUFFER << 16 | (8 - 2));
  80       OUT_BATCH(GEN8_SO_BUFFER_ENABLE | (i << SO_BUFFER_INDEX_SHIFT) |
  81                 GEN8_SO_BUFFER_OFFSET_WRITE_ENABLE |
  82                 GEN8_SO_BUFFER_OFFSET_ADDRESS_ENABLE |
  83                 (BDW_MOCS_WB << 22));
  84       OUT_RELOC64(bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, start);
  85       OUT_BATCH(xfb_obj->Size[i] / 4 - 1);
  86       OUT_RELOC64(brw_obj->offset_bo,
  87                   I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
  88                   i * sizeof(uint32_t));
  89       if (brw_obj->zero_offsets)
  90          OUT_BATCH(0); /* Zero out the offset and write that to offset_bo */
  91       else
  92          OUT_BATCH(0xFFFFFFFF); /* Use offset_bo as the "Stream Offset." */
  93       ADVANCE_BATCH();
  94    }
  95    brw_obj->zero_offsets = false;
  96 }
  97
  98 static void
  99 gen8_upload_3dstate_streamout(struct brw_context *brw, bool active,
 100                               struct brw_vue_map *vue_map)
 101 {
 102    struct gl_context *ctx = &brw->ctx;
 103
 104    /* BRW_NEW_VERTEX_PROGRAM */
 105    const struct gl_shader_program *vs_prog =
 106       ctx->Shader.CurrentProgram[MESA_SHADER_VERTEX];
 107    /* BRW_NEW_TRANSFORM_FEEDBACK */
 108    const struct gl_transform_feedback_info *linked_xfb_info =
 109       &vs_prog->LinkedTransformFeedback;
 110    struct gl_transform_feedback_object *xfb_obj =
 111       ctx->TransformFeedback.CurrentObject;
 112    uint32_t dw1 = 0, dw2 = 0, dw3 = 0, dw4 = 0;
 113
 114    if (active) {
 115       int urb_entry_read_offset = 0;
 116       int urb_entry_read_length = (vue_map->num_slots + 1) / 2 -
 117          urb_entry_read_offset;
 118
 119       dw1 |= SO_FUNCTION_ENABLE;
 120       dw1 |= SO_STATISTICS_ENABLE;
 121
 122       /* _NEW_LIGHT */
 123       if (ctx->Light.ProvokingVertex != GL_FIRST_VERTEX_CONVENTION)
 124          dw1 |= SO_REORDER_TRAILING;
 125
 126       /* We always read the whole vertex.  This could be reduced at some
 127        * point by reading less and offsetting the register index in the
 128        * SO_DECLs.
 129        */
 130       dw2 |= urb_entry_read_offset << SO_STREAM_0_VERTEX_READ_OFFSET_SHIFT;
 131       dw2 |= (urb_entry_read_length - 1) << SO_STREAM_0_VERTEX_READ_LENGTH_SHIFT;
 132
 133       /* Set buffer pitches; 0 means unbound. */
 134       if (xfb_obj->Buffers[0])
 135          dw3 |= linked_xfb_info->BufferStride[0] * 4;
 136       if (xfb_obj->Buffers[1])
 137          dw3 |= (linked_xfb_info->BufferStride[1] * 4) << 16;
 138       if (xfb_obj->Buffers[2])
 139          dw4 |= linked_xfb_info->BufferStride[2] * 4;
 140       if (xfb_obj->Buffers[3])
 141          dw4 |= (linked_xfb_info->BufferStride[3] * 4) << 16;
 142    }
 143
 144    BEGIN_BATCH(5);
 145    OUT_BATCH(_3DSTATE_STREAMOUT << 16 | (5 - 2));
 146    OUT_BATCH(dw1);
 147    OUT_BATCH(dw2);
 148    OUT_BATCH(dw3);
 149    OUT_BATCH(dw4);
 150    ADVANCE_BATCH();
 151 }
 152
 153 static void
 154 upload_sol_state(struct brw_context *brw)
 155 {
 156    struct gl_context *ctx = &brw->ctx;
 157    /* BRW_NEW_TRANSFORM_FEEDBACK */
 158    bool active = _mesa_is_xfb_active_and_unpaused(ctx);
 159
 160    if (active) {
 161       gen8_upload_3dstate_so_buffers(brw);
 162       /* BRW_NEW_VUE_MAP_GEOM_OUT */
 163       gen7_upload_3dstate_so_decl_list(brw, &brw->vue_map_geom_out);
 164    }
 165
 166    gen8_upload_3dstate_streamout(brw, active, &brw->vue_map_geom_out);
 167 }
 168
 169 const struct brw_tracked_state gen8_sol_state = {
 170    .dirty = {
 171       .mesa  = _NEW_LIGHT,
 172       .brw   = BRW_NEW_BATCH |
 173                BRW_NEW_RASTERIZER_DISCARD |
 174                BRW_NEW_TRANSFORM_FEEDBACK |
 175                BRW_NEW_VERTEX_PROGRAM |
 176                BRW_NEW_VUE_MAP_GEOM_OUT,
 177       .cache = 0,
 178    },
 179    .emit = upload_sol_state,
 180 };