2 * Copyright © 2011 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 #include "brw_context.h"
25 #include "brw_state.h"
26 #include "brw_defines.h"
28 #include "program/prog_parameter.h"
29 #include "program/prog_statevars.h"
30 #include "intel_batchbuffer.h"
33 gen8_upload_constant_state(struct brw_context
*brw
,
34 const struct brw_stage_state
*stage_state
,
35 bool active
, unsigned opcode
)
37 /* Disable if the shader stage is inactive or there are no push constants. */
38 active
= active
&& stage_state
->push_const_size
!= 0;
41 OUT_BATCH(opcode
<< 16 | (11 - 2));
42 OUT_BATCH(active
? stage_state
->push_const_size
: 0);
44 OUT_BATCH(active
? stage_state
->push_const_offset
: 0);
56 upload_vs_state(struct brw_context
*brw
)
58 struct gl_context
*ctx
= &brw
->ctx
;
59 const struct brw_stage_state
*stage_state
= &brw
->vs
.base
;
60 uint32_t floating_point_mode
= 0;
62 /* CACHE_NEW_VS_PROG */
63 const struct brw_vec4_prog_data
*prog_data
= &brw
->vs
.prog_data
->base
;
65 /* BRW_NEW_VS_BINDING_TABLE */
67 OUT_BATCH(_3DSTATE_BINDING_TABLE_POINTERS_VS
<< 16 | (2 - 2));
68 OUT_BATCH(stage_state
->bind_bo_offset
);
71 /* CACHE_NEW_SAMPLER */
73 OUT_BATCH(_3DSTATE_SAMPLER_STATE_POINTERS_VS
<< 16 | (2 - 2));
74 OUT_BATCH(stage_state
->sampler_offset
);
77 gen8_upload_constant_state(brw
, stage_state
, true /* active */,
78 _3DSTATE_CONSTANT_VS
);
80 /* Use ALT floating point mode for ARB vertex programs, because they
83 if (ctx
->Shader
.CurrentProgram
[MESA_SHADER_VERTEX
] == NULL
)
84 floating_point_mode
= GEN6_VS_FLOATING_POINT_MODE_ALT
;
87 OUT_BATCH(_3DSTATE_VS
<< 16 | (9 - 2));
88 OUT_BATCH(stage_state
->prog_offset
);
90 OUT_BATCH(floating_point_mode
|
91 ((ALIGN(stage_state
->sampler_count
, 4) / 4) <<
92 GEN6_VS_SAMPLER_COUNT_SHIFT
) |
93 ((prog_data
->base
.binding_table
.size_bytes
/ 4) <<
94 GEN6_VS_BINDING_TABLE_ENTRY_COUNT_SHIFT
));
96 if (prog_data
->total_scratch
) {
97 OUT_RELOC64(stage_state
->scratch_bo
,
98 I915_GEM_DOMAIN_RENDER
, I915_GEM_DOMAIN_RENDER
,
99 ffs(prog_data
->total_scratch
) - 11);
105 OUT_BATCH((prog_data
->dispatch_grf_start_reg
<<
106 GEN6_VS_DISPATCH_START_GRF_SHIFT
) |
107 (prog_data
->urb_read_length
<< GEN6_VS_URB_READ_LENGTH_SHIFT
) |
108 (0 << GEN6_VS_URB_ENTRY_READ_OFFSET_SHIFT
));
110 OUT_BATCH(((brw
->max_vs_threads
- 1) << HSW_VS_MAX_THREADS_SHIFT
) |
111 GEN6_VS_STATISTICS_ENABLE
|
115 OUT_BATCH((ctx
->Transform
.ClipPlanesEnabled
<<
116 GEN8_VS_USER_CLIP_DISTANCE_SHIFT
));
120 const struct brw_tracked_state gen8_vs_state
= {
122 .mesa
= _NEW_TRANSFORM
| _NEW_PROGRAM_CONSTANTS
,
123 .brw
= BRW_NEW_CONTEXT
|
124 BRW_NEW_VERTEX_PROGRAM
|
125 BRW_NEW_VS_BINDING_TABLE
|
127 BRW_NEW_PUSH_CONSTANT_ALLOCATION
,
128 .cache
= CACHE_NEW_VS_PROG
| CACHE_NEW_SAMPLER
130 .emit
= upload_vs_state
,