src/mesa/drivers/dri/i965/gen8_wm_depth_stencil.c

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "intel_batchbuffer.h"
  25 #include "intel_fbo.h"
  26 #include "brw_context.h"
  27 #include "brw_defines.h"
  28 #include "brw_state.h"
  29 #include "main/stencil.h"
  30
  31 static void
  32 gen8_upload_wm_depth_stencil(struct brw_context *brw)
  33 {
  34    struct gl_context *ctx = &brw->ctx;
  35    uint32_t dw1 = 0, dw2 = 0, dw3 = 0;
  36
  37    /* _NEW_BUFFERS */
  38    struct intel_renderbuffer *depth_irb =
  39       intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_DEPTH);
  40
  41    struct gl_stencil_attrib *stencil = &ctx->Stencil;
  42
  43    /* _NEW_STENCIL | _NEW_BUFFERS */
  44    if (stencil->_Enabled) {
  45       #define FUNC intel_translate_compare_func
  46       #define OP intel_translate_stencil_op
  47
  48       dw1 |=
  49          GEN8_WM_DS_STENCIL_TEST_ENABLE |
  50          FUNC(stencil->Function[0]) << GEN8_WM_DS_STENCIL_FUNC_SHIFT |
  51          OP(stencil->FailFunc[0])  << GEN8_WM_DS_STENCIL_FAIL_OP_SHIFT |
  52          OP(stencil->ZFailFunc[0]) << GEN8_WM_DS_Z_FAIL_OP_SHIFT |
  53          OP(stencil->ZPassFunc[0]) << GEN8_WM_DS_Z_PASS_OP_SHIFT;
  54
  55       if (stencil->_WriteEnabled)
  56          dw1 |= GEN8_WM_DS_STENCIL_BUFFER_WRITE_ENABLE;
  57
  58       dw2 |=
  59          SET_FIELD(stencil->WriteMask[0] & 0xff, GEN8_WM_DS_STENCIL_WRITE_MASK) |
  60          SET_FIELD(stencil->ValueMask[0] & 0xff, GEN8_WM_DS_STENCIL_TEST_MASK);
  61
  62       if (stencil->_TestTwoSide) {
  63          const int b = stencil->_BackFace;
  64
  65          dw1 |=
  66             GEN8_WM_DS_DOUBLE_SIDED_STENCIL_ENABLE |
  67             FUNC(stencil->Function[b]) << GEN8_WM_DS_BF_STENCIL_FUNC_SHIFT |
  68             OP(stencil->FailFunc[b]) << GEN8_WM_DS_BF_STENCIL_FAIL_OP_SHIFT |
  69             OP(stencil->ZFailFunc[b]) << GEN8_WM_DS_BF_Z_FAIL_OP_SHIFT |
  70             OP(stencil->ZPassFunc[b]) << GEN8_WM_DS_BF_Z_PASS_OP_SHIFT;
  71
  72          dw2 |= SET_FIELD(stencil->WriteMask[b] & 0xff,
  73                           GEN8_WM_DS_BF_STENCIL_WRITE_MASK) |
  74                 SET_FIELD(stencil->ValueMask[b] & 0xff,
  75                           GEN8_WM_DS_BF_STENCIL_TEST_MASK);
  76       }
  77
  78       if (brw->gen >= 9) {
  79          int stencil_ref  = _mesa_get_stencil_ref(ctx, 0);
  80          int backface_ref = _mesa_get_stencil_ref(ctx, ctx->Stencil._BackFace);
  81
  82          dw3 = SET_FIELD(stencil_ref, GEN9_WM_DS_STENCIL_REF) |
  83                SET_FIELD(backface_ref, GEN9_WM_DS_BF_STENCIL_REF);
  84       }
  85    }
  86
  87    /* _NEW_DEPTH */
  88    if (ctx->Depth.Test && depth_irb) {
  89       dw1 |=
  90          GEN8_WM_DS_DEPTH_TEST_ENABLE |
  91          FUNC(ctx->Depth.Func) << GEN8_WM_DS_DEPTH_FUNC_SHIFT;
  92
  93       if (ctx->Depth.Mask)
  94          dw1 |= GEN8_WM_DS_DEPTH_BUFFER_WRITE_ENABLE;
  95    }
  96
  97    int pkt_len = brw->gen >= 9 ? 4 : 3;
  98
  99    BEGIN_BATCH(pkt_len);
 100    OUT_BATCH(_3DSTATE_WM_DEPTH_STENCIL << 16 | (pkt_len - 2));
 101    OUT_BATCH(dw1);
 102    OUT_BATCH(dw2);
 103    if (pkt_len > 3) {
 104       OUT_BATCH(dw3);
 105    }
 106    ADVANCE_BATCH();
 107 }
 108
 109 const struct brw_tracked_state gen8_wm_depth_stencil = {
 110    .dirty = {
 111       .mesa = _NEW_BUFFERS |
 112               _NEW_DEPTH |
 113               _NEW_STENCIL,
 114       .brw  = BRW_NEW_CONTEXT,
 115       .cache = 0,
 116    },
 117    .emit = gen8_upload_wm_depth_stencil,
 118 };