i965: Get real per-gen atom lists
[mesa.git] / src / mesa / drivers / dri / i965 / genX_state_upload.c
1 /*
2 * Copyright © 2017 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <assert.h>
25
26 #include "common/gen_device_info.h"
27 #include "genxml/gen_macros.h"
28
29 #include "brw_context.h"
30 #include "brw_state.h"
31
32 #include "intel_batchbuffer.h"
33
34 UNUSED static void *
35 emit_dwords(struct brw_context *brw, unsigned n)
36 {
37 intel_batchbuffer_begin(brw, n, RENDER_RING);
38 uint32_t *map = brw->batch.map_next;
39 brw->batch.map_next += n;
40 intel_batchbuffer_advance(brw);
41 return map;
42 }
43
44 struct brw_address {
45 struct brw_bo *bo;
46 uint32_t read_domains;
47 uint32_t write_domain;
48 uint32_t offset;
49 };
50
51 static uint64_t
52 emit_reloc(struct brw_context *brw,
53 void *location, struct brw_address address, uint32_t delta)
54 {
55 uint32_t offset = (char *) location - (char *) brw->batch.map;
56
57 return brw_emit_reloc(&brw->batch, offset, address.bo,
58 address.offset + delta,
59 address.read_domains,
60 address.write_domain);
61 }
62
63 #define __gen_address_type struct brw_address
64 #define __gen_user_data struct brw_context
65
66 static uint64_t
67 __gen_combine_address(struct brw_context *brw, void *location,
68 struct brw_address address, uint32_t delta)
69 {
70 if (address.bo == NULL) {
71 return address.offset + delta;
72 } else {
73 return emit_reloc(brw, location, address, delta);
74 }
75 }
76
77 #include "genxml/genX_pack.h"
78
79 #define _brw_cmd_length(cmd) cmd ## _length
80 #define _brw_cmd_length_bias(cmd) cmd ## _length_bias
81 #define _brw_cmd_header(cmd) cmd ## _header
82 #define _brw_cmd_pack(cmd) cmd ## _pack
83
84 #define brw_batch_emit(brw, cmd, name) \
85 for (struct cmd name = { _brw_cmd_header(cmd) }, \
86 *_dst = emit_dwords(brw, _brw_cmd_length(cmd)); \
87 __builtin_expect(_dst != NULL, 1); \
88 _brw_cmd_pack(cmd)(brw, (void *)_dst, &name), \
89 _dst = NULL)
90
91 #define brw_batch_emitn(brw, cmd, n) ({ \
92 uint32_t *_dw = emit_dwords(brw, n); \
93 struct cmd template = { \
94 _brw_cmd_header(cmd), \
95 .DWordLength = n - _brw_cmd_length_bias(cmd), \
96 }; \
97 _brw_cmd_pack(cmd)(brw, _dw, &template); \
98 _dw + 1; /* Array starts at dw[1] */ \
99 })
100
101 #define brw_state_emit(brw, cmd, align, offset, name) \
102 for (struct cmd name = { 0, }, \
103 *_dst = brw_state_batch(brw, _brw_cmd_length(cmd) * 4, \
104 align, offset); \
105 __builtin_expect(_dst != NULL, 1); \
106 _brw_cmd_pack(cmd)(brw, (void *)_dst, &name), \
107 _dst = NULL)
108
109 /* ---------------------------------------------------------------------- */
110
111
112 /* ---------------------------------------------------------------------- */
113
114 void
115 genX(init_atoms)(struct brw_context *brw)
116 {
117 #if GEN_GEN < 6
118 static const struct brw_tracked_state *render_atoms[] =
119 {
120 /* Once all the programs are done, we know how large urb entry
121 * sizes need to be and can decide if we need to change the urb
122 * layout.
123 */
124 &brw_curbe_offsets,
125 &brw_recalculate_urb_fence,
126
127 &brw_cc_vp,
128 &brw_cc_unit,
129
130 /* Surface state setup. Must come before the VS/WM unit. The binding
131 * table upload must be last.
132 */
133 &brw_vs_pull_constants,
134 &brw_wm_pull_constants,
135 &brw_renderbuffer_surfaces,
136 &brw_renderbuffer_read_surfaces,
137 &brw_texture_surfaces,
138 &brw_vs_binding_table,
139 &brw_wm_binding_table,
140
141 &brw_fs_samplers,
142 &brw_vs_samplers,
143
144 /* These set up state for brw_psp_urb_cbs */
145 &brw_wm_unit,
146 &brw_sf_vp,
147 &brw_sf_unit,
148 &brw_vs_unit, /* always required, enabled or not */
149 &brw_clip_unit,
150 &brw_gs_unit,
151
152 /* Command packets:
153 */
154 &brw_invariant_state,
155
156 &brw_binding_table_pointers,
157 &brw_blend_constant_color,
158
159 &brw_depthbuffer,
160
161 &brw_polygon_stipple,
162 &brw_polygon_stipple_offset,
163
164 &brw_line_stipple,
165
166 &brw_psp_urb_cbs,
167
168 &brw_drawing_rect,
169 &brw_indices, /* must come before brw_vertices */
170 &brw_index_buffer,
171 &brw_vertices,
172
173 &brw_constant_buffer
174 };
175 #elif GEN_GEN == 6
176 static const struct brw_tracked_state *render_atoms[] =
177 {
178 &gen6_sf_and_clip_viewports,
179
180 /* Command packets: */
181
182 &brw_cc_vp,
183 &gen6_viewport_state, /* must do after *_vp stages */
184
185 &gen6_urb,
186 &gen6_blend_state, /* must do before cc unit */
187 &gen6_color_calc_state, /* must do before cc unit */
188 &gen6_depth_stencil_state, /* must do before cc unit */
189
190 &gen6_vs_push_constants, /* Before vs_state */
191 &gen6_gs_push_constants, /* Before gs_state */
192 &gen6_wm_push_constants, /* Before wm_state */
193
194 /* Surface state setup. Must come before the VS/WM unit. The binding
195 * table upload must be last.
196 */
197 &brw_vs_pull_constants,
198 &brw_vs_ubo_surfaces,
199 &brw_gs_pull_constants,
200 &brw_gs_ubo_surfaces,
201 &brw_wm_pull_constants,
202 &brw_wm_ubo_surfaces,
203 &gen6_renderbuffer_surfaces,
204 &brw_renderbuffer_read_surfaces,
205 &brw_texture_surfaces,
206 &gen6_sol_surface,
207 &brw_vs_binding_table,
208 &gen6_gs_binding_table,
209 &brw_wm_binding_table,
210
211 &brw_fs_samplers,
212 &brw_vs_samplers,
213 &brw_gs_samplers,
214 &gen6_sampler_state,
215 &gen6_multisample_state,
216
217 &gen6_vs_state,
218 &gen6_gs_state,
219 &gen6_clip_state,
220 &gen6_sf_state,
221 &gen6_wm_state,
222
223 &gen6_scissor_state,
224
225 &gen6_binding_table_pointers,
226
227 &brw_depthbuffer,
228
229 &brw_polygon_stipple,
230 &brw_polygon_stipple_offset,
231
232 &brw_line_stipple,
233
234 &brw_drawing_rect,
235
236 &brw_indices, /* must come before brw_vertices */
237 &brw_index_buffer,
238 &brw_vertices,
239 };
240 #elif GEN_GEN == 7
241 static const struct brw_tracked_state *render_atoms[] =
242 {
243 /* Command packets: */
244
245 &brw_cc_vp,
246 &gen7_sf_clip_viewport,
247
248 &gen7_l3_state,
249 &gen7_push_constant_space,
250 &gen7_urb,
251 &gen6_blend_state, /* must do before cc unit */
252 &gen6_color_calc_state, /* must do before cc unit */
253 &gen6_depth_stencil_state, /* must do before cc unit */
254
255 &brw_vs_image_surfaces, /* Before vs push/pull constants and binding table */
256 &brw_tcs_image_surfaces, /* Before tcs push/pull constants and binding table */
257 &brw_tes_image_surfaces, /* Before tes push/pull constants and binding table */
258 &brw_gs_image_surfaces, /* Before gs push/pull constants and binding table */
259 &brw_wm_image_surfaces, /* Before wm push/pull constants and binding table */
260
261 &gen6_vs_push_constants, /* Before vs_state */
262 &gen7_tcs_push_constants,
263 &gen7_tes_push_constants,
264 &gen6_gs_push_constants, /* Before gs_state */
265 &gen6_wm_push_constants, /* Before wm_surfaces and constant_buffer */
266
267 /* Surface state setup. Must come before the VS/WM unit. The binding
268 * table upload must be last.
269 */
270 &brw_vs_pull_constants,
271 &brw_vs_ubo_surfaces,
272 &brw_vs_abo_surfaces,
273 &brw_tcs_pull_constants,
274 &brw_tcs_ubo_surfaces,
275 &brw_tcs_abo_surfaces,
276 &brw_tes_pull_constants,
277 &brw_tes_ubo_surfaces,
278 &brw_tes_abo_surfaces,
279 &brw_gs_pull_constants,
280 &brw_gs_ubo_surfaces,
281 &brw_gs_abo_surfaces,
282 &brw_wm_pull_constants,
283 &brw_wm_ubo_surfaces,
284 &brw_wm_abo_surfaces,
285 &gen6_renderbuffer_surfaces,
286 &brw_renderbuffer_read_surfaces,
287 &brw_texture_surfaces,
288 &brw_vs_binding_table,
289 &brw_tcs_binding_table,
290 &brw_tes_binding_table,
291 &brw_gs_binding_table,
292 &brw_wm_binding_table,
293
294 &brw_fs_samplers,
295 &brw_vs_samplers,
296 &brw_tcs_samplers,
297 &brw_tes_samplers,
298 &brw_gs_samplers,
299 &gen6_multisample_state,
300
301 &gen7_vs_state,
302 &gen7_hs_state,
303 &gen7_te_state,
304 &gen7_ds_state,
305 &gen7_gs_state,
306 &gen7_sol_state,
307 &gen6_clip_state,
308 &gen7_sbe_state,
309 &gen7_sf_state,
310 &gen7_wm_state,
311 &gen7_ps_state,
312
313 &gen6_scissor_state,
314
315 &gen7_depthbuffer,
316
317 &brw_polygon_stipple,
318 &brw_polygon_stipple_offset,
319
320 &brw_line_stipple,
321
322 &brw_drawing_rect,
323
324 &brw_indices, /* must come before brw_vertices */
325 &brw_index_buffer,
326 &brw_vertices,
327
328 &haswell_cut_index,
329 };
330 #elif GEN_GEN >= 8
331 static const struct brw_tracked_state *render_atoms[] =
332 {
333 &brw_cc_vp,
334 &gen8_sf_clip_viewport,
335
336 &gen7_l3_state,
337 &gen7_push_constant_space,
338 &gen7_urb,
339 &gen8_blend_state,
340 &gen6_color_calc_state,
341
342 &brw_vs_image_surfaces, /* Before vs push/pull constants and binding table */
343 &brw_tcs_image_surfaces, /* Before tcs push/pull constants and binding table */
344 &brw_tes_image_surfaces, /* Before tes push/pull constants and binding table */
345 &brw_gs_image_surfaces, /* Before gs push/pull constants and binding table */
346 &brw_wm_image_surfaces, /* Before wm push/pull constants and binding table */
347
348 &gen6_vs_push_constants, /* Before vs_state */
349 &gen7_tcs_push_constants,
350 &gen7_tes_push_constants,
351 &gen6_gs_push_constants, /* Before gs_state */
352 &gen6_wm_push_constants, /* Before wm_surfaces and constant_buffer */
353
354 /* Surface state setup. Must come before the VS/WM unit. The binding
355 * table upload must be last.
356 */
357 &brw_vs_pull_constants,
358 &brw_vs_ubo_surfaces,
359 &brw_vs_abo_surfaces,
360 &brw_tcs_pull_constants,
361 &brw_tcs_ubo_surfaces,
362 &brw_tcs_abo_surfaces,
363 &brw_tes_pull_constants,
364 &brw_tes_ubo_surfaces,
365 &brw_tes_abo_surfaces,
366 &brw_gs_pull_constants,
367 &brw_gs_ubo_surfaces,
368 &brw_gs_abo_surfaces,
369 &brw_wm_pull_constants,
370 &brw_wm_ubo_surfaces,
371 &brw_wm_abo_surfaces,
372 &gen6_renderbuffer_surfaces,
373 &brw_renderbuffer_read_surfaces,
374 &brw_texture_surfaces,
375 &brw_vs_binding_table,
376 &brw_tcs_binding_table,
377 &brw_tes_binding_table,
378 &brw_gs_binding_table,
379 &brw_wm_binding_table,
380
381 &brw_fs_samplers,
382 &brw_vs_samplers,
383 &brw_tcs_samplers,
384 &brw_tes_samplers,
385 &brw_gs_samplers,
386 &gen8_multisample_state,
387
388 &gen8_vs_state,
389 &gen8_hs_state,
390 &gen7_te_state,
391 &gen8_ds_state,
392 &gen8_gs_state,
393 &gen7_sol_state,
394 &gen6_clip_state,
395 &gen8_raster_state,
396 &gen8_sbe_state,
397 &gen8_sf_state,
398 &gen8_ps_blend,
399 &gen8_ps_extra,
400 &gen8_ps_state,
401 &gen8_wm_depth_stencil,
402 &gen8_wm_state,
403
404 &gen6_scissor_state,
405
406 &gen7_depthbuffer,
407
408 &brw_polygon_stipple,
409 &brw_polygon_stipple_offset,
410
411 &brw_line_stipple,
412
413 &brw_drawing_rect,
414
415 &gen8_vf_topology,
416
417 &brw_indices,
418 &gen8_index_buffer,
419 &gen8_vertices,
420
421 &haswell_cut_index,
422 &gen8_pma_fix,
423 };
424 #endif
425
426 STATIC_ASSERT(ARRAY_SIZE(render_atoms) <= ARRAY_SIZE(brw->render_atoms));
427 brw_copy_pipeline_atoms(brw, BRW_RENDER_PIPELINE,
428 render_atoms, ARRAY_SIZE(render_atoms));
429
430 #if GEN_GEN >= 7
431 static const struct brw_tracked_state *compute_atoms[] =
432 {
433 &gen7_l3_state,
434 &brw_cs_image_surfaces,
435 &gen7_cs_push_constants,
436 &brw_cs_pull_constants,
437 &brw_cs_ubo_surfaces,
438 &brw_cs_abo_surfaces,
439 &brw_cs_texture_surfaces,
440 &brw_cs_work_groups_surface,
441 &brw_cs_samplers,
442 &brw_cs_state,
443 };
444
445 STATIC_ASSERT(ARRAY_SIZE(compute_atoms) <= ARRAY_SIZE(brw->compute_atoms));
446 brw_copy_pipeline_atoms(brw, BRW_COMPUTE_PIPELINE,
447 compute_atoms, ARRAY_SIZE(compute_atoms));
448 #endif
449 }