48439513d58c00f0578cef7563a1adc2ea7b265a
[mesa.git] / src / mesa / drivers / dri / i965 / intel_batchbuffer.h
1 #ifndef INTEL_BATCHBUFFER_H
2 #define INTEL_BATCHBUFFER_H
3
4 #include "main/mtypes.h"
5
6 #include "brw_context.h"
7 #include "intel_bufmgr.h"
8 #include "intel_reg.h"
9
10 #ifdef __cplusplus
11 extern "C" {
12 #endif
13
14 /**
15 * Number of bytes to reserve for commands necessary to complete a batch.
16 *
17 * This includes:
18 * - MI_BATCHBUFFER_END (4 bytes)
19 * - Optional MI_NOOP for ensuring the batch length is qword aligned (4 bytes)
20 * - Any state emitted by vtbl->finish_batch():
21 * - Gen4-5 record ending occlusion query values (4 * 4 = 16 bytes)
22 */
23 #define BATCH_RESERVED 24
24
25 struct intel_batchbuffer;
26
27 void intel_batchbuffer_init(struct brw_context *brw);
28 void intel_batchbuffer_free(struct brw_context *brw);
29 void intel_batchbuffer_save_state(struct brw_context *brw);
30 void intel_batchbuffer_reset_to_saved(struct brw_context *brw);
31
32 int _intel_batchbuffer_flush(struct brw_context *brw,
33 const char *file, int line);
34
35 #define intel_batchbuffer_flush(intel) \
36 _intel_batchbuffer_flush(intel, __FILE__, __LINE__)
37
38
39
40 /* Unlike bmBufferData, this currently requires the buffer be mapped.
41 * Consider it a convenience function wrapping multple
42 * intel_buffer_dword() calls.
43 */
44 void intel_batchbuffer_data(struct brw_context *brw,
45 const void *data, GLuint bytes, bool is_blit);
46
47 bool intel_batchbuffer_emit_reloc(struct brw_context *brw,
48 drm_intel_bo *buffer,
49 uint32_t read_domains,
50 uint32_t write_domain,
51 uint32_t offset);
52 bool intel_batchbuffer_emit_reloc_fenced(struct brw_context *brw,
53 drm_intel_bo *buffer,
54 uint32_t read_domains,
55 uint32_t write_domain,
56 uint32_t offset);
57 void intel_batchbuffer_emit_mi_flush(struct brw_context *brw);
58 void intel_emit_post_sync_nonzero_flush(struct brw_context *brw);
59 void intel_emit_depth_stall_flushes(struct brw_context *brw);
60 void gen7_emit_vs_workaround_flush(struct brw_context *brw);
61
62 static INLINE uint32_t float_as_int(float f)
63 {
64 union {
65 float f;
66 uint32_t d;
67 } fi;
68
69 fi.f = f;
70 return fi.d;
71 }
72
73 /* Inline functions - might actually be better off with these
74 * non-inlined. Certainly better off switching all command packets to
75 * be passed as structs rather than dwords, but that's a little bit of
76 * work...
77 */
78 static INLINE unsigned
79 intel_batchbuffer_space(struct brw_context *brw)
80 {
81 struct intel_context *intel = &brw->intel;
82 return (intel->batch.state_batch_offset - intel->batch.reserved_space)
83 - intel->batch.used*4;
84 }
85
86
87 static INLINE void
88 intel_batchbuffer_emit_dword(struct brw_context *brw, GLuint dword)
89 {
90 struct intel_context *intel = &brw->intel;
91 #ifdef DEBUG
92 assert(intel_batchbuffer_space(brw) >= 4);
93 #endif
94 intel->batch.map[intel->batch.used++] = dword;
95 }
96
97 static INLINE void
98 intel_batchbuffer_emit_float(struct brw_context *brw, float f)
99 {
100 intel_batchbuffer_emit_dword(brw, float_as_int(f));
101 }
102
103 static INLINE void
104 intel_batchbuffer_require_space(struct brw_context *brw, GLuint sz, int is_blit)
105 {
106 struct intel_context *intel = &brw->intel;
107 if (intel->gen >= 6 &&
108 intel->batch.is_blit != is_blit && intel->batch.used) {
109 intel_batchbuffer_flush(brw);
110 }
111
112 intel->batch.is_blit = is_blit;
113
114 #ifdef DEBUG
115 assert(sz < BATCH_SZ - BATCH_RESERVED);
116 #endif
117 if (intel_batchbuffer_space(brw) < sz)
118 intel_batchbuffer_flush(brw);
119 }
120
121 static INLINE void
122 intel_batchbuffer_begin(struct brw_context *brw, int n, bool is_blit)
123 {
124 struct intel_context *intel = &brw->intel;
125 intel_batchbuffer_require_space(brw, n * 4, is_blit);
126
127 intel->batch.emit = intel->batch.used;
128 #ifdef DEBUG
129 intel->batch.total = n;
130 #endif
131 }
132
133 static INLINE void
134 intel_batchbuffer_advance(struct brw_context *brw)
135 {
136 #ifdef DEBUG
137 struct intel_context *intel = &brw->intel;
138 struct intel_batchbuffer *batch = &intel->batch;
139 unsigned int _n = batch->used - batch->emit;
140 assert(batch->total != 0);
141 if (_n != batch->total) {
142 fprintf(stderr, "ADVANCE_BATCH: %d of %d dwords emitted\n",
143 _n, batch->total);
144 abort();
145 }
146 batch->total = 0;
147 #endif
148 }
149
150 void intel_batchbuffer_cached_advance(struct brw_context *brw);
151
152 /* Here are the crusty old macros, to be removed:
153 */
154 #define BATCH_LOCALS
155
156 #define BEGIN_BATCH(n) intel_batchbuffer_begin(brw, n, false)
157 #define BEGIN_BATCH_BLT(n) intel_batchbuffer_begin(brw, n, true)
158 #define OUT_BATCH(d) intel_batchbuffer_emit_dword(brw, d)
159 #define OUT_BATCH_F(f) intel_batchbuffer_emit_float(brw, f)
160 #define OUT_RELOC(buf, read_domains, write_domain, delta) do { \
161 intel_batchbuffer_emit_reloc(brw, buf, \
162 read_domains, write_domain, delta); \
163 } while (0)
164 #define OUT_RELOC_FENCED(buf, read_domains, write_domain, delta) do { \
165 intel_batchbuffer_emit_reloc_fenced(brw, buf, \
166 read_domains, write_domain, delta); \
167 } while (0)
168
169 #define ADVANCE_BATCH() intel_batchbuffer_advance(brw);
170 #define CACHED_BATCH() intel_batchbuffer_cached_advance(brw);
171
172 #ifdef __cplusplus
173 }
174 #endif
175
176 #endif