src/mesa/drivers/dri/i965/intel_blit.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 VMware, Inc.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28
  29 #include "main/mtypes.h"
  30 #include "main/context.h"
  31 #include "main/enums.h"
  32 #include "main/colormac.h"
  33 #include "main/fbobject.h"
  34
  35 #include "brw_context.h"
  36 #include "brw_defines.h"
  37 #include "intel_blit.h"
  38 #include "intel_buffers.h"
  39 #include "intel_fbo.h"
  40 #include "intel_reg.h"
  41 #include "intel_batchbuffer.h"
  42 #include "intel_mipmap_tree.h"
  43
  44 #define FILE_DEBUG_FLAG DEBUG_BLIT
  45
  46 static void
  47 intel_miptree_set_alpha_to_one(struct brw_context *brw,
  48                                struct intel_mipmap_tree *mt,
  49                                int x, int y, int width, int height);
  50
  51 static GLuint translate_raster_op(GLenum logicop)
  52 {
  53    switch(logicop) {
  54    case GL_CLEAR: return 0x00;
  55    case GL_AND: return 0x88;
  56    case GL_AND_REVERSE: return 0x44;
  57    case GL_COPY: return 0xCC;
  58    case GL_AND_INVERTED: return 0x22;
  59    case GL_NOOP: return 0xAA;
  60    case GL_XOR: return 0x66;
  61    case GL_OR: return 0xEE;
  62    case GL_NOR: return 0x11;
  63    case GL_EQUIV: return 0x99;
  64    case GL_INVERT: return 0x55;
  65    case GL_OR_REVERSE: return 0xDD;
  66    case GL_COPY_INVERTED: return 0x33;
  67    case GL_OR_INVERTED: return 0xBB;
  68    case GL_NAND: return 0x77;
  69    case GL_SET: return 0xFF;
  70    default: return 0;
  71    }
  72 }
  73
  74 static uint32_t
  75 br13_for_cpp(int cpp)
  76 {
  77    switch (cpp) {
  78    case 4:
  79       return BR13_8888;
  80       break;
  81    case 2:
  82       return BR13_565;
  83       break;
  84    case 1:
  85       return BR13_8;
  86       break;
  87    default:
  88       unreachable("not reached");
  89    }
  90 }
  91
  92 /**
  93  * Emits the packet for switching the blitter from X to Y tiled or back.
  94  *
  95  * This has to be called in a single BEGIN_BATCH_BLT_TILED() /
  96  * ADVANCE_BATCH_TILED().  This is because BCS_SWCTRL is saved and restored as
  97  * part of the power context, not a render context, and if the batchbuffer was
  98  * to get flushed between setting and blitting, or blitting and restoring, our
  99  * tiling state would leak into other unsuspecting applications (like the X
 100  * server).
 101  */
 102 static void
 103 set_blitter_tiling(struct brw_context *brw,
 104                    bool dst_y_tiled, bool src_y_tiled)
 105 {
 106    assert(brw->gen >= 6);
 107
 108    /* Idle the blitter before we update how tiling is interpreted. */
 109    OUT_BATCH(MI_FLUSH_DW);
 110    OUT_BATCH(0);
 111    OUT_BATCH(0);
 112    OUT_BATCH(0);
 113
 114    OUT_BATCH(MI_LOAD_REGISTER_IMM | (3 - 2));
 115    OUT_BATCH(BCS_SWCTRL);
 116    OUT_BATCH((BCS_SWCTRL_DST_Y | BCS_SWCTRL_SRC_Y) << 16 |
 117              (dst_y_tiled ? BCS_SWCTRL_DST_Y : 0) |
 118              (src_y_tiled ? BCS_SWCTRL_SRC_Y : 0));
 119 }
 120
 121 #define BEGIN_BATCH_BLT_TILED(n, dst_y_tiled, src_y_tiled) do {         \
 122       BEGIN_BATCH_BLT(n + ((dst_y_tiled || src_y_tiled) ? 14 : 0));     \
 123       if (dst_y_tiled || src_y_tiled)                                   \
 124          set_blitter_tiling(brw, dst_y_tiled, src_y_tiled);             \
 125    } while (0)
 126
 127 #define ADVANCE_BATCH_TILED(dst_y_tiled, src_y_tiled) do {              \
 128       if (dst_y_tiled || src_y_tiled)                                   \
 129          set_blitter_tiling(brw, false, false);                         \
 130       ADVANCE_BATCH();                                                  \
 131    } while (0)
 132
 133 /**
 134  * Implements a rectangular block transfer (blit) of pixels between two
 135  * miptrees.
 136  *
 137  * Our blitter can operate on 1, 2, or 4-byte-per-pixel data, with generous,
 138  * but limited, pitches and sizes allowed.
 139  *
 140  * The src/dst coordinates are relative to the given level/slice of the
 141  * miptree.
 142  *
 143  * If @src_flip or @dst_flip is set, then the rectangle within that miptree
 144  * will be inverted (including scanline order) when copying.  This is common
 145  * in GL when copying between window system and user-created
 146  * renderbuffers/textures.
 147  */
 148 bool
 149 intel_miptree_blit(struct brw_context *brw,
 150                    struct intel_mipmap_tree *src_mt,
 151                    int src_level, int src_slice,
 152                    uint32_t src_x, uint32_t src_y, bool src_flip,
 153                    struct intel_mipmap_tree *dst_mt,
 154                    int dst_level, int dst_slice,
 155                    uint32_t dst_x, uint32_t dst_y, bool dst_flip,
 156                    uint32_t width, uint32_t height,
 157                    GLenum logicop)
 158 {
 159    /* The blitter doesn't understand multisampling at all. */
 160    if (src_mt->num_samples > 0 || dst_mt->num_samples > 0)
 161       return false;
 162
 163    /* No sRGB decode or encode is done by the hardware blitter, which is
 164     * consistent with what we want in the callers (glCopyTexSubImage(),
 165     * glBlitFramebuffer(), texture validation, etc.).
 166     */
 167    mesa_format src_format = _mesa_get_srgb_format_linear(src_mt->format);
 168    mesa_format dst_format = _mesa_get_srgb_format_linear(dst_mt->format);
 169
 170    /* The blitter doesn't support doing any format conversions.  We do also
 171     * support blitting ARGB8888 to XRGB8888 (trivial, the values dropped into
 172     * the X channel don't matter), and XRGB8888 to ARGB8888 by setting the A
 173     * channel to 1.0 at the end.
 174     */
 175    if (src_format != dst_format &&
 176       ((src_format != MESA_FORMAT_B8G8R8A8_UNORM &&
 177         src_format != MESA_FORMAT_B8G8R8X8_UNORM) ||
 178        (dst_format != MESA_FORMAT_B8G8R8A8_UNORM &&
 179         dst_format != MESA_FORMAT_B8G8R8X8_UNORM))) {
 180       perf_debug("%s: Can't use hardware blitter from %s to %s, "
 181                  "falling back.\n", __FUNCTION__,
 182                  _mesa_get_format_name(src_format),
 183                  _mesa_get_format_name(dst_format));
 184       return false;
 185    }
 186
 187    /* According to the Ivy Bridge PRM, Vol1 Part4, section 1.2.1.2 (Graphics
 188     * Data Size Limitations):
 189     *
 190     *    The BLT engine is capable of transferring very large quantities of
 191     *    graphics data. Any graphics data read from and written to the
 192     *    destination is permitted to represent a number of pixels that
 193     *    occupies up to 65,536 scan lines and up to 32,768 bytes per scan line
 194     *    at the destination. The maximum number of pixels that may be
 195     *    represented per scan line’s worth of graphics data depends on the
 196     *    color depth.
 197     *
 198     * Furthermore, intelEmitCopyBlit (which is called below) uses a signed
 199     * 16-bit integer to represent buffer pitch, so it can only handle buffer
 200     * pitches < 32k.
 201     *
 202     * As a result of these two limitations, we can only use the blitter to do
 203     * this copy when the miptree's pitch is less than 32k.
 204     */
 205    if (src_mt->pitch >= 32768 ||
 206        dst_mt->pitch >= 32768) {
 207       perf_debug("Falling back due to >=32k pitch\n");
 208       return false;
 209    }
 210
 211    /* The blitter has no idea about HiZ or fast color clears, so we need to
 212     * resolve the miptrees before we do anything.
 213     */
 214    intel_miptree_slice_resolve_depth(brw, src_mt, src_level, src_slice);
 215    intel_miptree_slice_resolve_depth(brw, dst_mt, dst_level, dst_slice);
 216    intel_miptree_resolve_color(brw, src_mt);
 217    intel_miptree_resolve_color(brw, dst_mt);
 218
 219    if (src_flip)
 220       src_y = minify(src_mt->physical_height0, src_level - src_mt->first_level) - src_y - height;
 221
 222    if (dst_flip)
 223       dst_y = minify(dst_mt->physical_height0, dst_level - dst_mt->first_level) - dst_y - height;
 224
 225    int src_pitch = src_mt->pitch;
 226    if (src_flip != dst_flip)
 227       src_pitch = -src_pitch;
 228
 229    uint32_t src_image_x, src_image_y;
 230    intel_miptree_get_image_offset(src_mt, src_level, src_slice,
 231                                   &src_image_x, &src_image_y);
 232    src_x += src_image_x;
 233    src_y += src_image_y;
 234
 235    /* The blitter interprets the 16-bit src x/y as a signed 16-bit value,
 236     * where negative values are invalid.  The values we're working with are
 237     * unsigned, so make sure we don't overflow.
 238     */
 239    if (src_x >= 32768 || src_y >= 32768) {
 240       perf_debug("Falling back due to >=32k src offset (%d, %d)\n",
 241                  src_x, src_y);
 242       return false;
 243    }
 244
 245    uint32_t dst_image_x, dst_image_y;
 246    intel_miptree_get_image_offset(dst_mt, dst_level, dst_slice,
 247                                   &dst_image_x, &dst_image_y);
 248    dst_x += dst_image_x;
 249    dst_y += dst_image_y;
 250
 251    /* The blitter interprets the 16-bit destination x/y as a signed 16-bit
 252     * value.  The values we're working with are unsigned, so make sure we
 253     * don't overflow.
 254     */
 255    if (dst_x >= 32768 || dst_y >= 32768) {
 256       perf_debug("Falling back due to >=32k dst offset (%d, %d)\n",
 257                  dst_x, dst_y);
 258       return false;
 259    }
 260
 261    if (!intelEmitCopyBlit(brw,
 262                           src_mt->cpp,
 263                           src_pitch,
 264                           src_mt->bo, src_mt->offset,
 265                           src_mt->tiling,
 266                           dst_mt->pitch,
 267                           dst_mt->bo, dst_mt->offset,
 268                           dst_mt->tiling,
 269                           src_x, src_y,
 270                           dst_x, dst_y,
 271                           width, height,
 272                           logicop)) {
 273       return false;
 274    }
 275
 276    if (src_mt->format == MESA_FORMAT_B8G8R8X8_UNORM &&
 277        dst_mt->format == MESA_FORMAT_B8G8R8A8_UNORM) {
 278       intel_miptree_set_alpha_to_one(brw, dst_mt,
 279                                      dst_x, dst_y,
 280                                      width, height);
 281    }
 282
 283    return true;
 284 }
 285
 286 /* Copy BitBlt
 287  */
 288 bool
 289 intelEmitCopyBlit(struct brw_context *brw,
 290                   GLuint cpp,
 291                   GLshort src_pitch,
 292                   drm_intel_bo *src_buffer,
 293                   GLuint src_offset,
 294                   uint32_t src_tiling,
 295                   GLshort dst_pitch,
 296                   drm_intel_bo *dst_buffer,
 297                   GLuint dst_offset,
 298                   uint32_t dst_tiling,
 299                   GLshort src_x, GLshort src_y,
 300                   GLshort dst_x, GLshort dst_y,
 301                   GLshort w, GLshort h,
 302                   GLenum logic_op)
 303 {
 304    GLuint CMD, BR13, pass = 0;
 305    int dst_y2 = dst_y + h;
 306    int dst_x2 = dst_x + w;
 307    drm_intel_bo *aper_array[3];
 308    bool dst_y_tiled = dst_tiling == I915_TILING_Y;
 309    bool src_y_tiled = src_tiling == I915_TILING_Y;
 310
 311    if (dst_tiling != I915_TILING_NONE) {
 312       if (dst_offset & 4095)
 313          return false;
 314    }
 315    if (src_tiling != I915_TILING_NONE) {
 316       if (src_offset & 4095)
 317          return false;
 318    }
 319    if ((dst_y_tiled || src_y_tiled) && brw->gen < 6)
 320       return false;
 321
 322    /* do space check before going any further */
 323    do {
 324        aper_array[0] = brw->batch.bo;
 325        aper_array[1] = dst_buffer;
 326        aper_array[2] = src_buffer;
 327
 328        if (dri_bufmgr_check_aperture_space(aper_array, 3) != 0) {
 329            intel_batchbuffer_flush(brw);
 330            pass++;
 331        } else
 332            break;
 333    } while (pass < 2);
 334
 335    if (pass >= 2)
 336       return false;
 337
 338    intel_batchbuffer_require_space(brw, 8 * 4, BLT_RING);
 339    DBG("%s src:buf(%p)/%d+%d %d,%d dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n",
 340        __FUNCTION__,
 341        src_buffer, src_pitch, src_offset, src_x, src_y,
 342        dst_buffer, dst_pitch, dst_offset, dst_x, dst_y, w, h);
 343
 344    /* Blit pitch must be dword-aligned.  Otherwise, the hardware appears to drop
 345     * the low bits.
 346     */
 347    if (src_pitch % 4 != 0 || dst_pitch % 4 != 0)
 348       return false;
 349
 350    /* For big formats (such as floating point), do the copy using 16 or 32bpp
 351     * and multiply the coordinates.
 352     */
 353    if (cpp > 4) {
 354       if (cpp % 4 == 2) {
 355          dst_x *= cpp / 2;
 356          dst_x2 *= cpp / 2;
 357          src_x *= cpp / 2;
 358          cpp = 2;
 359       } else {
 360          assert(cpp % 4 == 0);
 361          dst_x *= cpp / 4;
 362          dst_x2 *= cpp / 4;
 363          src_x *= cpp / 4;
 364          cpp = 4;
 365       }
 366    }
 367
 368    BR13 = br13_for_cpp(cpp) | translate_raster_op(logic_op) << 16;
 369
 370    switch (cpp) {
 371    case 1:
 372    case 2:
 373       CMD = XY_SRC_COPY_BLT_CMD;
 374       break;
 375    case 4:
 376       CMD = XY_SRC_COPY_BLT_CMD | XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
 377       break;
 378    default:
 379       return false;
 380    }
 381
 382    if (dst_tiling != I915_TILING_NONE) {
 383       CMD |= XY_DST_TILED;
 384       dst_pitch /= 4;
 385    }
 386    if (src_tiling != I915_TILING_NONE) {
 387       CMD |= XY_SRC_TILED;
 388       src_pitch /= 4;
 389    }
 390
 391    if (dst_y2 <= dst_y || dst_x2 <= dst_x) {
 392       return true;
 393    }
 394
 395    assert(dst_x < dst_x2);
 396    assert(dst_y < dst_y2);
 397    assert(src_offset + (src_y + h - 1) * abs(src_pitch) +
 398           (w * cpp) <= src_buffer->size);
 399    assert(dst_offset + (dst_y + h - 1) * abs(dst_pitch) +
 400           (w * cpp) <= dst_buffer->size);
 401
 402    unsigned length = brw->gen >= 8 ? 10 : 8;
 403
 404    BEGIN_BATCH_BLT_TILED(length, dst_y_tiled, src_y_tiled);
 405    OUT_BATCH(CMD | (length - 2));
 406    OUT_BATCH(BR13 | (uint16_t)dst_pitch);
 407    OUT_BATCH(SET_FIELD(dst_y, BLT_Y) | SET_FIELD(dst_x, BLT_X));
 408    OUT_BATCH(SET_FIELD(dst_y2, BLT_Y) | SET_FIELD(dst_x2, BLT_X));
 409    if (brw->gen >= 8) {
 410       OUT_RELOC64(dst_buffer,
 411                   I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
 412                   dst_offset);
 413    } else {
 414       OUT_RELOC(dst_buffer,
 415                 I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
 416                 dst_offset);
 417    }
 418    OUT_BATCH(SET_FIELD(src_y, BLT_Y) | SET_FIELD(src_x, BLT_X));
 419    OUT_BATCH((uint16_t)src_pitch);
 420    if (brw->gen >= 8) {
 421       OUT_RELOC64(src_buffer,
 422                   I915_GEM_DOMAIN_RENDER, 0,
 423                   src_offset);
 424    } else {
 425       OUT_RELOC(src_buffer,
 426                 I915_GEM_DOMAIN_RENDER, 0,
 427                 src_offset);
 428    }
 429
 430    ADVANCE_BATCH_TILED(dst_y_tiled, src_y_tiled);
 431
 432    intel_batchbuffer_emit_mi_flush(brw);
 433
 434    return true;
 435 }
 436
 437 bool
 438 intelEmitImmediateColorExpandBlit(struct brw_context *brw,
 439                                   GLuint cpp,
 440                                   GLubyte *src_bits, GLuint src_size,
 441                                   GLuint fg_color,
 442                                   GLshort dst_pitch,
 443                                   drm_intel_bo *dst_buffer,
 444                                   GLuint dst_offset,
 445                                   uint32_t dst_tiling,
 446                                   GLshort x, GLshort y,
 447                                   GLshort w, GLshort h,
 448                                   GLenum logic_op)
 449 {
 450    int dwords = ALIGN(src_size, 8) / 4;
 451    uint32_t opcode, br13, blit_cmd;
 452
 453    if (dst_tiling != I915_TILING_NONE) {
 454       if (dst_offset & 4095)
 455          return false;
 456       if (dst_tiling == I915_TILING_Y)
 457          return false;
 458    }
 459
 460    assert((logic_op >= GL_CLEAR) && (logic_op <= (GL_CLEAR + 0x0f)));
 461    assert(dst_pitch > 0);
 462
 463    if (w < 0 || h < 0)
 464       return true;
 465
 466    DBG("%s dst:buf(%p)/%d+%d %d,%d sz:%dx%d, %d bytes %d dwords\n",
 467        __FUNCTION__,
 468        dst_buffer, dst_pitch, dst_offset, x, y, w, h, src_size, dwords);
 469
 470    intel_batchbuffer_require_space(brw, (8 * 4) + (3 * 4) + dwords * 4, BLT_RING);
 471
 472    opcode = XY_SETUP_BLT_CMD;
 473    if (cpp == 4)
 474       opcode |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
 475    if (dst_tiling != I915_TILING_NONE) {
 476       opcode |= XY_DST_TILED;
 477       dst_pitch /= 4;
 478    }
 479
 480    br13 = dst_pitch | (translate_raster_op(logic_op) << 16) | (1 << 29);
 481    br13 |= br13_for_cpp(cpp);
 482
 483    blit_cmd = XY_TEXT_IMMEDIATE_BLIT_CMD | XY_TEXT_BYTE_PACKED; /* packing? */
 484    if (dst_tiling != I915_TILING_NONE)
 485       blit_cmd |= XY_DST_TILED;
 486
 487    unsigned xy_setup_blt_length = brw->gen >= 8 ? 10 : 8;
 488
 489    BEGIN_BATCH_BLT(xy_setup_blt_length + 3);
 490    OUT_BATCH(opcode | (xy_setup_blt_length - 2));
 491    OUT_BATCH(br13);
 492    OUT_BATCH((0 << 16) | 0); /* clip x1, y1 */
 493    OUT_BATCH((100 << 16) | 100); /* clip x2, y2 */
 494    if (brw->gen >= 8) {
 495       OUT_RELOC64(dst_buffer,
 496                   I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
 497                   dst_offset);
 498    } else {
 499       OUT_RELOC(dst_buffer,
 500                 I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
 501                 dst_offset);
 502    }
 503    OUT_BATCH(0); /* bg */
 504    OUT_BATCH(fg_color); /* fg */
 505    OUT_BATCH(0); /* pattern base addr */
 506    if (brw->gen >= 8)
 507       OUT_BATCH(0);
 508
 509    OUT_BATCH(blit_cmd | ((3 - 2) + dwords));
 510    OUT_BATCH(SET_FIELD(y, BLT_Y) | SET_FIELD(x, BLT_X));
 511    OUT_BATCH(SET_FIELD(y + h, BLT_Y) | SET_FIELD(x + w, BLT_X));
 512    ADVANCE_BATCH();
 513
 514    intel_batchbuffer_data(brw, src_bits, dwords * 4, BLT_RING);
 515
 516    intel_batchbuffer_emit_mi_flush(brw);
 517
 518    return true;
 519 }
 520
 521 /* We don't have a memmove-type blit like some other hardware, so we'll do a
 522  * rectangular blit covering a large space, then emit 1-scanline blit at the
 523  * end to cover the last if we need.
 524  */
 525 void
 526 intel_emit_linear_blit(struct brw_context *brw,
 527                        drm_intel_bo *dst_bo,
 528                        unsigned int dst_offset,
 529                        drm_intel_bo *src_bo,
 530                        unsigned int src_offset,
 531                        unsigned int size)
 532 {
 533    struct gl_context *ctx = &brw->ctx;
 534    GLuint pitch, height;
 535    bool ok;
 536
 537    /* The pitch given to the GPU must be DWORD aligned, and
 538     * we want width to match pitch. Max width is (1 << 15 - 1),
 539     * rounding that down to the nearest DWORD is 1 << 15 - 4
 540     */
 541    pitch = ROUND_DOWN_TO(MIN2(size, (1 << 15) - 1), 4);
 542    height = (pitch == 0) ? 1 : size / pitch;
 543    ok = intelEmitCopyBlit(brw, 1,
 544                           pitch, src_bo, src_offset, I915_TILING_NONE,
 545                           pitch, dst_bo, dst_offset, I915_TILING_NONE,
 546                           0, 0, /* src x/y */
 547                           0, 0, /* dst x/y */
 548                           pitch, height, /* w, h */
 549                           GL_COPY);
 550    if (!ok)
 551       _mesa_problem(ctx, "Failed to linear blit %dx%d\n", pitch, height);
 552
 553    src_offset += pitch * height;
 554    dst_offset += pitch * height;
 555    size -= pitch * height;
 556    assert (size < (1 << 15));
 557    pitch = ALIGN(size, 4);
 558    if (size != 0) {
 559       ok = intelEmitCopyBlit(brw, 1,
 560                              pitch, src_bo, src_offset, I915_TILING_NONE,
 561                              pitch, dst_bo, dst_offset, I915_TILING_NONE,
 562                              0, 0, /* src x/y */
 563                              0, 0, /* dst x/y */
 564                              size, 1, /* w, h */
 565                              GL_COPY);
 566       if (!ok)
 567          _mesa_problem(ctx, "Failed to linear blit %dx%d\n", size, 1);
 568    }
 569 }
 570
 571 /**
 572  * Used to initialize the alpha value of an ARGB8888 miptree after copying
 573  * into it from an XRGB8888 source.
 574  *
 575  * This is very common with glCopyTexImage2D().  Note that the coordinates are
 576  * relative to the start of the miptree, not relative to a slice within the
 577  * miptree.
 578  */
 579 static void
 580 intel_miptree_set_alpha_to_one(struct brw_context *brw,
 581                               struct intel_mipmap_tree *mt,
 582                               int x, int y, int width, int height)
 583 {
 584    uint32_t BR13, CMD;
 585    int pitch, cpp;
 586    drm_intel_bo *aper_array[2];
 587
 588    pitch = mt->pitch;
 589    cpp = mt->cpp;
 590
 591    DBG("%s dst:buf(%p)/%d %d,%d sz:%dx%d\n",
 592        __FUNCTION__, mt->bo, pitch, x, y, width, height);
 593
 594    BR13 = br13_for_cpp(cpp) | 0xf0 << 16;
 595    CMD = XY_COLOR_BLT_CMD;
 596    CMD |= XY_BLT_WRITE_ALPHA;
 597
 598    if (mt->tiling != I915_TILING_NONE) {
 599       CMD |= XY_DST_TILED;
 600       pitch /= 4;
 601    }
 602    BR13 |= pitch;
 603
 604    /* do space check before going any further */
 605    aper_array[0] = brw->batch.bo;
 606    aper_array[1] = mt->bo;
 607
 608    if (drm_intel_bufmgr_check_aperture_space(aper_array,
 609                                              ARRAY_SIZE(aper_array)) != 0) {
 610       intel_batchbuffer_flush(brw);
 611    }
 612
 613    unsigned length = brw->gen >= 8 ? 7 : 6;
 614    bool dst_y_tiled = mt->tiling == I915_TILING_Y;
 615
 616    BEGIN_BATCH_BLT_TILED(length, dst_y_tiled, false);
 617    OUT_BATCH(CMD | (length - 2));
 618    OUT_BATCH(BR13);
 619    OUT_BATCH(SET_FIELD(y, BLT_Y) | SET_FIELD(x, BLT_X));
 620    OUT_BATCH(SET_FIELD(y + height, BLT_Y) | SET_FIELD(x + width, BLT_X));
 621    if (brw->gen >= 8) {
 622       OUT_RELOC64(mt->bo,
 623                   I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
 624                   0);
 625    } else {
 626       OUT_RELOC(mt->bo,
 627                 I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
 628                 0);
 629    }
 630    OUT_BATCH(0xffffffff); /* white, but only alpha gets written */
 631    ADVANCE_BATCH_TILED(dst_y_tiled, false);
 632
 633    intel_batchbuffer_emit_mi_flush(brw);
 634 }