1 /**************************************************************************
3 * Copyright 2003 VMware, Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
29 #include "main/mtypes.h"
30 #include "main/context.h"
31 #include "main/enums.h"
32 #include "main/colormac.h"
33 #include "main/fbobject.h"
35 #include "brw_context.h"
36 #include "brw_defines.h"
37 #include "intel_blit.h"
38 #include "intel_buffers.h"
39 #include "intel_fbo.h"
40 #include "intel_reg.h"
41 #include "intel_batchbuffer.h"
42 #include "intel_mipmap_tree.h"
44 #define FILE_DEBUG_FLAG DEBUG_BLIT
47 intel_miptree_set_alpha_to_one(struct brw_context
*brw
,
48 struct intel_mipmap_tree
*mt
,
49 int x
, int y
, int width
, int height
);
51 static GLuint
translate_raster_op(GLenum logicop
)
54 case GL_CLEAR
: return 0x00;
55 case GL_AND
: return 0x88;
56 case GL_AND_REVERSE
: return 0x44;
57 case GL_COPY
: return 0xCC;
58 case GL_AND_INVERTED
: return 0x22;
59 case GL_NOOP
: return 0xAA;
60 case GL_XOR
: return 0x66;
61 case GL_OR
: return 0xEE;
62 case GL_NOR
: return 0x11;
63 case GL_EQUIV
: return 0x99;
64 case GL_INVERT
: return 0x55;
65 case GL_OR_REVERSE
: return 0xDD;
66 case GL_COPY_INVERTED
: return 0x33;
67 case GL_OR_INVERTED
: return 0xBB;
68 case GL_NAND
: return 0x77;
69 case GL_SET
: return 0xFF;
88 unreachable("not reached");
93 * Emits the packet for switching the blitter from X to Y tiled or back.
95 * This has to be called in a single BEGIN_BATCH_BLT_TILED() /
96 * ADVANCE_BATCH_TILED(). This is because BCS_SWCTRL is saved and restored as
97 * part of the power context, not a render context, and if the batchbuffer was
98 * to get flushed between setting and blitting, or blitting and restoring, our
99 * tiling state would leak into other unsuspecting applications (like the X
103 set_blitter_tiling(struct brw_context
*brw
,
104 bool dst_y_tiled
, bool src_y_tiled
)
106 assert(brw
->gen
>= 6);
108 /* Idle the blitter before we update how tiling is interpreted. */
109 OUT_BATCH(MI_FLUSH_DW
);
114 OUT_BATCH(MI_LOAD_REGISTER_IMM
| (3 - 2));
115 OUT_BATCH(BCS_SWCTRL
);
116 OUT_BATCH((BCS_SWCTRL_DST_Y
| BCS_SWCTRL_SRC_Y
) << 16 |
117 (dst_y_tiled
? BCS_SWCTRL_DST_Y
: 0) |
118 (src_y_tiled
? BCS_SWCTRL_SRC_Y
: 0));
121 #define BEGIN_BATCH_BLT_TILED(n, dst_y_tiled, src_y_tiled) do { \
122 BEGIN_BATCH_BLT(n + ((dst_y_tiled || src_y_tiled) ? 14 : 0)); \
123 if (dst_y_tiled || src_y_tiled) \
124 set_blitter_tiling(brw, dst_y_tiled, src_y_tiled); \
127 #define ADVANCE_BATCH_TILED(dst_y_tiled, src_y_tiled) do { \
128 if (dst_y_tiled || src_y_tiled) \
129 set_blitter_tiling(brw, false, false); \
134 * Implements a rectangular block transfer (blit) of pixels between two
137 * Our blitter can operate on 1, 2, or 4-byte-per-pixel data, with generous,
138 * but limited, pitches and sizes allowed.
140 * The src/dst coordinates are relative to the given level/slice of the
143 * If @src_flip or @dst_flip is set, then the rectangle within that miptree
144 * will be inverted (including scanline order) when copying. This is common
145 * in GL when copying between window system and user-created
146 * renderbuffers/textures.
149 intel_miptree_blit(struct brw_context
*brw
,
150 struct intel_mipmap_tree
*src_mt
,
151 int src_level
, int src_slice
,
152 uint32_t src_x
, uint32_t src_y
, bool src_flip
,
153 struct intel_mipmap_tree
*dst_mt
,
154 int dst_level
, int dst_slice
,
155 uint32_t dst_x
, uint32_t dst_y
, bool dst_flip
,
156 uint32_t width
, uint32_t height
,
159 /* The blitter doesn't understand multisampling at all. */
160 if (src_mt
->num_samples
> 0 || dst_mt
->num_samples
> 0)
163 /* No sRGB decode or encode is done by the hardware blitter, which is
164 * consistent with what we want in the callers (glCopyTexSubImage(),
165 * glBlitFramebuffer(), texture validation, etc.).
167 mesa_format src_format
= _mesa_get_srgb_format_linear(src_mt
->format
);
168 mesa_format dst_format
= _mesa_get_srgb_format_linear(dst_mt
->format
);
170 /* The blitter doesn't support doing any format conversions. We do also
171 * support blitting ARGB8888 to XRGB8888 (trivial, the values dropped into
172 * the X channel don't matter), and XRGB8888 to ARGB8888 by setting the A
173 * channel to 1.0 at the end.
175 if (src_format
!= dst_format
&&
176 ((src_format
!= MESA_FORMAT_B8G8R8A8_UNORM
&&
177 src_format
!= MESA_FORMAT_B8G8R8X8_UNORM
) ||
178 (dst_format
!= MESA_FORMAT_B8G8R8A8_UNORM
&&
179 dst_format
!= MESA_FORMAT_B8G8R8X8_UNORM
))) {
180 perf_debug("%s: Can't use hardware blitter from %s to %s, "
181 "falling back.\n", __FUNCTION__
,
182 _mesa_get_format_name(src_format
),
183 _mesa_get_format_name(dst_format
));
187 /* According to the Ivy Bridge PRM, Vol1 Part4, section 1.2.1.2 (Graphics
188 * Data Size Limitations):
190 * The BLT engine is capable of transferring very large quantities of
191 * graphics data. Any graphics data read from and written to the
192 * destination is permitted to represent a number of pixels that
193 * occupies up to 65,536 scan lines and up to 32,768 bytes per scan line
194 * at the destination. The maximum number of pixels that may be
195 * represented per scan line’s worth of graphics data depends on the
198 * Furthermore, intelEmitCopyBlit (which is called below) uses a signed
199 * 16-bit integer to represent buffer pitch, so it can only handle buffer
202 * As a result of these two limitations, we can only use the blitter to do
203 * this copy when the miptree's pitch is less than 32k.
205 if (src_mt
->pitch
>= 32768 ||
206 dst_mt
->pitch
>= 32768) {
207 perf_debug("Falling back due to >=32k pitch\n");
211 /* The blitter has no idea about HiZ or fast color clears, so we need to
212 * resolve the miptrees before we do anything.
214 intel_miptree_slice_resolve_depth(brw
, src_mt
, src_level
, src_slice
);
215 intel_miptree_slice_resolve_depth(brw
, dst_mt
, dst_level
, dst_slice
);
216 intel_miptree_resolve_color(brw
, src_mt
);
217 intel_miptree_resolve_color(brw
, dst_mt
);
220 src_y
= minify(src_mt
->physical_height0
, src_level
- src_mt
->first_level
) - src_y
- height
;
223 dst_y
= minify(dst_mt
->physical_height0
, dst_level
- dst_mt
->first_level
) - dst_y
- height
;
225 int src_pitch
= src_mt
->pitch
;
226 if (src_flip
!= dst_flip
)
227 src_pitch
= -src_pitch
;
229 uint32_t src_image_x
, src_image_y
, dst_image_x
, dst_image_y
;
230 intel_miptree_get_image_offset(src_mt
, src_level
, src_slice
,
231 &src_image_x
, &src_image_y
);
232 intel_miptree_get_image_offset(dst_mt
, dst_level
, dst_slice
,
233 &dst_image_x
, &dst_image_y
);
234 src_x
+= src_image_x
;
235 src_y
+= src_image_y
;
236 dst_x
+= dst_image_x
;
237 dst_y
+= dst_image_y
;
239 /* The blitter interprets the 16-bit destination x/y as a signed 16-bit
240 * value. The values we're working with are unsigned, so make sure we don't
243 if (src_x
>= 32768 || src_y
>= 32768 || dst_x
>= 32768 || dst_y
>= 32768) {
244 perf_debug("Falling back due to >=32k offset [src(%d, %d) dst(%d, %d)]\n",
245 src_x
, src_y
, dst_x
, dst_y
);
249 if (!intelEmitCopyBlit(brw
,
252 src_mt
->bo
, src_mt
->offset
,
255 dst_mt
->bo
, dst_mt
->offset
,
264 if (src_mt
->format
== MESA_FORMAT_B8G8R8X8_UNORM
&&
265 dst_mt
->format
== MESA_FORMAT_B8G8R8A8_UNORM
) {
266 intel_miptree_set_alpha_to_one(brw
, dst_mt
,
277 intelEmitCopyBlit(struct brw_context
*brw
,
280 drm_intel_bo
*src_buffer
,
284 drm_intel_bo
*dst_buffer
,
287 GLshort src_x
, GLshort src_y
,
288 GLshort dst_x
, GLshort dst_y
,
289 GLshort w
, GLshort h
,
292 GLuint CMD
, BR13
, pass
= 0;
293 int dst_y2
= dst_y
+ h
;
294 int dst_x2
= dst_x
+ w
;
295 drm_intel_bo
*aper_array
[3];
296 bool dst_y_tiled
= dst_tiling
== I915_TILING_Y
;
297 bool src_y_tiled
= src_tiling
== I915_TILING_Y
;
299 if (dst_tiling
!= I915_TILING_NONE
) {
300 if (dst_offset
& 4095)
303 if (src_tiling
!= I915_TILING_NONE
) {
304 if (src_offset
& 4095)
307 if ((dst_y_tiled
|| src_y_tiled
) && brw
->gen
< 6)
310 assert(!dst_y_tiled
|| (dst_pitch
% 128) == 0);
311 assert(!src_y_tiled
|| (src_pitch
% 128) == 0);
313 /* do space check before going any further */
315 aper_array
[0] = brw
->batch
.bo
;
316 aper_array
[1] = dst_buffer
;
317 aper_array
[2] = src_buffer
;
319 if (dri_bufmgr_check_aperture_space(aper_array
, 3) != 0) {
320 intel_batchbuffer_flush(brw
);
329 unsigned length
= brw
->gen
>= 8 ? 10 : 8;
331 intel_batchbuffer_require_space(brw
, length
* 4, BLT_RING
);
332 DBG("%s src:buf(%p)/%d+%d %d,%d dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n",
334 src_buffer
, src_pitch
, src_offset
, src_x
, src_y
,
335 dst_buffer
, dst_pitch
, dst_offset
, dst_x
, dst_y
, w
, h
);
337 /* Blit pitch must be dword-aligned. Otherwise, the hardware appears to drop
338 * the low bits. Offsets must be naturally aligned.
340 if (src_pitch
% 4 != 0 || src_offset
% cpp
!= 0 ||
341 dst_pitch
% 4 != 0 || dst_offset
% cpp
!= 0)
344 /* For big formats (such as floating point), do the copy using 16 or 32bpp
345 * and multiply the coordinates.
354 assert(cpp
% 4 == 0);
362 BR13
= br13_for_cpp(cpp
) | translate_raster_op(logic_op
) << 16;
367 CMD
= XY_SRC_COPY_BLT_CMD
;
370 CMD
= XY_SRC_COPY_BLT_CMD
| XY_BLT_WRITE_ALPHA
| XY_BLT_WRITE_RGB
;
376 if (dst_tiling
!= I915_TILING_NONE
) {
380 if (src_tiling
!= I915_TILING_NONE
) {
385 if (dst_y2
<= dst_y
|| dst_x2
<= dst_x
) {
389 assert(dst_x
< dst_x2
);
390 assert(dst_y
< dst_y2
);
391 assert(src_offset
+ (src_y
+ h
- 1) * abs(src_pitch
) +
392 (w
* cpp
) <= src_buffer
->size
);
393 assert(dst_offset
+ (dst_y
+ h
- 1) * abs(dst_pitch
) +
394 (w
* cpp
) <= dst_buffer
->size
);
396 BEGIN_BATCH_BLT_TILED(length
, dst_y_tiled
, src_y_tiled
);
397 OUT_BATCH(CMD
| (length
- 2));
398 OUT_BATCH(BR13
| (uint16_t)dst_pitch
);
399 OUT_BATCH(SET_FIELD(dst_y
, BLT_Y
) | SET_FIELD(dst_x
, BLT_X
));
400 OUT_BATCH(SET_FIELD(dst_y2
, BLT_Y
) | SET_FIELD(dst_x2
, BLT_X
));
402 OUT_RELOC64(dst_buffer
,
403 I915_GEM_DOMAIN_RENDER
, I915_GEM_DOMAIN_RENDER
,
406 OUT_RELOC(dst_buffer
,
407 I915_GEM_DOMAIN_RENDER
, I915_GEM_DOMAIN_RENDER
,
410 OUT_BATCH(SET_FIELD(src_y
, BLT_Y
) | SET_FIELD(src_x
, BLT_X
));
411 OUT_BATCH((uint16_t)src_pitch
);
413 OUT_RELOC64(src_buffer
,
414 I915_GEM_DOMAIN_RENDER
, 0,
417 OUT_RELOC(src_buffer
,
418 I915_GEM_DOMAIN_RENDER
, 0,
422 ADVANCE_BATCH_TILED(dst_y_tiled
, src_y_tiled
);
424 intel_batchbuffer_emit_mi_flush(brw
);
430 intelEmitImmediateColorExpandBlit(struct brw_context
*brw
,
432 GLubyte
*src_bits
, GLuint src_size
,
435 drm_intel_bo
*dst_buffer
,
438 GLshort x
, GLshort y
,
439 GLshort w
, GLshort h
,
442 int dwords
= ALIGN(src_size
, 8) / 4;
443 uint32_t opcode
, br13
, blit_cmd
;
445 if (dst_tiling
!= I915_TILING_NONE
) {
446 if (dst_offset
& 4095)
448 if (dst_tiling
== I915_TILING_Y
)
452 assert((logic_op
>= GL_CLEAR
) && (logic_op
<= (GL_CLEAR
+ 0x0f)));
453 assert(dst_pitch
> 0);
458 DBG("%s dst:buf(%p)/%d+%d %d,%d sz:%dx%d, %d bytes %d dwords\n",
460 dst_buffer
, dst_pitch
, dst_offset
, x
, y
, w
, h
, src_size
, dwords
);
462 unsigned xy_setup_blt_length
= brw
->gen
>= 8 ? 10 : 8;
463 intel_batchbuffer_require_space(brw
, (xy_setup_blt_length
* 4) +
464 (3 * 4) + dwords
* 4, BLT_RING
);
466 opcode
= XY_SETUP_BLT_CMD
;
468 opcode
|= XY_BLT_WRITE_ALPHA
| XY_BLT_WRITE_RGB
;
469 if (dst_tiling
!= I915_TILING_NONE
) {
470 opcode
|= XY_DST_TILED
;
474 br13
= dst_pitch
| (translate_raster_op(logic_op
) << 16) | (1 << 29);
475 br13
|= br13_for_cpp(cpp
);
477 blit_cmd
= XY_TEXT_IMMEDIATE_BLIT_CMD
| XY_TEXT_BYTE_PACKED
; /* packing? */
478 if (dst_tiling
!= I915_TILING_NONE
)
479 blit_cmd
|= XY_DST_TILED
;
481 BEGIN_BATCH_BLT(xy_setup_blt_length
+ 3);
482 OUT_BATCH(opcode
| (xy_setup_blt_length
- 2));
484 OUT_BATCH((0 << 16) | 0); /* clip x1, y1 */
485 OUT_BATCH((100 << 16) | 100); /* clip x2, y2 */
487 OUT_RELOC64(dst_buffer
,
488 I915_GEM_DOMAIN_RENDER
, I915_GEM_DOMAIN_RENDER
,
491 OUT_RELOC(dst_buffer
,
492 I915_GEM_DOMAIN_RENDER
, I915_GEM_DOMAIN_RENDER
,
495 OUT_BATCH(0); /* bg */
496 OUT_BATCH(fg_color
); /* fg */
497 OUT_BATCH(0); /* pattern base addr */
501 OUT_BATCH(blit_cmd
| ((3 - 2) + dwords
));
502 OUT_BATCH(SET_FIELD(y
, BLT_Y
) | SET_FIELD(x
, BLT_X
));
503 OUT_BATCH(SET_FIELD(y
+ h
, BLT_Y
) | SET_FIELD(x
+ w
, BLT_X
));
506 intel_batchbuffer_data(brw
, src_bits
, dwords
* 4, BLT_RING
);
508 intel_batchbuffer_emit_mi_flush(brw
);
513 /* We don't have a memmove-type blit like some other hardware, so we'll do a
514 * rectangular blit covering a large space, then emit 1-scanline blit at the
515 * end to cover the last if we need.
518 intel_emit_linear_blit(struct brw_context
*brw
,
519 drm_intel_bo
*dst_bo
,
520 unsigned int dst_offset
,
521 drm_intel_bo
*src_bo
,
522 unsigned int src_offset
,
525 struct gl_context
*ctx
= &brw
->ctx
;
526 GLuint pitch
, height
;
529 /* The pitch given to the GPU must be DWORD aligned, and
530 * we want width to match pitch. Max width is (1 << 15 - 1),
531 * rounding that down to the nearest DWORD is 1 << 15 - 4
533 pitch
= ROUND_DOWN_TO(MIN2(size
, (1 << 15) - 1), 4);
534 height
= (pitch
== 0) ? 1 : size
/ pitch
;
535 ok
= intelEmitCopyBlit(brw
, 1,
536 pitch
, src_bo
, src_offset
, I915_TILING_NONE
,
537 pitch
, dst_bo
, dst_offset
, I915_TILING_NONE
,
540 pitch
, height
, /* w, h */
543 _mesa_problem(ctx
, "Failed to linear blit %dx%d\n", pitch
, height
);
545 src_offset
+= pitch
* height
;
546 dst_offset
+= pitch
* height
;
547 size
-= pitch
* height
;
548 assert (size
< (1 << 15));
549 pitch
= ALIGN(size
, 4);
551 ok
= intelEmitCopyBlit(brw
, 1,
552 pitch
, src_bo
, src_offset
, I915_TILING_NONE
,
553 pitch
, dst_bo
, dst_offset
, I915_TILING_NONE
,
559 _mesa_problem(ctx
, "Failed to linear blit %dx%d\n", size
, 1);
564 * Used to initialize the alpha value of an ARGB8888 miptree after copying
565 * into it from an XRGB8888 source.
567 * This is very common with glCopyTexImage2D(). Note that the coordinates are
568 * relative to the start of the miptree, not relative to a slice within the
572 intel_miptree_set_alpha_to_one(struct brw_context
*brw
,
573 struct intel_mipmap_tree
*mt
,
574 int x
, int y
, int width
, int height
)
578 drm_intel_bo
*aper_array
[2];
583 DBG("%s dst:buf(%p)/%d %d,%d sz:%dx%d\n",
584 __FUNCTION__
, mt
->bo
, pitch
, x
, y
, width
, height
);
586 BR13
= br13_for_cpp(cpp
) | 0xf0 << 16;
587 CMD
= XY_COLOR_BLT_CMD
;
588 CMD
|= XY_BLT_WRITE_ALPHA
;
590 if (mt
->tiling
!= I915_TILING_NONE
) {
596 /* do space check before going any further */
597 aper_array
[0] = brw
->batch
.bo
;
598 aper_array
[1] = mt
->bo
;
600 if (drm_intel_bufmgr_check_aperture_space(aper_array
,
601 ARRAY_SIZE(aper_array
)) != 0) {
602 intel_batchbuffer_flush(brw
);
605 unsigned length
= brw
->gen
>= 8 ? 7 : 6;
606 bool dst_y_tiled
= mt
->tiling
== I915_TILING_Y
;
608 BEGIN_BATCH_BLT_TILED(length
, dst_y_tiled
, false);
609 OUT_BATCH(CMD
| (length
- 2));
611 OUT_BATCH(SET_FIELD(y
, BLT_Y
) | SET_FIELD(x
, BLT_X
));
612 OUT_BATCH(SET_FIELD(y
+ height
, BLT_Y
) | SET_FIELD(x
+ width
, BLT_X
));
615 I915_GEM_DOMAIN_RENDER
, I915_GEM_DOMAIN_RENDER
,
619 I915_GEM_DOMAIN_RENDER
, I915_GEM_DOMAIN_RENDER
,
622 OUT_BATCH(0xffffffff); /* white, but only alpha gets written */
623 ADVANCE_BATCH_TILED(dst_y_tiled
, false);
625 intel_batchbuffer_emit_mi_flush(brw
);