src/mesa/drivers/dri/i965/intel_blit.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 VMware, Inc.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28
  29 #include "main/mtypes.h"
  30 #include "main/context.h"
  31 #include "main/enums.h"
  32 #include "main/colormac.h"
  33 #include "main/fbobject.h"
  34
  35 #include "brw_context.h"
  36 #include "brw_defines.h"
  37 #include "intel_blit.h"
  38 #include "intel_buffers.h"
  39 #include "intel_fbo.h"
  40 #include "intel_reg.h"
  41 #include "intel_batchbuffer.h"
  42 #include "intel_mipmap_tree.h"
  43
  44 #define FILE_DEBUG_FLAG DEBUG_BLIT
  45
  46 static void
  47 intel_miptree_set_alpha_to_one(struct brw_context *brw,
  48                                struct intel_mipmap_tree *mt,
  49                                int x, int y, int width, int height);
  50
  51 static GLuint translate_raster_op(GLenum logicop)
  52 {
  53    switch(logicop) {
  54    case GL_CLEAR: return 0x00;
  55    case GL_AND: return 0x88;
  56    case GL_AND_REVERSE: return 0x44;
  57    case GL_COPY: return 0xCC;
  58    case GL_AND_INVERTED: return 0x22;
  59    case GL_NOOP: return 0xAA;
  60    case GL_XOR: return 0x66;
  61    case GL_OR: return 0xEE;
  62    case GL_NOR: return 0x11;
  63    case GL_EQUIV: return 0x99;
  64    case GL_INVERT: return 0x55;
  65    case GL_OR_REVERSE: return 0xDD;
  66    case GL_COPY_INVERTED: return 0x33;
  67    case GL_OR_INVERTED: return 0xBB;
  68    case GL_NAND: return 0x77;
  69    case GL_SET: return 0xFF;
  70    default: return 0;
  71    }
  72 }
  73
  74 static uint32_t
  75 br13_for_cpp(int cpp)
  76 {
  77    switch (cpp) {
  78    case 4:
  79       return BR13_8888;
  80       break;
  81    case 2:
  82       return BR13_565;
  83       break;
  84    case 1:
  85       return BR13_8;
  86       break;
  87    default:
  88       assert(0);
  89       return 0;
  90    }
  91 }
  92
  93 /**
  94  * Emits the packet for switching the blitter from X to Y tiled or back.
  95  *
  96  * This has to be called in a single BEGIN_BATCH_BLT_TILED() /
  97  * ADVANCE_BATCH_TILED().  This is because BCS_SWCTRL is saved and restored as
  98  * part of the power context, not a render context, and if the batchbuffer was
  99  * to get flushed between setting and blitting, or blitting and restoring, our
 100  * tiling state would leak into other unsuspecting applications (like the X
 101  * server).
 102  */
 103 static void
 104 set_blitter_tiling(struct brw_context *brw,
 105                    bool dst_y_tiled, bool src_y_tiled)
 106 {
 107    assert(brw->gen >= 6);
 108
 109    /* Idle the blitter before we update how tiling is interpreted. */
 110    OUT_BATCH(MI_FLUSH_DW);
 111    OUT_BATCH(0);
 112    OUT_BATCH(0);
 113    OUT_BATCH(0);
 114
 115    OUT_BATCH(MI_LOAD_REGISTER_IMM | (3 - 2));
 116    OUT_BATCH(BCS_SWCTRL);
 117    OUT_BATCH((BCS_SWCTRL_DST_Y | BCS_SWCTRL_SRC_Y) << 16 |
 118              (dst_y_tiled ? BCS_SWCTRL_DST_Y : 0) |
 119              (src_y_tiled ? BCS_SWCTRL_SRC_Y : 0));
 120 }
 121
 122 #define BEGIN_BATCH_BLT_TILED(n, dst_y_tiled, src_y_tiled) do {         \
 123       BEGIN_BATCH_BLT(n + ((dst_y_tiled || src_y_tiled) ? 14 : 0));     \
 124       if (dst_y_tiled || src_y_tiled)                                   \
 125          set_blitter_tiling(brw, dst_y_tiled, src_y_tiled);             \
 126    } while (0)
 127
 128 #define ADVANCE_BATCH_TILED(dst_y_tiled, src_y_tiled) do {              \
 129       if (dst_y_tiled || src_y_tiled)                                   \
 130          set_blitter_tiling(brw, false, false);                         \
 131       ADVANCE_BATCH();                                                  \
 132    } while (0)
 133
 134 /**
 135  * Implements a rectangular block transfer (blit) of pixels between two
 136  * miptrees.
 137  *
 138  * Our blitter can operate on 1, 2, or 4-byte-per-pixel data, with generous,
 139  * but limited, pitches and sizes allowed.
 140  *
 141  * The src/dst coordinates are relative to the given level/slice of the
 142  * miptree.
 143  *
 144  * If @src_flip or @dst_flip is set, then the rectangle within that miptree
 145  * will be inverted (including scanline order) when copying.  This is common
 146  * in GL when copying between window system and user-created
 147  * renderbuffers/textures.
 148  */
 149 bool
 150 intel_miptree_blit(struct brw_context *brw,
 151                    struct intel_mipmap_tree *src_mt,
 152                    int src_level, int src_slice,
 153                    uint32_t src_x, uint32_t src_y, bool src_flip,
 154                    struct intel_mipmap_tree *dst_mt,
 155                    int dst_level, int dst_slice,
 156                    uint32_t dst_x, uint32_t dst_y, bool dst_flip,
 157                    uint32_t width, uint32_t height,
 158                    GLenum logicop)
 159 {
 160    /* The blitter doesn't understand multisampling at all. */
 161    if (src_mt->num_samples > 0 || dst_mt->num_samples > 0)
 162       return false;
 163
 164    /* No sRGB decode or encode is done by the hardware blitter, which is
 165     * consistent with what we want in the callers (glCopyTexSubImage(),
 166     * glBlitFramebuffer(), texture validation, etc.).
 167     */
 168    mesa_format src_format = _mesa_get_srgb_format_linear(src_mt->format);
 169    mesa_format dst_format = _mesa_get_srgb_format_linear(dst_mt->format);
 170
 171    /* The blitter doesn't support doing any format conversions.  We do also
 172     * support blitting ARGB8888 to XRGB8888 (trivial, the values dropped into
 173     * the X channel don't matter), and XRGB8888 to ARGB8888 by setting the A
 174     * channel to 1.0 at the end.
 175     */
 176    if (src_format != dst_format &&
 177       ((src_format != MESA_FORMAT_B8G8R8A8_UNORM &&
 178         src_format != MESA_FORMAT_B8G8R8X8_UNORM) ||
 179        (dst_format != MESA_FORMAT_B8G8R8A8_UNORM &&
 180         dst_format != MESA_FORMAT_B8G8R8X8_UNORM))) {
 181       perf_debug("%s: Can't use hardware blitter from %s to %s, "
 182                  "falling back.\n", __FUNCTION__,
 183                  _mesa_get_format_name(src_format),
 184                  _mesa_get_format_name(dst_format));
 185       return false;
 186    }
 187
 188    /* According to the Ivy Bridge PRM, Vol1 Part4, section 1.2.1.2 (Graphics
 189     * Data Size Limitations):
 190     *
 191     *    The BLT engine is capable of transferring very large quantities of
 192     *    graphics data. Any graphics data read from and written to the
 193     *    destination is permitted to represent a number of pixels that
 194     *    occupies up to 65,536 scan lines and up to 32,768 bytes per scan line
 195     *    at the destination. The maximum number of pixels that may be
 196     *    represented per scan line’s worth of graphics data depends on the
 197     *    color depth.
 198     *
 199     * Furthermore, intelEmitCopyBlit (which is called below) uses a signed
 200     * 16-bit integer to represent buffer pitch, so it can only handle buffer
 201     * pitches < 32k.
 202     *
 203     * As a result of these two limitations, we can only use the blitter to do
 204     * this copy when the miptree's pitch is less than 32k.
 205     */
 206    if (src_mt->pitch >= 32768 ||
 207        dst_mt->pitch >= 32768) {
 208       perf_debug("Falling back due to >=32k pitch\n");
 209       return false;
 210    }
 211
 212    /* The blitter has no idea about HiZ or fast color clears, so we need to
 213     * resolve the miptrees before we do anything.
 214     */
 215    intel_miptree_slice_resolve_depth(brw, src_mt, src_level, src_slice);
 216    intel_miptree_slice_resolve_depth(brw, dst_mt, dst_level, dst_slice);
 217    intel_miptree_resolve_color(brw, src_mt);
 218    intel_miptree_resolve_color(brw, dst_mt);
 219
 220    if (src_flip)
 221       src_y = minify(src_mt->physical_height0, src_level - src_mt->first_level) - src_y - height;
 222
 223    if (dst_flip)
 224       dst_y = minify(dst_mt->physical_height0, dst_level - dst_mt->first_level) - dst_y - height;
 225
 226    int src_pitch = src_mt->pitch;
 227    if (src_flip != dst_flip)
 228       src_pitch = -src_pitch;
 229
 230    uint32_t src_image_x, src_image_y;
 231    intel_miptree_get_image_offset(src_mt, src_level, src_slice,
 232                                   &src_image_x, &src_image_y);
 233    src_x += src_image_x;
 234    src_y += src_image_y;
 235
 236    /* The blitter interprets the 16-bit src x/y as a signed 16-bit value,
 237     * where negative values are invalid.  The values we're working with are
 238     * unsigned, so make sure we don't overflow.
 239     */
 240    if (src_x >= 32768 || src_y >= 32768) {
 241       perf_debug("Falling back due to >=32k src offset (%d, %d)\n",
 242                  src_x, src_y);
 243       return false;
 244    }
 245
 246    uint32_t dst_image_x, dst_image_y;
 247    intel_miptree_get_image_offset(dst_mt, dst_level, dst_slice,
 248                                   &dst_image_x, &dst_image_y);
 249    dst_x += dst_image_x;
 250    dst_y += dst_image_y;
 251
 252    /* The blitter interprets the 16-bit destination x/y as a signed 16-bit
 253     * value.  The values we're working with are unsigned, so make sure we
 254     * don't overflow.
 255     */
 256    if (dst_x >= 32768 || dst_y >= 32768) {
 257       perf_debug("Falling back due to >=32k dst offset (%d, %d)\n",
 258                  dst_x, dst_y);
 259       return false;
 260    }
 261
 262    if (!intelEmitCopyBlit(brw,
 263                           src_mt->cpp,
 264                           src_pitch,
 265                           src_mt->bo, src_mt->offset,
 266                           src_mt->tiling,
 267                           dst_mt->pitch,
 268                           dst_mt->bo, dst_mt->offset,
 269                           dst_mt->tiling,
 270                           src_x, src_y,
 271                           dst_x, dst_y,
 272                           width, height,
 273                           logicop)) {
 274       return false;
 275    }
 276
 277    if (src_mt->format == MESA_FORMAT_B8G8R8X8_UNORM &&
 278        dst_mt->format == MESA_FORMAT_B8G8R8A8_UNORM) {
 279       intel_miptree_set_alpha_to_one(brw, dst_mt,
 280                                      dst_x, dst_y,
 281                                      width, height);
 282    }
 283
 284    return true;
 285 }
 286
 287 /* Copy BitBlt
 288  */
 289 bool
 290 intelEmitCopyBlit(struct brw_context *brw,
 291                   GLuint cpp,
 292                   GLshort src_pitch,
 293                   drm_intel_bo *src_buffer,
 294                   GLuint src_offset,
 295                   uint32_t src_tiling,
 296                   GLshort dst_pitch,
 297                   drm_intel_bo *dst_buffer,
 298                   GLuint dst_offset,
 299                   uint32_t dst_tiling,
 300                   GLshort src_x, GLshort src_y,
 301                   GLshort dst_x, GLshort dst_y,
 302                   GLshort w, GLshort h,
 303                   GLenum logic_op)
 304 {
 305    GLuint CMD, BR13, pass = 0;
 306    int dst_y2 = dst_y + h;
 307    int dst_x2 = dst_x + w;
 308    drm_intel_bo *aper_array[3];
 309    bool dst_y_tiled = dst_tiling == I915_TILING_Y;
 310    bool src_y_tiled = src_tiling == I915_TILING_Y;
 311
 312    if (dst_tiling != I915_TILING_NONE) {
 313       if (dst_offset & 4095)
 314          return false;
 315    }
 316    if (src_tiling != I915_TILING_NONE) {
 317       if (src_offset & 4095)
 318          return false;
 319    }
 320    if ((dst_y_tiled || src_y_tiled) && brw->gen < 6)
 321       return false;
 322
 323    /* do space check before going any further */
 324    do {
 325        aper_array[0] = brw->batch.bo;
 326        aper_array[1] = dst_buffer;
 327        aper_array[2] = src_buffer;
 328
 329        if (dri_bufmgr_check_aperture_space(aper_array, 3) != 0) {
 330            intel_batchbuffer_flush(brw);
 331            pass++;
 332        } else
 333            break;
 334    } while (pass < 2);
 335
 336    if (pass >= 2)
 337       return false;
 338
 339    intel_batchbuffer_require_space(brw, 8 * 4, BLT_RING);
 340    DBG("%s src:buf(%p)/%d+%d %d,%d dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n",
 341        __FUNCTION__,
 342        src_buffer, src_pitch, src_offset, src_x, src_y,
 343        dst_buffer, dst_pitch, dst_offset, dst_x, dst_y, w, h);
 344
 345    /* Blit pitch must be dword-aligned.  Otherwise, the hardware appears to drop
 346     * the low bits.
 347     */
 348    if (src_pitch % 4 != 0 || dst_pitch % 4 != 0)
 349       return false;
 350
 351    /* For big formats (such as floating point), do the copy using 16 or 32bpp
 352     * and multiply the coordinates.
 353     */
 354    if (cpp > 4) {
 355       if (cpp % 4 == 2) {
 356          dst_x *= cpp / 2;
 357          dst_x2 *= cpp / 2;
 358          src_x *= cpp / 2;
 359          cpp = 2;
 360       } else {
 361          assert(cpp % 4 == 0);
 362          dst_x *= cpp / 4;
 363          dst_x2 *= cpp / 4;
 364          src_x *= cpp / 4;
 365          cpp = 4;
 366       }
 367    }
 368
 369    BR13 = br13_for_cpp(cpp) | translate_raster_op(logic_op) << 16;
 370
 371    switch (cpp) {
 372    case 1:
 373    case 2:
 374       CMD = XY_SRC_COPY_BLT_CMD;
 375       break;
 376    case 4:
 377       CMD = XY_SRC_COPY_BLT_CMD | XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
 378       break;
 379    default:
 380       return false;
 381    }
 382
 383    if (dst_tiling != I915_TILING_NONE) {
 384       CMD |= XY_DST_TILED;
 385       dst_pitch /= 4;
 386    }
 387    if (src_tiling != I915_TILING_NONE) {
 388       CMD |= XY_SRC_TILED;
 389       src_pitch /= 4;
 390    }
 391
 392    if (dst_y2 <= dst_y || dst_x2 <= dst_x) {
 393       return true;
 394    }
 395
 396    assert(dst_x < dst_x2);
 397    assert(dst_y < dst_y2);
 398    assert(src_offset + (src_y + h - 1) * abs(src_pitch) +
 399           (w * cpp) <= src_buffer->size);
 400    assert(dst_offset + (dst_y + h - 1) * abs(dst_pitch) +
 401           (w * cpp) <= dst_buffer->size);
 402
 403    unsigned length = brw->gen >= 8 ? 10 : 8;
 404
 405    BEGIN_BATCH_BLT_TILED(length, dst_y_tiled, src_y_tiled);
 406    OUT_BATCH(CMD | (length - 2));
 407    OUT_BATCH(BR13 | (uint16_t)dst_pitch);
 408    OUT_BATCH(SET_FIELD(dst_y, BLT_Y) | SET_FIELD(dst_x, BLT_X));
 409    OUT_BATCH(SET_FIELD(dst_y2, BLT_Y) | SET_FIELD(dst_x2, BLT_X));
 410    if (brw->gen >= 8) {
 411       OUT_RELOC64(dst_buffer,
 412                   I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
 413                   dst_offset);
 414    } else {
 415       OUT_RELOC(dst_buffer,
 416                 I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
 417                 dst_offset);
 418    }
 419    OUT_BATCH(SET_FIELD(src_y, BLT_Y) | SET_FIELD(src_x, BLT_X));
 420    OUT_BATCH((uint16_t)src_pitch);
 421    if (brw->gen >= 8) {
 422       OUT_RELOC64(src_buffer,
 423                   I915_GEM_DOMAIN_RENDER, 0,
 424                   src_offset);
 425    } else {
 426       OUT_RELOC(src_buffer,
 427                 I915_GEM_DOMAIN_RENDER, 0,
 428                 src_offset);
 429    }
 430
 431    ADVANCE_BATCH_TILED(dst_y_tiled, src_y_tiled);
 432
 433    intel_batchbuffer_emit_mi_flush(brw);
 434
 435    return true;
 436 }
 437
 438 bool
 439 intelEmitImmediateColorExpandBlit(struct brw_context *brw,
 440                                   GLuint cpp,
 441                                   GLubyte *src_bits, GLuint src_size,
 442                                   GLuint fg_color,
 443                                   GLshort dst_pitch,
 444                                   drm_intel_bo *dst_buffer,
 445                                   GLuint dst_offset,
 446                                   uint32_t dst_tiling,
 447                                   GLshort x, GLshort y,
 448                                   GLshort w, GLshort h,
 449                                   GLenum logic_op)
 450 {
 451    int dwords = ALIGN(src_size, 8) / 4;
 452    uint32_t opcode, br13, blit_cmd;
 453
 454    if (dst_tiling != I915_TILING_NONE) {
 455       if (dst_offset & 4095)
 456          return false;
 457       if (dst_tiling == I915_TILING_Y)
 458          return false;
 459    }
 460
 461    assert((logic_op >= GL_CLEAR) && (logic_op <= (GL_CLEAR + 0x0f)));
 462    assert(dst_pitch > 0);
 463
 464    if (w < 0 || h < 0)
 465       return true;
 466
 467    DBG("%s dst:buf(%p)/%d+%d %d,%d sz:%dx%d, %d bytes %d dwords\n",
 468        __FUNCTION__,
 469        dst_buffer, dst_pitch, dst_offset, x, y, w, h, src_size, dwords);
 470
 471    intel_batchbuffer_require_space(brw, (8 * 4) + (3 * 4) + dwords * 4, BLT_RING);
 472
 473    opcode = XY_SETUP_BLT_CMD;
 474    if (cpp == 4)
 475       opcode |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
 476    if (dst_tiling != I915_TILING_NONE) {
 477       opcode |= XY_DST_TILED;
 478       dst_pitch /= 4;
 479    }
 480
 481    br13 = dst_pitch | (translate_raster_op(logic_op) << 16) | (1 << 29);
 482    br13 |= br13_for_cpp(cpp);
 483
 484    blit_cmd = XY_TEXT_IMMEDIATE_BLIT_CMD | XY_TEXT_BYTE_PACKED; /* packing? */
 485    if (dst_tiling != I915_TILING_NONE)
 486       blit_cmd |= XY_DST_TILED;
 487
 488    unsigned xy_setup_blt_length = brw->gen >= 8 ? 10 : 8;
 489
 490    BEGIN_BATCH_BLT(xy_setup_blt_length + 3);
 491    OUT_BATCH(opcode | (xy_setup_blt_length - 2));
 492    OUT_BATCH(br13);
 493    OUT_BATCH((0 << 16) | 0); /* clip x1, y1 */
 494    OUT_BATCH((100 << 16) | 100); /* clip x2, y2 */
 495    if (brw->gen >= 8) {
 496       OUT_RELOC64(dst_buffer,
 497                   I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
 498                   dst_offset);
 499    } else {
 500       OUT_RELOC(dst_buffer,
 501                 I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
 502                 dst_offset);
 503    }
 504    OUT_BATCH(0); /* bg */
 505    OUT_BATCH(fg_color); /* fg */
 506    OUT_BATCH(0); /* pattern base addr */
 507    if (brw->gen >= 8)
 508       OUT_BATCH(0);
 509
 510    OUT_BATCH(blit_cmd | ((3 - 2) + dwords));
 511    OUT_BATCH(SET_FIELD(y, BLT_Y) | SET_FIELD(x, BLT_X));
 512    OUT_BATCH(SET_FIELD(y + h, BLT_Y) | SET_FIELD(x + w, BLT_X));
 513    ADVANCE_BATCH();
 514
 515    intel_batchbuffer_data(brw, src_bits, dwords * 4, BLT_RING);
 516
 517    intel_batchbuffer_emit_mi_flush(brw);
 518
 519    return true;
 520 }
 521
 522 /* We don't have a memmove-type blit like some other hardware, so we'll do a
 523  * rectangular blit covering a large space, then emit 1-scanline blit at the
 524  * end to cover the last if we need.
 525  */
 526 void
 527 intel_emit_linear_blit(struct brw_context *brw,
 528                        drm_intel_bo *dst_bo,
 529                        unsigned int dst_offset,
 530                        drm_intel_bo *src_bo,
 531                        unsigned int src_offset,
 532                        unsigned int size)
 533 {
 534    struct gl_context *ctx = &brw->ctx;
 535    GLuint pitch, height;
 536    bool ok;
 537
 538    /* The pitch given to the GPU must be DWORD aligned, and
 539     * we want width to match pitch. Max width is (1 << 15 - 1),
 540     * rounding that down to the nearest DWORD is 1 << 15 - 4
 541     */
 542    pitch = ROUND_DOWN_TO(MIN2(size, (1 << 15) - 1), 4);
 543    height = (pitch == 0) ? 1 : size / pitch;
 544    ok = intelEmitCopyBlit(brw, 1,
 545                           pitch, src_bo, src_offset, I915_TILING_NONE,
 546                           pitch, dst_bo, dst_offset, I915_TILING_NONE,
 547                           0, 0, /* src x/y */
 548                           0, 0, /* dst x/y */
 549                           pitch, height, /* w, h */
 550                           GL_COPY);
 551    if (!ok)
 552       _mesa_problem(ctx, "Failed to linear blit %dx%d\n", pitch, height);
 553
 554    src_offset += pitch * height;
 555    dst_offset += pitch * height;
 556    size -= pitch * height;
 557    assert (size < (1 << 15));
 558    pitch = ALIGN(size, 4);
 559    if (size != 0) {
 560       ok = intelEmitCopyBlit(brw, 1,
 561                              pitch, src_bo, src_offset, I915_TILING_NONE,
 562                              pitch, dst_bo, dst_offset, I915_TILING_NONE,
 563                              0, 0, /* src x/y */
 564                              0, 0, /* dst x/y */
 565                              size, 1, /* w, h */
 566                              GL_COPY);
 567       if (!ok)
 568          _mesa_problem(ctx, "Failed to linear blit %dx%d\n", size, 1);
 569    }
 570 }
 571
 572 /**
 573  * Used to initialize the alpha value of an ARGB8888 miptree after copying
 574  * into it from an XRGB8888 source.
 575  *
 576  * This is very common with glCopyTexImage2D().  Note that the coordinates are
 577  * relative to the start of the miptree, not relative to a slice within the
 578  * miptree.
 579  */
 580 static void
 581 intel_miptree_set_alpha_to_one(struct brw_context *brw,
 582                               struct intel_mipmap_tree *mt,
 583                               int x, int y, int width, int height)
 584 {
 585    uint32_t BR13, CMD;
 586    int pitch, cpp;
 587    drm_intel_bo *aper_array[2];
 588
 589    pitch = mt->pitch;
 590    cpp = mt->cpp;
 591
 592    DBG("%s dst:buf(%p)/%d %d,%d sz:%dx%d\n",
 593        __FUNCTION__, mt->bo, pitch, x, y, width, height);
 594
 595    BR13 = br13_for_cpp(cpp) | 0xf0 << 16;
 596    CMD = XY_COLOR_BLT_CMD;
 597    CMD |= XY_BLT_WRITE_ALPHA;
 598
 599    if (mt->tiling != I915_TILING_NONE) {
 600       CMD |= XY_DST_TILED;
 601       pitch /= 4;
 602    }
 603    BR13 |= pitch;
 604
 605    /* do space check before going any further */
 606    aper_array[0] = brw->batch.bo;
 607    aper_array[1] = mt->bo;
 608
 609    if (drm_intel_bufmgr_check_aperture_space(aper_array,
 610                                              ARRAY_SIZE(aper_array)) != 0) {
 611       intel_batchbuffer_flush(brw);
 612    }
 613
 614    unsigned length = brw->gen >= 8 ? 7 : 6;
 615    bool dst_y_tiled = mt->tiling == I915_TILING_Y;
 616
 617    BEGIN_BATCH_BLT_TILED(length, dst_y_tiled, false);
 618    OUT_BATCH(CMD | (length - 2));
 619    OUT_BATCH(BR13);
 620    OUT_BATCH(SET_FIELD(y, BLT_Y) | SET_FIELD(x, BLT_X));
 621    OUT_BATCH(SET_FIELD(y + height, BLT_Y) | SET_FIELD(x + width, BLT_X));
 622    if (brw->gen >= 8) {
 623       OUT_RELOC64(mt->bo,
 624                   I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
 625                   0);
 626    } else {
 627       OUT_RELOC(mt->bo,
 628                 I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
 629                 0);
 630    }
 631    OUT_BATCH(0xffffffff); /* white, but only alpha gets written */
 632    ADVANCE_BATCH_TILED(dst_y_tiled, false);
 633
 634    intel_batchbuffer_emit_mi_flush(brw);
 635 }