[965] Use shared intel_regions.c.
[mesa.git] / src / mesa / drivers / dri / i965 / intel_context.c
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28
29 #include "glheader.h"
30 #include "context.h"
31 #include "matrix.h"
32 #include "simple_list.h"
33 #include "extensions.h"
34 #include "framebuffer.h"
35 #include "imports.h"
36 #include "points.h"
37
38 #include "swrast/swrast.h"
39 #include "swrast_setup/swrast_setup.h"
40 #include "tnl/tnl.h"
41 #include "vbo/vbo.h"
42
43 #include "tnl/t_pipeline.h"
44 #include "tnl/t_vertex.h"
45
46 #include "drivers/common/driverfuncs.h"
47
48 #include "intel_screen.h"
49 #include "intel_chipset.h"
50
51 #include "i830_dri.h"
52 #include "i830_common.h"
53
54 #include "intel_tex.h"
55 #include "intel_span.h"
56 #include "intel_ioctl.h"
57 #include "intel_batchbuffer.h"
58 #include "intel_blit.h"
59 #include "intel_regions.h"
60 #include "intel_buffer_objects.h"
61 #include "intel_decode.h"
62 #include "intel_bufmgr_ttm.h"
63
64 #include "i915_drm.h"
65
66 #include "utils.h"
67 #include "vblank.h"
68 #ifndef INTEL_DEBUG
69 int INTEL_DEBUG = (0);
70 #endif
71
72 #define need_GL_NV_point_sprite
73 #define need_GL_ARB_multisample
74 #define need_GL_ARB_point_parameters
75 #define need_GL_ARB_texture_compression
76 #define need_GL_ARB_vertex_buffer_object
77 #define need_GL_ARB_vertex_program
78 #define need_GL_ARB_window_pos
79 #define need_GL_ARB_occlusion_query
80 #define need_GL_EXT_blend_color
81 #define need_GL_EXT_blend_equation_separate
82 #define need_GL_EXT_blend_func_separate
83 #define need_GL_EXT_blend_minmax
84 #define need_GL_EXT_cull_vertex
85 #define need_GL_EXT_fog_coord
86 #define need_GL_EXT_multi_draw_arrays
87 #define need_GL_EXT_secondary_color
88 #define need_GL_EXT_point_parameters
89 #define need_GL_VERSION_2_0
90 #define need_GL_VERSION_2_1
91 #define need_GL_ARB_shader_objects
92 #define need_GL_ARB_vertex_shader
93
94 #include "extension_helper.h"
95
96 #ifndef VERBOSE
97 int VERBOSE = 0;
98 #endif
99
100 /***************************************
101 * Mesa's Driver Functions
102 ***************************************/
103
104 #define DRIVER_VERSION "4.1.3002"
105
106 static const GLubyte *intelGetString( GLcontext *ctx, GLenum name )
107 {
108 const char * chipset;
109 static char buffer[128];
110
111 switch (name) {
112 case GL_VENDOR:
113 return (GLubyte *)"Tungsten Graphics, Inc";
114 break;
115
116 case GL_RENDERER:
117 switch (intel_context(ctx)->intelScreen->deviceID) {
118 case PCI_CHIP_I965_Q:
119 chipset = "Intel(R) 965Q";
120 break;
121 case PCI_CHIP_I965_G:
122 case PCI_CHIP_I965_G_1:
123 chipset = "Intel(R) 965G";
124 break;
125 case PCI_CHIP_I946_GZ:
126 chipset = "Intel(R) 946GZ";
127 break;
128 case PCI_CHIP_I965_GM:
129 chipset = "Intel(R) 965GM";
130 break;
131 case PCI_CHIP_I965_GME:
132 chipset = "Intel(R) 965GME/GLE";
133 break;
134 default:
135 chipset = "Unknown Intel Chipset";
136 }
137
138 (void) driGetRendererString( buffer, chipset, DRIVER_VERSION, 0 );
139 return (GLubyte *) buffer;
140
141 default:
142 return NULL;
143 }
144 }
145
146
147 /**
148 * Extension strings exported by the intel driver.
149 *
150 * \note
151 * It appears that ARB_texture_env_crossbar has "disappeared" compared to the
152 * old i830-specific driver.
153 */
154 const struct dri_extension card_extensions[] =
155 {
156 { "GL_ARB_multisample", GL_ARB_multisample_functions },
157 { "GL_ARB_multitexture", NULL },
158 { "GL_ARB_point_parameters", GL_ARB_point_parameters_functions },
159 { "GL_NV_point_sprite", GL_NV_point_sprite_functions },
160 { "GL_ARB_texture_border_clamp", NULL },
161 { "GL_ARB_texture_compression", GL_ARB_texture_compression_functions },
162 { "GL_ARB_texture_cube_map", NULL },
163 { "GL_ARB_texture_env_add", NULL },
164 { "GL_ARB_texture_env_combine", NULL },
165 { "GL_ARB_texture_env_dot3", NULL },
166 { "GL_ARB_texture_mirrored_repeat", NULL },
167 { "GL_ARB_texture_non_power_of_two", NULL },
168 { "GL_ARB_texture_rectangle", NULL },
169 { "GL_NV_texture_rectangle", NULL },
170 { "GL_EXT_texture_rectangle", NULL },
171 { "GL_ARB_texture_rectangle", NULL },
172 { "GL_ARB_point_sprite", NULL},
173 { "GL_ARB_point_parameters", NULL },
174 { "GL_ARB_vertex_buffer_object", GL_ARB_vertex_buffer_object_functions },
175 { "GL_ARB_vertex_program", GL_ARB_vertex_program_functions },
176 { "GL_ARB_window_pos", GL_ARB_window_pos_functions },
177 { "GL_EXT_blend_color", GL_EXT_blend_color_functions },
178 { "GL_EXT_blend_equation_separate", GL_EXT_blend_equation_separate_functions },
179 { "GL_EXT_blend_func_separate", GL_EXT_blend_func_separate_functions },
180 { "GL_EXT_blend_minmax", GL_EXT_blend_minmax_functions },
181 { "GL_EXT_blend_logic_op", NULL },
182 { "GL_EXT_blend_subtract", NULL },
183 { "GL_EXT_cull_vertex", GL_EXT_cull_vertex_functions },
184 { "GL_EXT_fog_coord", GL_EXT_fog_coord_functions },
185 { "GL_EXT_multi_draw_arrays", GL_EXT_multi_draw_arrays_functions },
186 { "GL_EXT_secondary_color", GL_EXT_secondary_color_functions },
187 { "GL_EXT_stencil_wrap", NULL },
188 { "GL_EXT_texture_edge_clamp", NULL },
189 { "GL_EXT_texture_env_combine", NULL },
190 { "GL_EXT_texture_env_dot3", NULL },
191 { "GL_EXT_texture_filter_anisotropic", NULL },
192 { "GL_EXT_texture_lod_bias", NULL },
193 { "GL_EXT_texture_sRGB", NULL },
194 { "GL_3DFX_texture_compression_FXT1", NULL },
195 { "GL_APPLE_client_storage", NULL },
196 { "GL_MESA_pack_invert", NULL },
197 { "GL_MESA_ycbcr_texture", NULL },
198 { "GL_NV_blend_square", NULL },
199 { "GL_SGIS_generate_mipmap", NULL },
200 { "GL_ARB_shading_language_100", GL_VERSION_2_0_functions},
201 { "GL_ARB_shading_language_120", GL_VERSION_2_1_functions},
202 { "GL_ARB_shader_objects", GL_ARB_shader_objects_functions},
203 { "GL_ARB_vertex_shader", GL_ARB_vertex_shader_functions},
204 { "GL_ARB_fragment_shader", NULL },
205 /* XXX not implement yet, to compile builtin glsl lib */
206 { "GL_ARB_draw_buffers", NULL },
207 { NULL, NULL }
208 };
209
210 const struct dri_extension arb_oc_extension =
211 { "GL_ARB_occlusion_query", GL_ARB_occlusion_query_functions};
212
213 void intelInitExtensions(GLcontext *ctx, GLboolean enable_imaging)
214 {
215 struct intel_context *intel = ctx?intel_context(ctx):NULL;
216 driInitExtensions(ctx, card_extensions, enable_imaging);
217 if (!ctx || intel->intelScreen->drmMinor >= 8)
218 driInitSingleExtension (ctx, &arb_oc_extension);
219 }
220
221 static const struct dri_debug_control debug_control[] =
222 {
223 { "fall", DEBUG_FALLBACKS },
224 { "tex", DEBUG_TEXTURE },
225 { "ioctl", DEBUG_IOCTL },
226 { "prim", DEBUG_PRIMS },
227 { "vert", DEBUG_VERTS },
228 { "state", DEBUG_STATE },
229 { "verb", DEBUG_VERBOSE },
230 { "dri", DEBUG_DRI },
231 { "dma", DEBUG_DMA },
232 { "san", DEBUG_SANITY },
233 { "sync", DEBUG_SYNC },
234 { "sleep", DEBUG_SLEEP },
235 { "pix", DEBUG_PIXEL },
236 { "buf", DEBUG_BUFMGR },
237 { "stats", DEBUG_STATS },
238 { "tile", DEBUG_TILE },
239 { "sing", DEBUG_SINGLE_THREAD },
240 { "thre", DEBUG_SINGLE_THREAD },
241 { "wm", DEBUG_WM },
242 { "vs", DEBUG_VS },
243 { "bat", DEBUG_BATCH },
244 { "blit", DEBUG_BLIT},
245 { "mip", DEBUG_MIPTREE},
246 { "reg", DEBUG_REGION},
247 { NULL, 0 }
248 };
249
250
251 static void intelInvalidateState( GLcontext *ctx, GLuint new_state )
252 {
253 struct intel_context *intel = intel_context(ctx);
254
255 _swrast_InvalidateState( ctx, new_state );
256 _swsetup_InvalidateState( ctx, new_state );
257 _vbo_InvalidateState( ctx, new_state );
258 _tnl_InvalidateState( ctx, new_state );
259 _tnl_invalidate_vertex_state( ctx, new_state );
260
261 intel->NewGLState |= new_state;
262
263 if (intel->vtbl.invalidate_state)
264 intel->vtbl.invalidate_state( intel, new_state );
265 }
266
267
268 void intelFlush( GLcontext *ctx )
269 {
270 struct intel_context *intel = intel_context( ctx );
271
272 if (intel->batch->map != intel->batch->ptr)
273 intel_batchbuffer_flush(intel->batch);
274 }
275
276 void intelFinish( GLcontext *ctx )
277 {
278 struct intel_context *intel = intel_context( ctx );
279
280 intelFlush(ctx);
281 if (intel->batch->last_fence) {
282 dri_fence_wait(intel->batch->last_fence);
283 dri_fence_unreference(intel->batch->last_fence);
284 intel->batch->last_fence = NULL;
285 }
286 }
287
288 static void
289 intelBeginQuery(GLcontext *ctx, GLenum target, struct gl_query_object *q)
290 {
291 struct intel_context *intel = intel_context( ctx );
292 drmI830MMIO io = {
293 .read_write = MMIO_READ,
294 .reg = MMIO_REGS_PS_DEPTH_COUNT,
295 .data = &q->Result
296 };
297 intel->stats_wm++;
298 intelFinish(&intel->ctx);
299 drmCommandWrite(intel->driFd, DRM_I830_MMIO, &io, sizeof(io));
300 }
301
302 static void
303 intelEndQuery(GLcontext *ctx, GLenum target, struct gl_query_object *q)
304 {
305 struct intel_context *intel = intel_context( ctx );
306 GLuint64EXT tmp;
307 drmI830MMIO io = {
308 .read_write = MMIO_READ,
309 .reg = MMIO_REGS_PS_DEPTH_COUNT,
310 .data = &tmp
311 };
312 intelFinish(&intel->ctx);
313 drmCommandWrite(intel->driFd, DRM_I830_MMIO, &io, sizeof(io));
314 q->Result = tmp - q->Result;
315 q->Ready = GL_TRUE;
316 intel->stats_wm--;
317 }
318
319 /** Driver-specific fence emit implementation for the fake memory manager. */
320 static unsigned int
321 intel_fence_emit(void *private)
322 {
323 struct intel_context *intel = (struct intel_context *)private;
324 unsigned int fence;
325
326 /* XXX: Need to emit a flush, if we haven't already (at least with the
327 * current batchbuffer implementation, we have).
328 */
329
330 fence = intelEmitIrqLocked(intel);
331
332 return fence;
333 }
334
335 /** Driver-specific fence wait implementation for the fake memory manager. */
336 static int
337 intel_fence_wait(void *private, unsigned int cookie)
338 {
339 struct intel_context *intel = (struct intel_context *)private;
340
341 intelWaitIrq(intel, cookie);
342
343 return 0;
344 }
345
346 static GLboolean
347 intel_init_bufmgr(struct intel_context *intel)
348 {
349 intelScreenPrivate *intelScreen = intel->intelScreen;
350 GLboolean ttm_disable = getenv("INTEL_NO_TTM") != NULL;
351
352 /* If we've got a new enough DDX that's initializing TTM and giving us
353 * object handles for the shared buffers, use that.
354 */
355 intel->ttm = GL_FALSE;
356 if (!ttm_disable &&
357 intel->intelScreen->driScrnPriv->ddx_version.minor >= 9 &&
358 intel->intelScreen->drmMinor >= 11 &&
359 intel->intelScreen->front.bo_handle != -1)
360 {
361 intel->bufmgr = intel_bufmgr_ttm_init(intel->driFd,
362 DRM_FENCE_TYPE_EXE,
363 DRM_FENCE_TYPE_EXE |
364 DRM_I915_FENCE_TYPE_RW,
365 BATCH_SZ);
366 if (intel->bufmgr != NULL)
367 intel->ttm = GL_TRUE;
368 }
369 /* Otherwise, use the classic buffer manager. */
370 if (intel->bufmgr == NULL) {
371 if (ttm_disable) {
372 fprintf(stderr, "TTM buffer manager disabled. Using classic.\n");
373 } else {
374 fprintf(stderr, "Failed to initialize TTM buffer manager. "
375 "Falling back to classic.\n");
376 }
377
378 if (intelScreen->tex.size == 0) {
379 fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n",
380 __func__, __LINE__);
381 return GL_FALSE;
382 }
383
384 intel->bufmgr = dri_bufmgr_fake_init(intelScreen->tex.offset,
385 intelScreen->tex.map,
386 intelScreen->tex.size,
387 intel_fence_emit,
388 intel_fence_wait,
389 intel);
390 }
391
392 return GL_TRUE;
393 }
394
395
396 void intelInitDriverFunctions( struct dd_function_table *functions )
397 {
398 _mesa_init_driver_functions( functions );
399
400 functions->Flush = intelFlush;
401 functions->Finish = intelFinish;
402 functions->GetString = intelGetString;
403 functions->UpdateState = intelInvalidateState;
404 functions->BeginQuery = intelBeginQuery;
405 functions->EndQuery = intelEndQuery;
406
407 /* CopyPixels can be accelerated even with the current memory
408 * manager:
409 */
410 if (!getenv("INTEL_NO_BLIT")) {
411 functions->CopyPixels = intelCopyPixels;
412 functions->Bitmap = intelBitmap;
413 }
414
415 intelInitTextureFuncs( functions );
416 intelInitStateFuncs( functions );
417 intelInitBufferFuncs( functions );
418 }
419
420 GLboolean intelInitContext( struct intel_context *intel,
421 const __GLcontextModes *mesaVis,
422 __DRIcontextPrivate *driContextPriv,
423 void *sharedContextPrivate,
424 struct dd_function_table *functions )
425 {
426 GLcontext *ctx = &intel->ctx;
427 GLcontext *shareCtx = (GLcontext *) sharedContextPrivate;
428 __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
429 intelScreenPrivate *intelScreen = (intelScreenPrivate *)sPriv->private;
430 volatile drmI830Sarea *saPriv = (drmI830Sarea *)
431 (((GLubyte *)sPriv->pSAREA)+intelScreen->sarea_priv_offset);
432
433 if (!_mesa_initialize_context(&intel->ctx,
434 mesaVis, shareCtx,
435 functions,
436 (void*) intel)) {
437 _mesa_printf("%s: failed to init mesa context\n", __FUNCTION__);
438 return GL_FALSE;
439 }
440
441 driContextPriv->driverPrivate = intel;
442 intel->intelScreen = intelScreen;
443 intel->driScreen = sPriv;
444 intel->sarea = saPriv;
445
446 /* Dri stuff */
447 intel->hHWContext = driContextPriv->hHWContext;
448 intel->driFd = sPriv->fd;
449 intel->driHwLock = (drmLock *) &sPriv->pSAREA->lock;
450
451 intel->maxBatchSize = BATCH_SZ;
452
453 if (!intel_init_bufmgr(intel))
454 return GL_FALSE;
455
456 driParseConfigFiles (&intel->optionCache, &intelScreen->optionCache,
457 intel->driScreen->myNum, "i965");
458
459 ctx->Const.MaxTextureMaxAnisotropy = 2.0;
460
461 if (getenv("INTEL_STRICT_CONFORMANCE")) {
462 intel->strict_conformance = 1;
463 }
464
465 if (intel->strict_conformance) {
466 ctx->Const.MinLineWidth = 1.0;
467 ctx->Const.MinLineWidthAA = 1.0;
468 ctx->Const.MaxLineWidth = 1.0;
469 ctx->Const.MaxLineWidthAA = 1.0;
470 ctx->Const.LineWidthGranularity = 1.0;
471 }
472 else {
473 ctx->Const.MinLineWidth = 1.0;
474 ctx->Const.MinLineWidthAA = 1.0;
475 ctx->Const.MaxLineWidth = 5.0;
476 ctx->Const.MaxLineWidthAA = 5.0;
477 ctx->Const.LineWidthGranularity = 0.5;
478 }
479
480 ctx->Const.MinPointSize = 1.0;
481 ctx->Const.MinPointSizeAA = 1.0;
482 ctx->Const.MaxPointSize = 255.0;
483 ctx->Const.MaxPointSizeAA = 3.0;
484 ctx->Const.PointSizeGranularity = 1.0;
485
486 /* reinitialize the context point state.
487 * It depend on constants in __GLcontextRec::Const
488 */
489 _mesa_init_point(ctx);
490
491 /* Initialize the software rasterizer and helper modules. */
492 _swrast_CreateContext( ctx );
493 _vbo_CreateContext( ctx );
494 _tnl_CreateContext( ctx );
495 _swsetup_CreateContext( ctx );
496
497 TNL_CONTEXT(ctx)->Driver.RunPipeline = _tnl_run_pipeline;
498
499 /* Configure swrast to match hardware characteristics: */
500 _swrast_allow_pixel_fog( ctx, GL_FALSE );
501 _swrast_allow_vertex_fog( ctx, GL_TRUE );
502
503 intel->hw_stencil = mesaVis->stencilBits && mesaVis->depthBits == 24;
504 intel->hw_stipple = 1;
505
506 switch(mesaVis->depthBits) {
507 case 0: /* what to do in this case? */
508 case 16:
509 intel->depth_scale = 1.0/0xffff;
510 intel->polygon_offset_scale = 1.0/0xffff;
511 intel->depth_clear_mask = ~0;
512 intel->ClearDepth = 0xffff;
513 break;
514 case 24:
515 intel->depth_scale = 1.0/0xffffff;
516 intel->polygon_offset_scale = 2.0/0xffffff; /* req'd to pass glean */
517 intel->depth_clear_mask = 0x00ffffff;
518 intel->stencil_clear_mask = 0xff000000;
519 intel->ClearDepth = 0x00ffffff;
520 break;
521 default:
522 assert(0);
523 break;
524 }
525
526 /* Initialize swrast, tnl driver tables: */
527 intelInitSpanFuncs( ctx );
528
529 if (!intel->intelScreen->irq_active) {
530 _mesa_printf("IRQs not active. Exiting\n");
531 exit(1);
532 }
533 intelInitExtensions(ctx, GL_TRUE);
534
535 INTEL_DEBUG = driParseDebugString( getenv( "INTEL_DEBUG" ),
536 debug_control );
537 if (INTEL_DEBUG & DEBUG_BUFMGR)
538 dri_bufmgr_set_debug(intel->bufmgr, GL_TRUE);
539
540 intel_recreate_static_regions(intel);
541
542 intel_bufferobj_init( intel );
543 intel->batch = intel_batchbuffer_alloc( intel );
544 intel->last_swap_fence = NULL;
545 intel->first_swap_fence = NULL;
546
547 if (intel->ctx.Mesa_DXTn) {
548 _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
549 _mesa_enable_extension( ctx, "GL_S3_s3tc" );
550 }
551 else if (driQueryOptionb (&intel->optionCache, "force_s3tc_enable")) {
552 _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
553 }
554
555 /* driInitTextureObjects( ctx, & intel->swapped, */
556 /* DRI_TEXMGR_DO_TEXTURE_1D | */
557 /* DRI_TEXMGR_DO_TEXTURE_2D | */
558 /* DRI_TEXMGR_DO_TEXTURE_RECT ); */
559
560 /* Force all software fallbacks */
561 if (getenv("INTEL_NO_RAST")) {
562 fprintf(stderr, "disabling 3D rasterization\n");
563 intel->no_rast = 1;
564 }
565
566 /* Disable all hardware rendering (skip emitting batches and fences/waits
567 * to the kernel)
568 */
569 intel->no_hw = getenv("INTEL_NO_HW") != NULL;
570
571 return GL_TRUE;
572 }
573
574 void intelDestroyContext(__DRIcontextPrivate *driContextPriv)
575 {
576 struct intel_context *intel = (struct intel_context *) driContextPriv->driverPrivate;
577
578 assert(intel); /* should never be null */
579 if (intel) {
580 GLboolean release_texture_heaps;
581
582
583 intel->vtbl.destroy( intel );
584
585 release_texture_heaps = (intel->ctx.Shared->RefCount == 1);
586 _swsetup_DestroyContext (&intel->ctx);
587 _tnl_DestroyContext (&intel->ctx);
588 _vbo_DestroyContext (&intel->ctx);
589
590 _swrast_DestroyContext (&intel->ctx);
591 intel->Fallback = 0; /* don't call _swrast_Flush later */
592 intel_batchbuffer_free(intel->batch);
593 intel->batch = NULL;
594
595 if (intel->last_swap_fence) {
596 dri_fence_wait(intel->last_swap_fence);
597 dri_fence_unreference(intel->last_swap_fence);
598 intel->last_swap_fence = NULL;
599 }
600 if (intel->first_swap_fence) {
601 dri_fence_wait(intel->first_swap_fence);
602 dri_fence_unreference(intel->first_swap_fence);
603 intel->first_swap_fence = NULL;
604 }
605
606 if ( release_texture_heaps ) {
607 /* This share group is about to go away, free our private
608 * texture object data.
609 */
610
611 /* XXX: destroy the shared bufmgr struct here?
612 */
613 }
614
615 /* Free the regions created to describe front/back/depth
616 * buffers:
617 */
618 #if 0
619 intel_region_release(&intel->front_region);
620 intel_region_release(&intel->back_region);
621 intel_region_release(&intel->depth_region);
622 intel_region_release(&intel->draw_region);
623 #endif
624
625 /* free the Mesa context */
626 intel->ctx.VertexProgram.Current = NULL;
627 intel->ctx.FragmentProgram.Current = NULL;
628 _mesa_destroy_context(&intel->ctx);
629 }
630
631 driContextPriv->driverPrivate = NULL;
632 }
633
634 GLboolean intelUnbindContext(__DRIcontextPrivate *driContextPriv)
635 {
636 return GL_TRUE;
637 }
638
639 GLboolean intelMakeCurrent(__DRIcontextPrivate *driContextPriv,
640 __DRIdrawablePrivate *driDrawPriv,
641 __DRIdrawablePrivate *driReadPriv)
642 {
643
644 if (driContextPriv) {
645 struct intel_context *intel = (struct intel_context *) driContextPriv->driverPrivate;
646
647 if (intel->driReadDrawable != driReadPriv) {
648 intel->driReadDrawable = driReadPriv;
649 }
650
651 if ( intel->driDrawable != driDrawPriv ) {
652 if (driDrawPriv->swap_interval == (unsigned)-1) {
653 driDrawPriv->vblFlags = (intel->intelScreen->irq_active != 0)
654 ? driGetDefaultVBlankFlags(&intel->optionCache)
655 : VBLANK_FLAG_NO_IRQ;
656 driDrawableInitVBlank( driDrawPriv );
657 }
658
659 intel->driDrawable = driDrawPriv;
660 intelWindowMoved( intel );
661 /* Shouldn't the readbuffer be stored also? */
662 }
663
664 _mesa_make_current(&intel->ctx,
665 (GLframebuffer *) driDrawPriv->driverPrivate,
666 (GLframebuffer *) driReadPriv->driverPrivate);
667
668 intel->ctx.Driver.DrawBuffer( &intel->ctx, intel->ctx.Color.DrawBuffer[0] );
669 } else {
670 _mesa_make_current(NULL, NULL, NULL);
671 }
672
673 return GL_TRUE;
674 }
675
676
677 static void intelContendedLock( struct intel_context *intel, GLuint flags )
678 {
679 __DRIdrawablePrivate *dPriv = intel->driDrawable;
680 __DRIscreenPrivate *sPriv = intel->driScreen;
681 volatile drmI830Sarea * sarea = intel->sarea;
682 int me = intel->hHWContext;
683
684 drmGetLock(intel->driFd, intel->hHWContext, flags);
685
686 /* If the window moved, may need to set a new cliprect now.
687 *
688 * NOTE: This releases and regains the hw lock, so all state
689 * checking must be done *after* this call:
690 */
691 if (dPriv)
692 DRI_VALIDATE_DRAWABLE_INFO(sPriv, dPriv);
693
694
695 intel->locked = 1;
696 intel->need_flush = 1;
697
698 /* Lost context?
699 */
700 if (sarea->ctxOwner != me) {
701 if (INTEL_DEBUG & DEBUG_BUFMGR) {
702 fprintf(stderr, "Lost Context: sarea->ctxOwner %x me %x\n",
703 sarea->ctxOwner, me);
704 }
705 sarea->ctxOwner = me;
706 intel->vtbl.lost_hardware( intel );
707 }
708
709 /* If the last consumer of the texture memory wasn't us, notify the fake
710 * bufmgr and record the new owner. We should have the memory shared
711 * between contexts of a single fake bufmgr, but this will at least make
712 * things correct for now.
713 */
714 if (!intel->ttm && sarea->texAge != intel->hHWContext) {
715 sarea->texAge = intel->hHWContext;
716 dri_bufmgr_fake_contended_lock_take(intel->bufmgr);
717 if (INTEL_DEBUG & DEBUG_BATCH)
718 intel_decode_context_reset();
719 if (INTEL_DEBUG & DEBUG_BUFMGR) {
720 fprintf(stderr, "Lost Textures: sarea->texAge %x hw context %x\n",
721 sarea->ctxOwner, intel->hHWContext);
722 }
723 }
724
725 /* Drawable changed?
726 */
727 if (dPriv && intel->lastStamp != dPriv->lastStamp) {
728 intelWindowMoved( intel );
729 intel->lastStamp = dPriv->lastStamp;
730 }
731 }
732
733 _glthread_DECLARE_STATIC_MUTEX(lockMutex);
734
735 /* Lock the hardware and validate our state.
736 */
737 void LOCK_HARDWARE( struct intel_context *intel )
738 {
739 char __ret=0;
740
741 _glthread_LOCK_MUTEX(lockMutex);
742 assert(!intel->locked);
743
744
745 DRM_CAS(intel->driHwLock, intel->hHWContext,
746 (DRM_LOCK_HELD|intel->hHWContext), __ret);
747 if (__ret)
748 intelContendedLock( intel, 0 );
749
750 intel->locked = 1;
751
752 }
753
754
755 /* Unlock the hardware using the global current context
756 */
757 void UNLOCK_HARDWARE( struct intel_context *intel )
758 {
759 intel->vtbl.note_unlock( intel );
760 intel->locked = 0;
761
762 DRM_UNLOCK(intel->driFd, intel->driHwLock, intel->hHWContext);
763 _glthread_UNLOCK_MUTEX(lockMutex);
764 }
765
766