src/mesa/drivers/dri/i965/intel_context.h

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 #ifndef INTELCONTEXT_INC
  29 #define INTELCONTEXT_INC
  30
  31
  32 #include <stdbool.h>
  33 #include <string.h>
  34 #include "main/mtypes.h"
  35 #include "main/mm.h"
  36
  37 #ifdef __cplusplus
  38 extern "C" {
  39         /* Evil hack for using libdrm in a c++ compiler. */
  40         #define virtual virt
  41 #endif
  42
  43 #include "drm.h"
  44 #include "intel_bufmgr.h"
  45
  46 #include "intel_screen.h"
  47 #include "intel_tex_obj.h"
  48 #include "i915_drm.h"
  49
  50 #ifdef __cplusplus
  51         #undef virtual
  52 #endif
  53
  54 #include "tnl/t_vertex.h"
  55
  56 struct intel_region;
  57 struct intel_context;
  58
  59 #define INTEL_WRITE_PART  0x1
  60 #define INTEL_WRITE_FULL  0x2
  61 #define INTEL_READ        0x4
  62
  63 #ifndef likely
  64 #ifdef __GNUC__
  65 #define likely(expr) (__builtin_expect(expr, 1))
  66 #define unlikely(expr) (__builtin_expect(expr, 0))
  67 #else
  68 #define likely(expr) (expr)
  69 #define unlikely(expr) (expr)
  70 #endif
  71 #endif
  72
  73 struct intel_sync_object {
  74    struct gl_sync_object Base;
  75
  76    /** Batch associated with this sync object */
  77    drm_intel_bo *bo;
  78 };
  79
  80 struct brw_context;
  81
  82 struct intel_batchbuffer {
  83    /** Current batchbuffer being queued up. */
  84    drm_intel_bo *bo;
  85    /** Last BO submitted to the hardware.  Used for glFinish(). */
  86    drm_intel_bo *last_bo;
  87    /** BO for post-sync nonzero writes for gen6 workaround. */
  88    drm_intel_bo *workaround_bo;
  89    bool need_workaround_flush;
  90
  91    struct cached_batch_item *cached_items;
  92
  93    uint16_t emit, total;
  94    uint16_t used, reserved_space;
  95    uint32_t *map;
  96    uint32_t *cpu_map;
  97 #define BATCH_SZ (8192*sizeof(uint32_t))
  98
  99    uint32_t state_batch_offset;
 100    bool is_blit;
 101    bool needs_sol_reset;
 102
 103    struct {
 104       uint16_t used;
 105       int reloc_count;
 106    } saved;
 107 };
 108
 109 /**
 110  * intel_context is derived from Mesa's context class: struct gl_context.
 111  */
 112 struct intel_context
 113 {
 114    struct gl_context ctx;  /**< base class, must be first field */
 115
 116    struct
 117    {
 118       void (*destroy) (struct brw_context * brw);
 119       void (*finish_batch) (struct brw_context * brw);
 120       void (*new_batch) (struct brw_context * brw);
 121
 122       void (*update_texture_surface)(struct gl_context *ctx,
 123                                      unsigned unit,
 124                                      uint32_t *binding_table,
 125                                      unsigned surf_index);
 126       void (*update_renderbuffer_surface)(struct brw_context *brw,
 127                                           struct gl_renderbuffer *rb,
 128                                           bool layered,
 129                                           unsigned unit);
 130       void (*update_null_renderbuffer_surface)(struct brw_context *brw,
 131                                                unsigned unit);
 132       void (*create_constant_surface)(struct brw_context *brw,
 133                                       drm_intel_bo *bo,
 134                                       uint32_t offset,
 135                                       uint32_t size,
 136                                       uint32_t *out_offset,
 137                                       bool dword_pitch);
 138
 139       /**
 140        * Send the appropriate state packets to configure depth, stencil, and
 141        * HiZ buffers (i965+ only)
 142        */
 143       void (*emit_depth_stencil_hiz)(struct brw_context *brw,
 144                                      struct intel_mipmap_tree *depth_mt,
 145                                      uint32_t depth_offset,
 146                                      uint32_t depthbuffer_format,
 147                                      uint32_t depth_surface_type,
 148                                      struct intel_mipmap_tree *stencil_mt,
 149                                      bool hiz, bool separate_stencil,
 150                                      uint32_t width, uint32_t height,
 151                                      uint32_t tile_x, uint32_t tile_y);
 152
 153    } vtbl;
 154
 155    GLuint NewGLState;
 156
 157    dri_bufmgr *bufmgr;
 158
 159    /**
 160     * Generation number of the hardware: 2 is 8xx, 3 is 9xx pre-965, 4 is 965.
 161     */
 162    int gen;
 163    int gt;
 164    bool is_haswell;
 165    bool is_baytrail;
 166    bool is_g4x;
 167    bool has_separate_stencil;
 168    bool must_use_separate_stencil;
 169    bool has_hiz;
 170    bool has_llc;
 171    bool has_swizzling;
 172
 173    drm_intel_context *hw_ctx;
 174
 175    struct intel_batchbuffer batch;
 176
 177    drm_intel_bo *first_post_swapbuffers_batch;
 178    bool need_throttle;
 179    bool no_batch_wrap;
 180
 181    /**
 182     * Set if we're either a debug context or the INTEL_DEBUG=perf environment
 183     * variable is set, this is the flag indicating to do expensive work that
 184     * might lead to a perf_debug() call.
 185     */
 186    bool perf_debug;
 187
 188    struct {
 189       drm_intel_bo *bo;
 190       GLuint offset;
 191       uint32_t buffer_len;
 192       uint32_t buffer_offset;
 193       char buffer[4096];
 194    } upload;
 195
 196    uint32_t max_gtt_map_object_size;
 197
 198    GLuint stats_wm;
 199
 200    bool no_rast;
 201    bool always_flush_batch;
 202    bool always_flush_cache;
 203    bool disable_throttling;
 204
 205    GLenum reduced_primitive;
 206
 207    /**
 208     * Set if rendering has occured to the drawable's front buffer.
 209     *
 210     * This is used in the DRI2 case to detect that glFlush should also copy
 211     * the contents of the fake front buffer to the real front buffer.
 212     */
 213    bool front_buffer_dirty;
 214
 215    /**
 216     * Track whether front-buffer rendering is currently enabled
 217     *
 218     * A separate flag is used to track this in order to support MRT more
 219     * easily.
 220     */
 221    bool is_front_buffer_rendering;
 222    /**
 223     * Track whether front-buffer is the current read target.
 224     *
 225     * This is closely associated with is_front_buffer_rendering, but may
 226     * be set separately.  The DRI2 fake front buffer must be referenced
 227     * either way.
 228     */
 229    bool is_front_buffer_reading;
 230
 231    int driFd;
 232
 233    __DRIcontext *driContext;
 234    struct intel_screen *intelScreen;
 235
 236    /**
 237     * Configuration cache
 238     */
 239    driOptionCache optionCache;
 240 };
 241
 242 /**
 243  * Align a value down to an alignment value
 244  *
 245  * If \c value is not already aligned to the requested alignment value, it
 246  * will be rounded down.
 247  *
 248  * \param value  Value to be rounded
 249  * \param alignment  Alignment value to be used.  This must be a power of two.
 250  *
 251  * \sa ALIGN()
 252  */
 253 #define ROUND_DOWN_TO(value, alignment) ((value) & ~(alignment - 1))
 254
 255 static INLINE uint32_t
 256 U_FIXED(float value, uint32_t frac_bits)
 257 {
 258    value *= (1 << frac_bits);
 259    return value < 0 ? 0 : value;
 260 }
 261
 262 static INLINE uint32_t
 263 S_FIXED(float value, uint32_t frac_bits)
 264 {
 265    return value * (1 << frac_bits);
 266 }
 267
 268 /* ================================================================
 269  * From linux kernel i386 header files, copes with odd sizes better
 270  * than COPY_DWORDS would:
 271  * XXX Put this in src/mesa/main/imports.h ???
 272  */
 273 #if defined(i386) || defined(__i386__)
 274 static INLINE void * __memcpy(void * to, const void * from, size_t n)
 275 {
 276    int d0, d1, d2;
 277    __asm__ __volatile__(
 278       "rep ; movsl\n\t"
 279       "testb $2,%b4\n\t"
 280       "je 1f\n\t"
 281       "movsw\n"
 282       "1:\ttestb $1,%b4\n\t"
 283       "je 2f\n\t"
 284       "movsb\n"
 285       "2:"
 286       : "=&c" (d0), "=&D" (d1), "=&S" (d2)
 287       :"0" (n/4), "q" (n),"1" ((long) to),"2" ((long) from)
 288       : "memory");
 289    return (to);
 290 }
 291 #else
 292 #define __memcpy(a,b,c) memcpy(a,b,c)
 293 #endif
 294
 295
 296 /* ================================================================
 297  * Debugging:
 298  */
 299 extern int INTEL_DEBUG;
 300
 301 #define DEBUG_TEXTURE   0x1
 302 #define DEBUG_STATE     0x2
 303 #define DEBUG_IOCTL     0x4
 304 #define DEBUG_BLIT      0x8
 305 #define DEBUG_MIPTREE   0x10
 306 #define DEBUG_PERF      0x20
 307 #define DEBUG_BATCH     0x80
 308 #define DEBUG_PIXEL     0x100
 309 #define DEBUG_BUFMGR    0x200
 310 #define DEBUG_REGION    0x400
 311 #define DEBUG_FBO       0x800
 312 #define DEBUG_GS        0x1000
 313 #define DEBUG_SYNC      0x2000
 314 #define DEBUG_PRIMS     0x4000
 315 #define DEBUG_VERTS     0x8000
 316 #define DEBUG_DRI       0x10000
 317 #define DEBUG_SF        0x20000
 318 #define DEBUG_STATS     0x100000
 319 #define DEBUG_WM        0x400000
 320 #define DEBUG_URB       0x800000
 321 #define DEBUG_VS        0x1000000
 322 #define DEBUG_CLIP      0x2000000
 323 #define DEBUG_AUB       0x4000000
 324 #define DEBUG_SHADER_TIME 0x8000000
 325 #define DEBUG_BLORP     0x10000000
 326 #define DEBUG_NO16      0x20000000
 327
 328 #ifdef HAVE_ANDROID_PLATFORM
 329 #define LOG_TAG "INTEL-MESA"
 330 #include <cutils/log.h>
 331 #ifndef ALOGW
 332 #define ALOGW LOGW
 333 #endif
 334 #define dbg_printf(...) ALOGW(__VA_ARGS__)
 335 #else
 336 #define dbg_printf(...) printf(__VA_ARGS__)
 337 #endif /* HAVE_ANDROID_PLATFORM */
 338
 339 #define DBG(...) do {                                           \
 340         if (unlikely(INTEL_DEBUG & FILE_DEBUG_FLAG))            \
 341                 dbg_printf(__VA_ARGS__);                        \
 342 } while(0)
 343
 344 #define perf_debug(...) do {                                    \
 345    static GLuint msg_id = 0;                                    \
 346    if (unlikely(INTEL_DEBUG & DEBUG_PERF))                      \
 347       dbg_printf(__VA_ARGS__);                                  \
 348    if (intel->perf_debug)                                       \
 349       _mesa_gl_debug(&intel->ctx, &msg_id,                      \
 350                      MESA_DEBUG_TYPE_PERFORMANCE,               \
 351                      MESA_DEBUG_SEVERITY_MEDIUM,                \
 352                      __VA_ARGS__);                              \
 353 } while(0)
 354
 355 #define WARN_ONCE(cond, fmt...) do {                            \
 356    if (unlikely(cond)) {                                        \
 357       static bool _warned = false;                              \
 358       static GLuint msg_id = 0;                                 \
 359       if (!_warned) {                                           \
 360          fprintf(stderr, "WARNING: ");                          \
 361          fprintf(stderr, fmt);                                  \
 362          _warned = true;                                        \
 363                                                                 \
 364          _mesa_gl_debug(ctx, &msg_id,                           \
 365                         MESA_DEBUG_TYPE_OTHER,                  \
 366                         MESA_DEBUG_SEVERITY_HIGH, fmt);         \
 367       }                                                         \
 368    }                                                            \
 369 } while (0)
 370
 371 /* ================================================================
 372  * intel_context.c:
 373  */
 374
 375 extern bool intelInitContext(struct brw_context *brw,
 376                              int api,
 377                              unsigned major_version,
 378                              unsigned minor_version,
 379                              const struct gl_config * mesaVis,
 380                              __DRIcontext * driContextPriv,
 381                              void *sharedContextPrivate,
 382                              struct dd_function_table *functions,
 383                              unsigned *dri_ctx_error);
 384
 385 extern void intelFinish(struct gl_context * ctx);
 386 extern void _intel_flush(struct gl_context * ctx, const char *file, int line);
 387
 388 #define intel_flush(ctx) _intel_flush(ctx, __FILE__, __LINE__)
 389
 390 extern void intelInitDriverFunctions(struct dd_function_table *functions);
 391
 392 void intel_init_syncobj_functions(struct dd_function_table *functions);
 393
 394 enum {
 395    DRI_CONF_BO_REUSE_DISABLED,
 396    DRI_CONF_BO_REUSE_ALL
 397 };
 398
 399 extern int intel_translate_shadow_compare_func(GLenum func);
 400 extern int intel_translate_compare_func(GLenum func);
 401 extern int intel_translate_stencil_op(GLenum op);
 402 extern int intel_translate_logic_op(GLenum opcode);
 403
 404 void intel_update_renderbuffers(__DRIcontext *context,
 405                                 __DRIdrawable *drawable);
 406 void intel_prepare_render(struct brw_context *brw);
 407
 408 void
 409 intel_resolve_for_dri2_flush(struct brw_context *brw,
 410                              __DRIdrawable *drawable);
 411
 412 extern void
 413 intelInitExtensions(struct gl_context *ctx);
 414 extern void
 415 intelInitClearFuncs(struct dd_function_table *functions);
 416
 417 /*======================================================================
 418  * Inline conversion functions.
 419  * These are better-typed than the macros used previously:
 420  */
 421 static INLINE struct intel_context *
 422 intel_context(struct gl_context * ctx)
 423 {
 424    return (struct intel_context *) ctx;
 425 }
 426
 427 static INLINE bool
 428 is_power_of_two(uint32_t value)
 429 {
 430    return (value & (value - 1)) == 0;
 431 }
 432
 433 #ifdef __cplusplus
 434 }
 435 #endif
 436
 437 #endif