src/mesa/drivers/dri/i965/intel_context.h

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 #ifndef INTELCONTEXT_INC
  29 #define INTELCONTEXT_INC
  30
  31
  32 #include <stdbool.h>
  33 #include <string.h>
  34 #include "main/mtypes.h"
  35 #include "main/mm.h"
  36
  37 #ifdef __cplusplus
  38 extern "C" {
  39         /* Evil hack for using libdrm in a c++ compiler. */
  40         #define virtual virt
  41 #endif
  42
  43 #include "drm.h"
  44 #include "intel_bufmgr.h"
  45
  46 #include "intel_screen.h"
  47 #include "intel_tex_obj.h"
  48 #include "i915_drm.h"
  49
  50 #ifdef __cplusplus
  51         #undef virtual
  52 #endif
  53
  54 #include "tnl/t_vertex.h"
  55
  56 #define TAG(x) intel##x
  57 #include "tnl_dd/t_dd_vertex.h"
  58 #undef TAG
  59
  60 struct intel_region;
  61 struct intel_context;
  62
  63 typedef void (*intel_tri_func) (struct intel_context *, intelVertex *,
  64                                 intelVertex *, intelVertex *);
  65 typedef void (*intel_line_func) (struct intel_context *, intelVertex *,
  66                                  intelVertex *);
  67 typedef void (*intel_point_func) (struct intel_context *, intelVertex *);
  68
  69 #define INTEL_WRITE_PART  0x1
  70 #define INTEL_WRITE_FULL  0x2
  71 #define INTEL_READ        0x4
  72
  73 #define INTEL_MAX_FIXUP 64
  74
  75 #ifndef likely
  76 #ifdef __GNUC__
  77 #define likely(expr) (__builtin_expect(expr, 1))
  78 #define unlikely(expr) (__builtin_expect(expr, 0))
  79 #else
  80 #define likely(expr) (expr)
  81 #define unlikely(expr) (expr)
  82 #endif
  83 #endif
  84
  85 struct intel_sync_object {
  86    struct gl_sync_object Base;
  87
  88    /** Batch associated with this sync object */
  89    drm_intel_bo *bo;
  90 };
  91
  92 struct brw_context;
  93
  94 struct intel_batchbuffer {
  95    /** Current batchbuffer being queued up. */
  96    drm_intel_bo *bo;
  97    /** Last BO submitted to the hardware.  Used for glFinish(). */
  98    drm_intel_bo *last_bo;
  99    /** BO for post-sync nonzero writes for gen6 workaround. */
 100    drm_intel_bo *workaround_bo;
 101    bool need_workaround_flush;
 102
 103    struct cached_batch_item *cached_items;
 104
 105    uint16_t emit, total;
 106    uint16_t used, reserved_space;
 107    uint32_t *map;
 108    uint32_t *cpu_map;
 109 #define BATCH_SZ (8192*sizeof(uint32_t))
 110
 111    uint32_t state_batch_offset;
 112    bool is_blit;
 113    bool needs_sol_reset;
 114
 115    struct {
 116       uint16_t used;
 117       int reloc_count;
 118    } saved;
 119 };
 120
 121 /**
 122  * intel_context is derived from Mesa's context class: struct gl_context.
 123  */
 124 struct intel_context
 125 {
 126    struct gl_context ctx;  /**< base class, must be first field */
 127
 128    struct
 129    {
 130       void (*destroy) (struct intel_context * intel);
 131       void (*finish_batch) (struct intel_context * intel);
 132       void (*new_batch) (struct intel_context * intel);
 133
 134       void (*invalidate_state) (struct intel_context *intel,
 135                                 GLuint new_state);
 136
 137       void (*debug_batch)(struct intel_context *intel);
 138       void (*annotate_aub)(struct intel_context *intel);
 139       bool (*render_target_supported)(struct intel_context *intel,
 140                                       struct gl_renderbuffer *rb);
 141
 142       /** Can HiZ be enabled on a depthbuffer of the given format? */
 143       bool (*is_hiz_depth_format)(struct intel_context *intel,
 144                                   gl_format format);
 145
 146       void (*update_texture_surface)(struct gl_context *ctx,
 147                                      unsigned unit,
 148                                      uint32_t *binding_table,
 149                                      unsigned surf_index);
 150       void (*update_renderbuffer_surface)(struct brw_context *brw,
 151                                           struct gl_renderbuffer *rb,
 152                                           bool layered,
 153                                           unsigned unit);
 154       void (*update_null_renderbuffer_surface)(struct brw_context *brw,
 155                                                unsigned unit);
 156       void (*create_constant_surface)(struct brw_context *brw,
 157                                       drm_intel_bo *bo,
 158                                       uint32_t offset,
 159                                       uint32_t size,
 160                                       uint32_t *out_offset,
 161                                       bool dword_pitch);
 162
 163       /**
 164        * Send the appropriate state packets to configure depth, stencil, and
 165        * HiZ buffers (i965+ only)
 166        */
 167       void (*emit_depth_stencil_hiz)(struct brw_context *brw,
 168                                      struct intel_mipmap_tree *depth_mt,
 169                                      uint32_t depth_offset,
 170                                      uint32_t depthbuffer_format,
 171                                      uint32_t depth_surface_type,
 172                                      struct intel_mipmap_tree *stencil_mt,
 173                                      bool hiz, bool separate_stencil,
 174                                      uint32_t width, uint32_t height,
 175                                      uint32_t tile_x, uint32_t tile_y);
 176
 177    } vtbl;
 178
 179    GLuint NewGLState;
 180
 181    dri_bufmgr *bufmgr;
 182    unsigned int maxBatchSize;
 183
 184    /**
 185     * Generation number of the hardware: 2 is 8xx, 3 is 9xx pre-965, 4 is 965.
 186     */
 187    int gen;
 188    int gt;
 189    bool needs_ff_sync;
 190    bool is_haswell;
 191    bool is_baytrail;
 192    bool is_g4x;
 193    bool is_945;
 194    bool has_separate_stencil;
 195    bool must_use_separate_stencil;
 196    bool has_hiz;
 197    bool has_llc;
 198    bool has_swizzling;
 199
 200    int urb_size;
 201
 202    drm_intel_context *hw_ctx;
 203
 204    struct intel_batchbuffer batch;
 205
 206    drm_intel_bo *first_post_swapbuffers_batch;
 207    bool need_throttle;
 208    bool no_batch_wrap;
 209
 210    /**
 211     * Set if we're either a debug context or the INTEL_DEBUG=perf environment
 212     * variable is set, this is the flag indicating to do expensive work that
 213     * might lead to a perf_debug() call.
 214     */
 215    bool perf_debug;
 216
 217    struct {
 218       drm_intel_bo *bo;
 219       GLuint offset;
 220       uint32_t buffer_len;
 221       uint32_t buffer_offset;
 222       char buffer[4096];
 223    } upload;
 224
 225    uint32_t max_gtt_map_object_size;
 226
 227    GLuint stats_wm;
 228
 229    bool hw_stencil;
 230    bool hw_stipple;
 231    bool no_rast;
 232    bool always_flush_batch;
 233    bool always_flush_cache;
 234    bool disable_throttling;
 235
 236    GLenum reduced_primitive;
 237
 238    /**
 239     * Set if rendering has occured to the drawable's front buffer.
 240     *
 241     * This is used in the DRI2 case to detect that glFlush should also copy
 242     * the contents of the fake front buffer to the real front buffer.
 243     */
 244    bool front_buffer_dirty;
 245
 246    /**
 247     * Track whether front-buffer rendering is currently enabled
 248     *
 249     * A separate flag is used to track this in order to support MRT more
 250     * easily.
 251     */
 252    bool is_front_buffer_rendering;
 253    /**
 254     * Track whether front-buffer is the current read target.
 255     *
 256     * This is closely associated with is_front_buffer_rendering, but may
 257     * be set separately.  The DRI2 fake front buffer must be referenced
 258     * either way.
 259     */
 260    bool is_front_buffer_reading;
 261
 262    bool use_early_z;
 263
 264    int driFd;
 265
 266    __DRIcontext *driContext;
 267    struct intel_screen *intelScreen;
 268    void (*saved_viewport)(struct gl_context * ctx,
 269                           GLint x, GLint y, GLsizei width, GLsizei height);
 270
 271    /**
 272     * Configuration cache
 273     */
 274    driOptionCache optionCache;
 275 };
 276
 277 #define SUBPIXEL_X 0.125
 278 #define SUBPIXEL_Y 0.125
 279
 280 /**
 281  * Align a value down to an alignment value
 282  *
 283  * If \c value is not already aligned to the requested alignment value, it
 284  * will be rounded down.
 285  *
 286  * \param value  Value to be rounded
 287  * \param alignment  Alignment value to be used.  This must be a power of two.
 288  *
 289  * \sa ALIGN()
 290  */
 291 #define ROUND_DOWN_TO(value, alignment) ((value) & ~(alignment - 1))
 292
 293 static INLINE uint32_t
 294 U_FIXED(float value, uint32_t frac_bits)
 295 {
 296    value *= (1 << frac_bits);
 297    return value < 0 ? 0 : value;
 298 }
 299
 300 static INLINE uint32_t
 301 S_FIXED(float value, uint32_t frac_bits)
 302 {
 303    return value * (1 << frac_bits);
 304 }
 305
 306 /* ================================================================
 307  * From linux kernel i386 header files, copes with odd sizes better
 308  * than COPY_DWORDS would:
 309  * XXX Put this in src/mesa/main/imports.h ???
 310  */
 311 #if defined(i386) || defined(__i386__)
 312 static INLINE void * __memcpy(void * to, const void * from, size_t n)
 313 {
 314    int d0, d1, d2;
 315    __asm__ __volatile__(
 316       "rep ; movsl\n\t"
 317       "testb $2,%b4\n\t"
 318       "je 1f\n\t"
 319       "movsw\n"
 320       "1:\ttestb $1,%b4\n\t"
 321       "je 2f\n\t"
 322       "movsb\n"
 323       "2:"
 324       : "=&c" (d0), "=&D" (d1), "=&S" (d2)
 325       :"0" (n/4), "q" (n),"1" ((long) to),"2" ((long) from)
 326       : "memory");
 327    return (to);
 328 }
 329 #else
 330 #define __memcpy(a,b,c) memcpy(a,b,c)
 331 #endif
 332
 333
 334 /* ================================================================
 335  * Debugging:
 336  */
 337 extern int INTEL_DEBUG;
 338
 339 #define DEBUG_TEXTURE   0x1
 340 #define DEBUG_STATE     0x2
 341 #define DEBUG_IOCTL     0x4
 342 #define DEBUG_BLIT      0x8
 343 #define DEBUG_MIPTREE   0x10
 344 #define DEBUG_PERF      0x20
 345 #define DEBUG_BATCH     0x80
 346 #define DEBUG_PIXEL     0x100
 347 #define DEBUG_BUFMGR    0x200
 348 #define DEBUG_REGION    0x400
 349 #define DEBUG_FBO       0x800
 350 #define DEBUG_GS        0x1000
 351 #define DEBUG_SYNC      0x2000
 352 #define DEBUG_PRIMS     0x4000
 353 #define DEBUG_VERTS     0x8000
 354 #define DEBUG_DRI       0x10000
 355 #define DEBUG_SF        0x20000
 356 #define DEBUG_STATS     0x100000
 357 #define DEBUG_WM        0x400000
 358 #define DEBUG_URB       0x800000
 359 #define DEBUG_VS        0x1000000
 360 #define DEBUG_CLIP      0x2000000
 361 #define DEBUG_AUB       0x4000000
 362 #define DEBUG_SHADER_TIME 0x8000000
 363 #define DEBUG_BLORP     0x10000000
 364 #define DEBUG_NO16      0x20000000
 365
 366 #ifdef HAVE_ANDROID_PLATFORM
 367 #define LOG_TAG "INTEL-MESA"
 368 #include <cutils/log.h>
 369 #ifndef ALOGW
 370 #define ALOGW LOGW
 371 #endif
 372 #define dbg_printf(...) ALOGW(__VA_ARGS__)
 373 #else
 374 #define dbg_printf(...) printf(__VA_ARGS__)
 375 #endif /* HAVE_ANDROID_PLATFORM */
 376
 377 #define DBG(...) do {                                           \
 378         if (unlikely(INTEL_DEBUG & FILE_DEBUG_FLAG))            \
 379                 dbg_printf(__VA_ARGS__);                        \
 380 } while(0)
 381
 382 #define perf_debug(...) do {                                    \
 383    static GLuint msg_id = 0;                                    \
 384    if (unlikely(INTEL_DEBUG & DEBUG_PERF))                      \
 385       dbg_printf(__VA_ARGS__);                                  \
 386    if (intel->perf_debug)                                       \
 387       _mesa_gl_debug(&intel->ctx, &msg_id,                      \
 388                      MESA_DEBUG_TYPE_PERFORMANCE,               \
 389                      MESA_DEBUG_SEVERITY_MEDIUM,                \
 390                      __VA_ARGS__);                              \
 391 } while(0)
 392
 393 #define WARN_ONCE(cond, fmt...) do {                            \
 394    if (unlikely(cond)) {                                        \
 395       static bool _warned = false;                              \
 396       static GLuint msg_id = 0;                                 \
 397       if (!_warned) {                                           \
 398          fprintf(stderr, "WARNING: ");                          \
 399          fprintf(stderr, fmt);                                  \
 400          _warned = true;                                        \
 401                                                                 \
 402          _mesa_gl_debug(ctx, &msg_id,                           \
 403                         MESA_DEBUG_TYPE_OTHER,                  \
 404                         MESA_DEBUG_SEVERITY_HIGH, fmt);         \
 405       }                                                         \
 406    }                                                            \
 407 } while (0)
 408
 409 #define PCI_CHIP_845_G                  0x2562
 410 #define PCI_CHIP_I830_M                 0x3577
 411 #define PCI_CHIP_I855_GM                0x3582
 412 #define PCI_CHIP_I865_G                 0x2572
 413 #define PCI_CHIP_I915_G                 0x2582
 414 #define PCI_CHIP_I915_GM                0x2592
 415 #define PCI_CHIP_I945_G                 0x2772
 416 #define PCI_CHIP_I945_GM                0x27A2
 417 #define PCI_CHIP_I945_GME               0x27AE
 418 #define PCI_CHIP_G33_G                  0x29C2
 419 #define PCI_CHIP_Q35_G                  0x29B2
 420 #define PCI_CHIP_Q33_G                  0x29D2
 421
 422
 423 /* ================================================================
 424  * intel_context.c:
 425  */
 426
 427 extern bool intelInitContext(struct intel_context *intel,
 428                              int api,
 429                              unsigned major_version,
 430                              unsigned minor_version,
 431                              const struct gl_config * mesaVis,
 432                              __DRIcontext * driContextPriv,
 433                              void *sharedContextPrivate,
 434                              struct dd_function_table *functions,
 435                              unsigned *dri_ctx_error);
 436
 437 extern void intelFinish(struct gl_context * ctx);
 438 extern void _intel_flush(struct gl_context * ctx, const char *file, int line);
 439
 440 #define intel_flush(ctx) _intel_flush(ctx, __FILE__, __LINE__)
 441
 442 extern void intelInitDriverFunctions(struct dd_function_table *functions);
 443
 444 void intel_init_syncobj_functions(struct dd_function_table *functions);
 445
 446
 447 /* ================================================================
 448  * intel_state.c:
 449  */
 450
 451 #define COMPAREFUNC_ALWAYS              0
 452 #define COMPAREFUNC_NEVER               0x1
 453 #define COMPAREFUNC_LESS                0x2
 454 #define COMPAREFUNC_EQUAL               0x3
 455 #define COMPAREFUNC_LEQUAL              0x4
 456 #define COMPAREFUNC_GREATER             0x5
 457 #define COMPAREFUNC_NOTEQUAL            0x6
 458 #define COMPAREFUNC_GEQUAL              0x7
 459
 460 #define STENCILOP_KEEP                  0
 461 #define STENCILOP_ZERO                  0x1
 462 #define STENCILOP_REPLACE               0x2
 463 #define STENCILOP_INCRSAT               0x3
 464 #define STENCILOP_DECRSAT               0x4
 465 #define STENCILOP_INCR                  0x5
 466 #define STENCILOP_DECR                  0x6
 467 #define STENCILOP_INVERT                0x7
 468
 469 #define LOGICOP_CLEAR                   0
 470 #define LOGICOP_NOR                     0x1
 471 #define LOGICOP_AND_INV                 0x2
 472 #define LOGICOP_COPY_INV                0x3
 473 #define LOGICOP_AND_RVRSE               0x4
 474 #define LOGICOP_INV                     0x5
 475 #define LOGICOP_XOR                     0x6
 476 #define LOGICOP_NAND                    0x7
 477 #define LOGICOP_AND                     0x8
 478 #define LOGICOP_EQUIV                   0x9
 479 #define LOGICOP_NOOP                    0xa
 480 #define LOGICOP_OR_INV                  0xb
 481 #define LOGICOP_COPY                    0xc
 482 #define LOGICOP_OR_RVRSE                0xd
 483 #define LOGICOP_OR                      0xe
 484 #define LOGICOP_SET                     0xf
 485
 486 #define BLENDFACT_ZERO                  0x01
 487 #define BLENDFACT_ONE                   0x02
 488 #define BLENDFACT_SRC_COLR              0x03
 489 #define BLENDFACT_INV_SRC_COLR          0x04
 490 #define BLENDFACT_SRC_ALPHA             0x05
 491 #define BLENDFACT_INV_SRC_ALPHA         0x06
 492 #define BLENDFACT_DST_ALPHA             0x07
 493 #define BLENDFACT_INV_DST_ALPHA         0x08
 494 #define BLENDFACT_DST_COLR              0x09
 495 #define BLENDFACT_INV_DST_COLR          0x0a
 496 #define BLENDFACT_SRC_ALPHA_SATURATE    0x0b
 497 #define BLENDFACT_CONST_COLOR           0x0c
 498 #define BLENDFACT_INV_CONST_COLOR       0x0d
 499 #define BLENDFACT_CONST_ALPHA           0x0e
 500 #define BLENDFACT_INV_CONST_ALPHA       0x0f
 501 #define BLENDFACT_MASK                  0x0f
 502
 503 enum {
 504    DRI_CONF_BO_REUSE_DISABLED,
 505    DRI_CONF_BO_REUSE_ALL
 506 };
 507
 508 extern int intel_translate_shadow_compare_func(GLenum func);
 509 extern int intel_translate_compare_func(GLenum func);
 510 extern int intel_translate_stencil_op(GLenum op);
 511 extern int intel_translate_logic_op(GLenum opcode);
 512
 513 void intel_update_renderbuffers(__DRIcontext *context,
 514                                 __DRIdrawable *drawable);
 515 void intel_prepare_render(struct intel_context *intel);
 516
 517 void
 518 intel_resolve_for_dri2_flush(struct intel_context *intel,
 519                              __DRIdrawable *drawable);
 520
 521 void i915_set_buf_info_for_region(uint32_t *state, struct intel_region *region,
 522                                   uint32_t buffer_id);
 523 void intel_init_texture_formats(struct gl_context *ctx);
 524
 525 /*======================================================================
 526  * Inline conversion functions.
 527  * These are better-typed than the macros used previously:
 528  */
 529 static INLINE struct intel_context *
 530 intel_context(struct gl_context * ctx)
 531 {
 532    return (struct intel_context *) ctx;
 533 }
 534
 535 static INLINE bool
 536 is_power_of_two(uint32_t value)
 537 {
 538    return (value & (value - 1)) == 0;
 539 }
 540
 541 #ifdef __cplusplus
 542 }
 543 #endif
 544
 545 #endif