src/mesa/drivers/dri/i965/intel_context.h

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 #ifndef INTELCONTEXT_INC
  29 #define INTELCONTEXT_INC
  30
  31
  32 #include <stdbool.h>
  33 #include <string.h>
  34 #include "main/mtypes.h"
  35 #include "main/mm.h"
  36
  37 #ifdef __cplusplus
  38 extern "C" {
  39         /* Evil hack for using libdrm in a c++ compiler. */
  40         #define virtual virt
  41 #endif
  42
  43 #include "drm.h"
  44 #include "intel_bufmgr.h"
  45
  46 #include "intel_screen.h"
  47 #include "intel_tex_obj.h"
  48 #include "i915_drm.h"
  49
  50 #ifdef __cplusplus
  51         #undef virtual
  52 #endif
  53
  54 #include "tnl/t_vertex.h"
  55
  56 #define TAG(x) intel##x
  57 #include "tnl_dd/t_dd_vertex.h"
  58 #undef TAG
  59
  60 struct intel_region;
  61 struct intel_context;
  62
  63 typedef void (*intel_tri_func) (struct intel_context *, intelVertex *,
  64                                 intelVertex *, intelVertex *);
  65 typedef void (*intel_line_func) (struct intel_context *, intelVertex *,
  66                                  intelVertex *);
  67 typedef void (*intel_point_func) (struct intel_context *, intelVertex *);
  68
  69 #define INTEL_WRITE_PART  0x1
  70 #define INTEL_WRITE_FULL  0x2
  71 #define INTEL_READ        0x4
  72
  73 #ifndef likely
  74 #ifdef __GNUC__
  75 #define likely(expr) (__builtin_expect(expr, 1))
  76 #define unlikely(expr) (__builtin_expect(expr, 0))
  77 #else
  78 #define likely(expr) (expr)
  79 #define unlikely(expr) (expr)
  80 #endif
  81 #endif
  82
  83 struct intel_sync_object {
  84    struct gl_sync_object Base;
  85
  86    /** Batch associated with this sync object */
  87    drm_intel_bo *bo;
  88 };
  89
  90 struct brw_context;
  91
  92 struct intel_batchbuffer {
  93    /** Current batchbuffer being queued up. */
  94    drm_intel_bo *bo;
  95    /** Last BO submitted to the hardware.  Used for glFinish(). */
  96    drm_intel_bo *last_bo;
  97    /** BO for post-sync nonzero writes for gen6 workaround. */
  98    drm_intel_bo *workaround_bo;
  99    bool need_workaround_flush;
 100
 101    struct cached_batch_item *cached_items;
 102
 103    uint16_t emit, total;
 104    uint16_t used, reserved_space;
 105    uint32_t *map;
 106    uint32_t *cpu_map;
 107 #define BATCH_SZ (8192*sizeof(uint32_t))
 108
 109    uint32_t state_batch_offset;
 110    bool is_blit;
 111    bool needs_sol_reset;
 112
 113    struct {
 114       uint16_t used;
 115       int reloc_count;
 116    } saved;
 117 };
 118
 119 /**
 120  * intel_context is derived from Mesa's context class: struct gl_context.
 121  */
 122 struct intel_context
 123 {
 124    struct gl_context ctx;  /**< base class, must be first field */
 125
 126    struct
 127    {
 128       void (*destroy) (struct intel_context * intel);
 129       void (*finish_batch) (struct intel_context * intel);
 130       void (*new_batch) (struct intel_context * intel);
 131
 132       void (*invalidate_state) (struct intel_context *intel,
 133                                 GLuint new_state);
 134
 135       void (*debug_batch)(struct intel_context *intel);
 136       void (*annotate_aub)(struct intel_context *intel);
 137       bool (*render_target_supported)(struct intel_context *intel,
 138                                       struct gl_renderbuffer *rb);
 139
 140       /** Can HiZ be enabled on a depthbuffer of the given format? */
 141       bool (*is_hiz_depth_format)(struct intel_context *intel,
 142                                   gl_format format);
 143
 144       void (*update_texture_surface)(struct gl_context *ctx,
 145                                      unsigned unit,
 146                                      uint32_t *binding_table,
 147                                      unsigned surf_index);
 148       void (*update_renderbuffer_surface)(struct brw_context *brw,
 149                                           struct gl_renderbuffer *rb,
 150                                           bool layered,
 151                                           unsigned unit);
 152       void (*update_null_renderbuffer_surface)(struct brw_context *brw,
 153                                                unsigned unit);
 154       void (*create_constant_surface)(struct brw_context *brw,
 155                                       drm_intel_bo *bo,
 156                                       uint32_t offset,
 157                                       uint32_t size,
 158                                       uint32_t *out_offset,
 159                                       bool dword_pitch);
 160
 161       /**
 162        * Send the appropriate state packets to configure depth, stencil, and
 163        * HiZ buffers (i965+ only)
 164        */
 165       void (*emit_depth_stencil_hiz)(struct brw_context *brw,
 166                                      struct intel_mipmap_tree *depth_mt,
 167                                      uint32_t depth_offset,
 168                                      uint32_t depthbuffer_format,
 169                                      uint32_t depth_surface_type,
 170                                      struct intel_mipmap_tree *stencil_mt,
 171                                      bool hiz, bool separate_stencil,
 172                                      uint32_t width, uint32_t height,
 173                                      uint32_t tile_x, uint32_t tile_y);
 174
 175    } vtbl;
 176
 177    GLuint NewGLState;
 178
 179    dri_bufmgr *bufmgr;
 180    unsigned int maxBatchSize;
 181
 182    /**
 183     * Generation number of the hardware: 2 is 8xx, 3 is 9xx pre-965, 4 is 965.
 184     */
 185    int gen;
 186    int gt;
 187    bool needs_ff_sync;
 188    bool is_haswell;
 189    bool is_baytrail;
 190    bool is_g4x;
 191    bool is_945;
 192    bool has_separate_stencil;
 193    bool must_use_separate_stencil;
 194    bool has_hiz;
 195    bool has_llc;
 196    bool has_swizzling;
 197
 198    int urb_size;
 199
 200    drm_intel_context *hw_ctx;
 201
 202    struct intel_batchbuffer batch;
 203
 204    drm_intel_bo *first_post_swapbuffers_batch;
 205    bool need_throttle;
 206    bool no_batch_wrap;
 207
 208    /**
 209     * Set if we're either a debug context or the INTEL_DEBUG=perf environment
 210     * variable is set, this is the flag indicating to do expensive work that
 211     * might lead to a perf_debug() call.
 212     */
 213    bool perf_debug;
 214
 215    struct {
 216       drm_intel_bo *bo;
 217       GLuint offset;
 218       uint32_t buffer_len;
 219       uint32_t buffer_offset;
 220       char buffer[4096];
 221    } upload;
 222
 223    uint32_t max_gtt_map_object_size;
 224
 225    GLuint stats_wm;
 226
 227    bool hw_stencil;
 228    bool hw_stipple;
 229    bool no_rast;
 230    bool always_flush_batch;
 231    bool always_flush_cache;
 232    bool disable_throttling;
 233
 234    GLenum reduced_primitive;
 235
 236    /**
 237     * Set if rendering has occured to the drawable's front buffer.
 238     *
 239     * This is used in the DRI2 case to detect that glFlush should also copy
 240     * the contents of the fake front buffer to the real front buffer.
 241     */
 242    bool front_buffer_dirty;
 243
 244    /**
 245     * Track whether front-buffer rendering is currently enabled
 246     *
 247     * A separate flag is used to track this in order to support MRT more
 248     * easily.
 249     */
 250    bool is_front_buffer_rendering;
 251    /**
 252     * Track whether front-buffer is the current read target.
 253     *
 254     * This is closely associated with is_front_buffer_rendering, but may
 255     * be set separately.  The DRI2 fake front buffer must be referenced
 256     * either way.
 257     */
 258    bool is_front_buffer_reading;
 259
 260    bool use_early_z;
 261
 262    int driFd;
 263
 264    __DRIcontext *driContext;
 265    struct intel_screen *intelScreen;
 266    void (*saved_viewport)(struct gl_context * ctx,
 267                           GLint x, GLint y, GLsizei width, GLsizei height);
 268
 269    /**
 270     * Configuration cache
 271     */
 272    driOptionCache optionCache;
 273 };
 274
 275 /**
 276  * Align a value down to an alignment value
 277  *
 278  * If \c value is not already aligned to the requested alignment value, it
 279  * will be rounded down.
 280  *
 281  * \param value  Value to be rounded
 282  * \param alignment  Alignment value to be used.  This must be a power of two.
 283  *
 284  * \sa ALIGN()
 285  */
 286 #define ROUND_DOWN_TO(value, alignment) ((value) & ~(alignment - 1))
 287
 288 static INLINE uint32_t
 289 U_FIXED(float value, uint32_t frac_bits)
 290 {
 291    value *= (1 << frac_bits);
 292    return value < 0 ? 0 : value;
 293 }
 294
 295 static INLINE uint32_t
 296 S_FIXED(float value, uint32_t frac_bits)
 297 {
 298    return value * (1 << frac_bits);
 299 }
 300
 301 /* ================================================================
 302  * From linux kernel i386 header files, copes with odd sizes better
 303  * than COPY_DWORDS would:
 304  * XXX Put this in src/mesa/main/imports.h ???
 305  */
 306 #if defined(i386) || defined(__i386__)
 307 static INLINE void * __memcpy(void * to, const void * from, size_t n)
 308 {
 309    int d0, d1, d2;
 310    __asm__ __volatile__(
 311       "rep ; movsl\n\t"
 312       "testb $2,%b4\n\t"
 313       "je 1f\n\t"
 314       "movsw\n"
 315       "1:\ttestb $1,%b4\n\t"
 316       "je 2f\n\t"
 317       "movsb\n"
 318       "2:"
 319       : "=&c" (d0), "=&D" (d1), "=&S" (d2)
 320       :"0" (n/4), "q" (n),"1" ((long) to),"2" ((long) from)
 321       : "memory");
 322    return (to);
 323 }
 324 #else
 325 #define __memcpy(a,b,c) memcpy(a,b,c)
 326 #endif
 327
 328
 329 /* ================================================================
 330  * Debugging:
 331  */
 332 extern int INTEL_DEBUG;
 333
 334 #define DEBUG_TEXTURE   0x1
 335 #define DEBUG_STATE     0x2
 336 #define DEBUG_IOCTL     0x4
 337 #define DEBUG_BLIT      0x8
 338 #define DEBUG_MIPTREE   0x10
 339 #define DEBUG_PERF      0x20
 340 #define DEBUG_BATCH     0x80
 341 #define DEBUG_PIXEL     0x100
 342 #define DEBUG_BUFMGR    0x200
 343 #define DEBUG_REGION    0x400
 344 #define DEBUG_FBO       0x800
 345 #define DEBUG_GS        0x1000
 346 #define DEBUG_SYNC      0x2000
 347 #define DEBUG_PRIMS     0x4000
 348 #define DEBUG_VERTS     0x8000
 349 #define DEBUG_DRI       0x10000
 350 #define DEBUG_SF        0x20000
 351 #define DEBUG_STATS     0x100000
 352 #define DEBUG_WM        0x400000
 353 #define DEBUG_URB       0x800000
 354 #define DEBUG_VS        0x1000000
 355 #define DEBUG_CLIP      0x2000000
 356 #define DEBUG_AUB       0x4000000
 357 #define DEBUG_SHADER_TIME 0x8000000
 358 #define DEBUG_BLORP     0x10000000
 359 #define DEBUG_NO16      0x20000000
 360
 361 #ifdef HAVE_ANDROID_PLATFORM
 362 #define LOG_TAG "INTEL-MESA"
 363 #include <cutils/log.h>
 364 #ifndef ALOGW
 365 #define ALOGW LOGW
 366 #endif
 367 #define dbg_printf(...) ALOGW(__VA_ARGS__)
 368 #else
 369 #define dbg_printf(...) printf(__VA_ARGS__)
 370 #endif /* HAVE_ANDROID_PLATFORM */
 371
 372 #define DBG(...) do {                                           \
 373         if (unlikely(INTEL_DEBUG & FILE_DEBUG_FLAG))            \
 374                 dbg_printf(__VA_ARGS__);                        \
 375 } while(0)
 376
 377 #define perf_debug(...) do {                                    \
 378    static GLuint msg_id = 0;                                    \
 379    if (unlikely(INTEL_DEBUG & DEBUG_PERF))                      \
 380       dbg_printf(__VA_ARGS__);                                  \
 381    if (intel->perf_debug)                                       \
 382       _mesa_gl_debug(&intel->ctx, &msg_id,                      \
 383                      MESA_DEBUG_TYPE_PERFORMANCE,               \
 384                      MESA_DEBUG_SEVERITY_MEDIUM,                \
 385                      __VA_ARGS__);                              \
 386 } while(0)
 387
 388 #define WARN_ONCE(cond, fmt...) do {                            \
 389    if (unlikely(cond)) {                                        \
 390       static bool _warned = false;                              \
 391       static GLuint msg_id = 0;                                 \
 392       if (!_warned) {                                           \
 393          fprintf(stderr, "WARNING: ");                          \
 394          fprintf(stderr, fmt);                                  \
 395          _warned = true;                                        \
 396                                                                 \
 397          _mesa_gl_debug(ctx, &msg_id,                           \
 398                         MESA_DEBUG_TYPE_OTHER,                  \
 399                         MESA_DEBUG_SEVERITY_HIGH, fmt);         \
 400       }                                                         \
 401    }                                                            \
 402 } while (0)
 403
 404 /* ================================================================
 405  * intel_context.c:
 406  */
 407
 408 extern bool intelInitContext(struct intel_context *intel,
 409                              int api,
 410                              unsigned major_version,
 411                              unsigned minor_version,
 412                              const struct gl_config * mesaVis,
 413                              __DRIcontext * driContextPriv,
 414                              void *sharedContextPrivate,
 415                              struct dd_function_table *functions,
 416                              unsigned *dri_ctx_error);
 417
 418 extern void intelFinish(struct gl_context * ctx);
 419 extern void _intel_flush(struct gl_context * ctx, const char *file, int line);
 420
 421 #define intel_flush(ctx) _intel_flush(ctx, __FILE__, __LINE__)
 422
 423 extern void intelInitDriverFunctions(struct dd_function_table *functions);
 424
 425 void intel_init_syncobj_functions(struct dd_function_table *functions);
 426
 427
 428 /* ================================================================
 429  * intel_state.c:
 430  */
 431
 432 #define COMPAREFUNC_ALWAYS              0
 433 #define COMPAREFUNC_NEVER               0x1
 434 #define COMPAREFUNC_LESS                0x2
 435 #define COMPAREFUNC_EQUAL               0x3
 436 #define COMPAREFUNC_LEQUAL              0x4
 437 #define COMPAREFUNC_GREATER             0x5
 438 #define COMPAREFUNC_NOTEQUAL            0x6
 439 #define COMPAREFUNC_GEQUAL              0x7
 440
 441 #define STENCILOP_KEEP                  0
 442 #define STENCILOP_ZERO                  0x1
 443 #define STENCILOP_REPLACE               0x2
 444 #define STENCILOP_INCRSAT               0x3
 445 #define STENCILOP_DECRSAT               0x4
 446 #define STENCILOP_INCR                  0x5
 447 #define STENCILOP_DECR                  0x6
 448 #define STENCILOP_INVERT                0x7
 449
 450 #define LOGICOP_CLEAR                   0
 451 #define LOGICOP_NOR                     0x1
 452 #define LOGICOP_AND_INV                 0x2
 453 #define LOGICOP_COPY_INV                0x3
 454 #define LOGICOP_AND_RVRSE               0x4
 455 #define LOGICOP_INV                     0x5
 456 #define LOGICOP_XOR                     0x6
 457 #define LOGICOP_NAND                    0x7
 458 #define LOGICOP_AND                     0x8
 459 #define LOGICOP_EQUIV                   0x9
 460 #define LOGICOP_NOOP                    0xa
 461 #define LOGICOP_OR_INV                  0xb
 462 #define LOGICOP_COPY                    0xc
 463 #define LOGICOP_OR_RVRSE                0xd
 464 #define LOGICOP_OR                      0xe
 465 #define LOGICOP_SET                     0xf
 466
 467 #define BLENDFACT_ZERO                  0x01
 468 #define BLENDFACT_ONE                   0x02
 469 #define BLENDFACT_SRC_COLR              0x03
 470 #define BLENDFACT_INV_SRC_COLR          0x04
 471 #define BLENDFACT_SRC_ALPHA             0x05
 472 #define BLENDFACT_INV_SRC_ALPHA         0x06
 473 #define BLENDFACT_DST_ALPHA             0x07
 474 #define BLENDFACT_INV_DST_ALPHA         0x08
 475 #define BLENDFACT_DST_COLR              0x09
 476 #define BLENDFACT_INV_DST_COLR          0x0a
 477 #define BLENDFACT_SRC_ALPHA_SATURATE    0x0b
 478 #define BLENDFACT_CONST_COLOR           0x0c
 479 #define BLENDFACT_INV_CONST_COLOR       0x0d
 480 #define BLENDFACT_CONST_ALPHA           0x0e
 481 #define BLENDFACT_INV_CONST_ALPHA       0x0f
 482 #define BLENDFACT_MASK                  0x0f
 483
 484 enum {
 485    DRI_CONF_BO_REUSE_DISABLED,
 486    DRI_CONF_BO_REUSE_ALL
 487 };
 488
 489 extern int intel_translate_shadow_compare_func(GLenum func);
 490 extern int intel_translate_compare_func(GLenum func);
 491 extern int intel_translate_stencil_op(GLenum op);
 492 extern int intel_translate_logic_op(GLenum opcode);
 493
 494 void intel_update_renderbuffers(__DRIcontext *context,
 495                                 __DRIdrawable *drawable);
 496 void intel_prepare_render(struct intel_context *intel);
 497
 498 void
 499 intel_resolve_for_dri2_flush(struct intel_context *intel,
 500                              __DRIdrawable *drawable);
 501
 502 void i915_set_buf_info_for_region(uint32_t *state, struct intel_region *region,
 503                                   uint32_t buffer_id);
 504 void intel_init_texture_formats(struct gl_context *ctx);
 505
 506 /*======================================================================
 507  * Inline conversion functions.
 508  * These are better-typed than the macros used previously:
 509  */
 510 static INLINE struct intel_context *
 511 intel_context(struct gl_context * ctx)
 512 {
 513    return (struct intel_context *) ctx;
 514 }
 515
 516 static INLINE bool
 517 is_power_of_two(uint32_t value)
 518 {
 519    return (value & (value - 1)) == 0;
 520 }
 521
 522 #ifdef __cplusplus
 523 }
 524 #endif
 525
 526 #endif