src/mesa/drivers/dri/i965/intel_context.h

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 #ifndef INTELCONTEXT_INC
  29 #define INTELCONTEXT_INC
  30
  31
  32 #include <stdbool.h>
  33 #include <string.h>
  34 #include "main/mtypes.h"
  35 #include "main/mm.h"
  36
  37 #ifdef __cplusplus
  38 extern "C" {
  39         /* Evil hack for using libdrm in a c++ compiler. */
  40         #define virtual virt
  41 #endif
  42
  43 #include "drm.h"
  44 #include "intel_bufmgr.h"
  45
  46 #include "intel_screen.h"
  47 #include "intel_tex_obj.h"
  48 #include "i915_drm.h"
  49
  50 #ifdef __cplusplus
  51         #undef virtual
  52 #endif
  53
  54 #include "tnl/t_vertex.h"
  55
  56 #define TAG(x) intel##x
  57 #include "tnl_dd/t_dd_vertex.h"
  58 #undef TAG
  59
  60 #define DV_PF_555  (1<<8)
  61 #define DV_PF_565  (2<<8)
  62 #define DV_PF_8888 (3<<8)
  63 #define DV_PF_4444 (8<<8)
  64 #define DV_PF_1555 (9<<8)
  65
  66 struct intel_region;
  67 struct intel_context;
  68
  69 typedef void (*intel_tri_func) (struct intel_context *, intelVertex *,
  70                                 intelVertex *, intelVertex *);
  71 typedef void (*intel_line_func) (struct intel_context *, intelVertex *,
  72                                  intelVertex *);
  73 typedef void (*intel_point_func) (struct intel_context *, intelVertex *);
  74
  75 #define INTEL_WRITE_PART  0x1
  76 #define INTEL_WRITE_FULL  0x2
  77 #define INTEL_READ        0x4
  78
  79 #define INTEL_MAX_FIXUP 64
  80
  81 #ifndef likely
  82 #ifdef __GNUC__
  83 #define likely(expr) (__builtin_expect(expr, 1))
  84 #define unlikely(expr) (__builtin_expect(expr, 0))
  85 #else
  86 #define likely(expr) (expr)
  87 #define unlikely(expr) (expr)
  88 #endif
  89 #endif
  90
  91 struct intel_sync_object {
  92    struct gl_sync_object Base;
  93
  94    /** Batch associated with this sync object */
  95    drm_intel_bo *bo;
  96 };
  97
  98 struct brw_context;
  99
 100 struct intel_batchbuffer {
 101    /** Current batchbuffer being queued up. */
 102    drm_intel_bo *bo;
 103    /** Last BO submitted to the hardware.  Used for glFinish(). */
 104    drm_intel_bo *last_bo;
 105    /** BO for post-sync nonzero writes for gen6 workaround. */
 106    drm_intel_bo *workaround_bo;
 107    bool need_workaround_flush;
 108
 109    struct cached_batch_item *cached_items;
 110
 111    uint16_t emit, total;
 112    uint16_t used, reserved_space;
 113    uint32_t *map;
 114    uint32_t *cpu_map;
 115 #define BATCH_SZ (8192*sizeof(uint32_t))
 116
 117    uint32_t state_batch_offset;
 118    bool is_blit;
 119    bool needs_sol_reset;
 120
 121    struct {
 122       uint16_t used;
 123       int reloc_count;
 124    } saved;
 125 };
 126
 127 /**
 128  * intel_context is derived from Mesa's context class: struct gl_context.
 129  */
 130 struct intel_context
 131 {
 132    struct gl_context ctx;  /**< base class, must be first field */
 133
 134    struct
 135    {
 136       void (*destroy) (struct intel_context * intel);
 137       void (*finish_batch) (struct intel_context * intel);
 138       void (*new_batch) (struct intel_context * intel);
 139
 140       void (*update_draw_buffer)(struct intel_context *intel);
 141
 142       void (*invalidate_state) (struct intel_context *intel,
 143                                 GLuint new_state);
 144
 145       void (*debug_batch)(struct intel_context *intel);
 146       void (*annotate_aub)(struct intel_context *intel);
 147       bool (*render_target_supported)(struct intel_context *intel,
 148                                       struct gl_renderbuffer *rb);
 149
 150       /** Can HiZ be enabled on a depthbuffer of the given format? */
 151       bool (*is_hiz_depth_format)(struct intel_context *intel,
 152                                   gl_format format);
 153
 154       void (*update_texture_surface)(struct gl_context *ctx,
 155                                      unsigned unit,
 156                                      uint32_t *binding_table,
 157                                      unsigned surf_index);
 158       void (*update_renderbuffer_surface)(struct brw_context *brw,
 159                                           struct gl_renderbuffer *rb,
 160                                           bool layered,
 161                                           unsigned unit);
 162       void (*update_null_renderbuffer_surface)(struct brw_context *brw,
 163                                                unsigned unit);
 164       void (*create_constant_surface)(struct brw_context *brw,
 165                                       drm_intel_bo *bo,
 166                                       uint32_t offset,
 167                                       uint32_t size,
 168                                       uint32_t *out_offset,
 169                                       bool dword_pitch);
 170
 171       /**
 172        * Send the appropriate state packets to configure depth, stencil, and
 173        * HiZ buffers (i965+ only)
 174        */
 175       void (*emit_depth_stencil_hiz)(struct brw_context *brw,
 176                                      struct intel_mipmap_tree *depth_mt,
 177                                      uint32_t depth_offset,
 178                                      uint32_t depthbuffer_format,
 179                                      uint32_t depth_surface_type,
 180                                      struct intel_mipmap_tree *stencil_mt,
 181                                      bool hiz, bool separate_stencil,
 182                                      uint32_t width, uint32_t height,
 183                                      uint32_t tile_x, uint32_t tile_y);
 184
 185    } vtbl;
 186
 187    GLuint NewGLState;
 188
 189    dri_bufmgr *bufmgr;
 190    unsigned int maxBatchSize;
 191
 192    /**
 193     * Generation number of the hardware: 2 is 8xx, 3 is 9xx pre-965, 4 is 965.
 194     */
 195    int gen;
 196    int gt;
 197    bool needs_ff_sync;
 198    bool is_haswell;
 199    bool is_baytrail;
 200    bool is_g4x;
 201    bool is_945;
 202    bool has_separate_stencil;
 203    bool must_use_separate_stencil;
 204    bool has_hiz;
 205    bool has_llc;
 206    bool has_swizzling;
 207
 208    int urb_size;
 209
 210    drm_intel_context *hw_ctx;
 211
 212    struct intel_batchbuffer batch;
 213
 214    drm_intel_bo *first_post_swapbuffers_batch;
 215    bool need_throttle;
 216    bool no_batch_wrap;
 217
 218    /**
 219     * Set if we're either a debug context or the INTEL_DEBUG=perf environment
 220     * variable is set, this is the flag indicating to do expensive work that
 221     * might lead to a perf_debug() call.
 222     */
 223    bool perf_debug;
 224
 225    struct {
 226       drm_intel_bo *bo;
 227       GLuint offset;
 228       uint32_t buffer_len;
 229       uint32_t buffer_offset;
 230       char buffer[4096];
 231    } upload;
 232
 233    uint32_t max_gtt_map_object_size;
 234
 235    GLuint stats_wm;
 236
 237    bool hw_stencil;
 238    bool hw_stipple;
 239    bool no_rast;
 240    bool always_flush_batch;
 241    bool always_flush_cache;
 242    bool disable_throttling;
 243
 244    GLenum reduced_primitive;
 245
 246    /**
 247     * Set if rendering has occured to the drawable's front buffer.
 248     *
 249     * This is used in the DRI2 case to detect that glFlush should also copy
 250     * the contents of the fake front buffer to the real front buffer.
 251     */
 252    bool front_buffer_dirty;
 253
 254    /**
 255     * Track whether front-buffer rendering is currently enabled
 256     *
 257     * A separate flag is used to track this in order to support MRT more
 258     * easily.
 259     */
 260    bool is_front_buffer_rendering;
 261    /**
 262     * Track whether front-buffer is the current read target.
 263     *
 264     * This is closely associated with is_front_buffer_rendering, but may
 265     * be set separately.  The DRI2 fake front buffer must be referenced
 266     * either way.
 267     */
 268    bool is_front_buffer_reading;
 269
 270    bool use_early_z;
 271
 272    int driFd;
 273
 274    __DRIcontext *driContext;
 275    struct intel_screen *intelScreen;
 276    void (*saved_viewport)(struct gl_context * ctx,
 277                           GLint x, GLint y, GLsizei width, GLsizei height);
 278
 279    /**
 280     * Configuration cache
 281     */
 282    driOptionCache optionCache;
 283 };
 284
 285 #define SUBPIXEL_X 0.125
 286 #define SUBPIXEL_Y 0.125
 287
 288 /**
 289  * Align a value down to an alignment value
 290  *
 291  * If \c value is not already aligned to the requested alignment value, it
 292  * will be rounded down.
 293  *
 294  * \param value  Value to be rounded
 295  * \param alignment  Alignment value to be used.  This must be a power of two.
 296  *
 297  * \sa ALIGN()
 298  */
 299 #define ROUND_DOWN_TO(value, alignment) ((value) & ~(alignment - 1))
 300
 301 static INLINE uint32_t
 302 U_FIXED(float value, uint32_t frac_bits)
 303 {
 304    value *= (1 << frac_bits);
 305    return value < 0 ? 0 : value;
 306 }
 307
 308 static INLINE uint32_t
 309 S_FIXED(float value, uint32_t frac_bits)
 310 {
 311    return value * (1 << frac_bits);
 312 }
 313
 314 /* ================================================================
 315  * From linux kernel i386 header files, copes with odd sizes better
 316  * than COPY_DWORDS would:
 317  * XXX Put this in src/mesa/main/imports.h ???
 318  */
 319 #if defined(i386) || defined(__i386__)
 320 static INLINE void * __memcpy(void * to, const void * from, size_t n)
 321 {
 322    int d0, d1, d2;
 323    __asm__ __volatile__(
 324       "rep ; movsl\n\t"
 325       "testb $2,%b4\n\t"
 326       "je 1f\n\t"
 327       "movsw\n"
 328       "1:\ttestb $1,%b4\n\t"
 329       "je 2f\n\t"
 330       "movsb\n"
 331       "2:"
 332       : "=&c" (d0), "=&D" (d1), "=&S" (d2)
 333       :"0" (n/4), "q" (n),"1" ((long) to),"2" ((long) from)
 334       : "memory");
 335    return (to);
 336 }
 337 #else
 338 #define __memcpy(a,b,c) memcpy(a,b,c)
 339 #endif
 340
 341
 342 /* ================================================================
 343  * Debugging:
 344  */
 345 extern int INTEL_DEBUG;
 346
 347 #define DEBUG_TEXTURE   0x1
 348 #define DEBUG_STATE     0x2
 349 #define DEBUG_IOCTL     0x4
 350 #define DEBUG_BLIT      0x8
 351 #define DEBUG_MIPTREE   0x10
 352 #define DEBUG_PERF      0x20
 353 #define DEBUG_BATCH     0x80
 354 #define DEBUG_PIXEL     0x100
 355 #define DEBUG_BUFMGR    0x200
 356 #define DEBUG_REGION    0x400
 357 #define DEBUG_FBO       0x800
 358 #define DEBUG_GS        0x1000
 359 #define DEBUG_SYNC      0x2000
 360 #define DEBUG_PRIMS     0x4000
 361 #define DEBUG_VERTS     0x8000
 362 #define DEBUG_DRI       0x10000
 363 #define DEBUG_SF        0x20000
 364 #define DEBUG_STATS     0x100000
 365 #define DEBUG_WM        0x400000
 366 #define DEBUG_URB       0x800000
 367 #define DEBUG_VS        0x1000000
 368 #define DEBUG_CLIP      0x2000000
 369 #define DEBUG_AUB       0x4000000
 370 #define DEBUG_SHADER_TIME 0x8000000
 371 #define DEBUG_BLORP     0x10000000
 372 #define DEBUG_NO16      0x20000000
 373
 374 #ifdef HAVE_ANDROID_PLATFORM
 375 #define LOG_TAG "INTEL-MESA"
 376 #include <cutils/log.h>
 377 #ifndef ALOGW
 378 #define ALOGW LOGW
 379 #endif
 380 #define dbg_printf(...) ALOGW(__VA_ARGS__)
 381 #else
 382 #define dbg_printf(...) printf(__VA_ARGS__)
 383 #endif /* HAVE_ANDROID_PLATFORM */
 384
 385 #define DBG(...) do {                                           \
 386         if (unlikely(INTEL_DEBUG & FILE_DEBUG_FLAG))            \
 387                 dbg_printf(__VA_ARGS__);                        \
 388 } while(0)
 389
 390 #define perf_debug(...) do {                                    \
 391    static GLuint msg_id = 0;                                    \
 392    if (unlikely(INTEL_DEBUG & DEBUG_PERF))                      \
 393       dbg_printf(__VA_ARGS__);                                  \
 394    if (intel->perf_debug)                                       \
 395       _mesa_gl_debug(&intel->ctx, &msg_id,                      \
 396                      MESA_DEBUG_TYPE_PERFORMANCE,               \
 397                      MESA_DEBUG_SEVERITY_MEDIUM,                \
 398                      __VA_ARGS__);                              \
 399 } while(0)
 400
 401 #define WARN_ONCE(cond, fmt...) do {                            \
 402    if (unlikely(cond)) {                                        \
 403       static bool _warned = false;                              \
 404       static GLuint msg_id = 0;                                 \
 405       if (!_warned) {                                           \
 406          fprintf(stderr, "WARNING: ");                          \
 407          fprintf(stderr, fmt);                                  \
 408          _warned = true;                                        \
 409                                                                 \
 410          _mesa_gl_debug(ctx, &msg_id,                           \
 411                         MESA_DEBUG_TYPE_OTHER,                  \
 412                         MESA_DEBUG_SEVERITY_HIGH, fmt);         \
 413       }                                                         \
 414    }                                                            \
 415 } while (0)
 416
 417 #define PCI_CHIP_845_G                  0x2562
 418 #define PCI_CHIP_I830_M                 0x3577
 419 #define PCI_CHIP_I855_GM                0x3582
 420 #define PCI_CHIP_I865_G                 0x2572
 421 #define PCI_CHIP_I915_G                 0x2582
 422 #define PCI_CHIP_I915_GM                0x2592
 423 #define PCI_CHIP_I945_G                 0x2772
 424 #define PCI_CHIP_I945_GM                0x27A2
 425 #define PCI_CHIP_I945_GME               0x27AE
 426 #define PCI_CHIP_G33_G                  0x29C2
 427 #define PCI_CHIP_Q35_G                  0x29B2
 428 #define PCI_CHIP_Q33_G                  0x29D2
 429
 430
 431 /* ================================================================
 432  * intel_context.c:
 433  */
 434
 435 extern bool intelInitContext(struct intel_context *intel,
 436                              int api,
 437                              unsigned major_version,
 438                              unsigned minor_version,
 439                              const struct gl_config * mesaVis,
 440                              __DRIcontext * driContextPriv,
 441                              void *sharedContextPrivate,
 442                              struct dd_function_table *functions,
 443                              unsigned *dri_ctx_error);
 444
 445 extern void intelFinish(struct gl_context * ctx);
 446 extern void _intel_flush(struct gl_context * ctx, const char *file, int line);
 447
 448 #define intel_flush(ctx) _intel_flush(ctx, __FILE__, __LINE__)
 449
 450 extern void intelInitDriverFunctions(struct dd_function_table *functions);
 451
 452 void intel_init_syncobj_functions(struct dd_function_table *functions);
 453
 454
 455 /* ================================================================
 456  * intel_state.c:
 457  */
 458
 459 #define COMPAREFUNC_ALWAYS              0
 460 #define COMPAREFUNC_NEVER               0x1
 461 #define COMPAREFUNC_LESS                0x2
 462 #define COMPAREFUNC_EQUAL               0x3
 463 #define COMPAREFUNC_LEQUAL              0x4
 464 #define COMPAREFUNC_GREATER             0x5
 465 #define COMPAREFUNC_NOTEQUAL            0x6
 466 #define COMPAREFUNC_GEQUAL              0x7
 467
 468 #define STENCILOP_KEEP                  0
 469 #define STENCILOP_ZERO                  0x1
 470 #define STENCILOP_REPLACE               0x2
 471 #define STENCILOP_INCRSAT               0x3
 472 #define STENCILOP_DECRSAT               0x4
 473 #define STENCILOP_INCR                  0x5
 474 #define STENCILOP_DECR                  0x6
 475 #define STENCILOP_INVERT                0x7
 476
 477 #define LOGICOP_CLEAR                   0
 478 #define LOGICOP_NOR                     0x1
 479 #define LOGICOP_AND_INV                 0x2
 480 #define LOGICOP_COPY_INV                0x3
 481 #define LOGICOP_AND_RVRSE               0x4
 482 #define LOGICOP_INV                     0x5
 483 #define LOGICOP_XOR                     0x6
 484 #define LOGICOP_NAND                    0x7
 485 #define LOGICOP_AND                     0x8
 486 #define LOGICOP_EQUIV                   0x9
 487 #define LOGICOP_NOOP                    0xa
 488 #define LOGICOP_OR_INV                  0xb
 489 #define LOGICOP_COPY                    0xc
 490 #define LOGICOP_OR_RVRSE                0xd
 491 #define LOGICOP_OR                      0xe
 492 #define LOGICOP_SET                     0xf
 493
 494 #define BLENDFACT_ZERO                  0x01
 495 #define BLENDFACT_ONE                   0x02
 496 #define BLENDFACT_SRC_COLR              0x03
 497 #define BLENDFACT_INV_SRC_COLR          0x04
 498 #define BLENDFACT_SRC_ALPHA             0x05
 499 #define BLENDFACT_INV_SRC_ALPHA         0x06
 500 #define BLENDFACT_DST_ALPHA             0x07
 501 #define BLENDFACT_INV_DST_ALPHA         0x08
 502 #define BLENDFACT_DST_COLR              0x09
 503 #define BLENDFACT_INV_DST_COLR          0x0a
 504 #define BLENDFACT_SRC_ALPHA_SATURATE    0x0b
 505 #define BLENDFACT_CONST_COLOR           0x0c
 506 #define BLENDFACT_INV_CONST_COLOR       0x0d
 507 #define BLENDFACT_CONST_ALPHA           0x0e
 508 #define BLENDFACT_INV_CONST_ALPHA       0x0f
 509 #define BLENDFACT_MASK                  0x0f
 510
 511 enum {
 512    DRI_CONF_BO_REUSE_DISABLED,
 513    DRI_CONF_BO_REUSE_ALL
 514 };
 515
 516 extern int intel_translate_shadow_compare_func(GLenum func);
 517 extern int intel_translate_compare_func(GLenum func);
 518 extern int intel_translate_stencil_op(GLenum op);
 519 extern int intel_translate_logic_op(GLenum opcode);
 520
 521 void intel_update_renderbuffers(__DRIcontext *context,
 522                                 __DRIdrawable *drawable);
 523 void intel_prepare_render(struct intel_context *intel);
 524
 525 void
 526 intel_resolve_for_dri2_flush(struct intel_context *intel,
 527                              __DRIdrawable *drawable);
 528
 529 void i915_set_buf_info_for_region(uint32_t *state, struct intel_region *region,
 530                                   uint32_t buffer_id);
 531 void intel_init_texture_formats(struct gl_context *ctx);
 532
 533 /*======================================================================
 534  * Inline conversion functions.
 535  * These are better-typed than the macros used previously:
 536  */
 537 static INLINE struct intel_context *
 538 intel_context(struct gl_context * ctx)
 539 {
 540    return (struct intel_context *) ctx;
 541 }
 542
 543 static INLINE bool
 544 is_power_of_two(uint32_t value)
 545 {
 546    return (value & (value - 1)) == 0;
 547 }
 548
 549 #ifdef __cplusplus
 550 }
 551 #endif
 552
 553 #endif