src/mesa/drivers/dri/i965/intel_context.h

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 #ifndef INTELCONTEXT_INC
  29 #define INTELCONTEXT_INC
  30
  31
  32 #include <stdbool.h>
  33 #include <string.h>
  34 #include "main/mtypes.h"
  35 #include "main/mm.h"
  36
  37 #ifdef __cplusplus
  38 extern "C" {
  39         /* Evil hack for using libdrm in a c++ compiler. */
  40         #define virtual virt
  41 #endif
  42
  43 #include "drm.h"
  44 #include "intel_bufmgr.h"
  45
  46 #include "intel_screen.h"
  47 #include "intel_tex_obj.h"
  48 #include "i915_drm.h"
  49
  50 #ifdef __cplusplus
  51         #undef virtual
  52 #endif
  53
  54 #include "tnl/t_vertex.h"
  55
  56 struct intel_region;
  57 struct intel_context;
  58
  59 #define INTEL_WRITE_PART  0x1
  60 #define INTEL_WRITE_FULL  0x2
  61 #define INTEL_READ        0x4
  62
  63 #ifndef likely
  64 #ifdef __GNUC__
  65 #define likely(expr) (__builtin_expect(expr, 1))
  66 #define unlikely(expr) (__builtin_expect(expr, 0))
  67 #else
  68 #define likely(expr) (expr)
  69 #define unlikely(expr) (expr)
  70 #endif
  71 #endif
  72
  73 struct intel_sync_object {
  74    struct gl_sync_object Base;
  75
  76    /** Batch associated with this sync object */
  77    drm_intel_bo *bo;
  78 };
  79
  80 struct brw_context;
  81
  82 struct intel_batchbuffer {
  83    /** Current batchbuffer being queued up. */
  84    drm_intel_bo *bo;
  85    /** Last BO submitted to the hardware.  Used for glFinish(). */
  86    drm_intel_bo *last_bo;
  87    /** BO for post-sync nonzero writes for gen6 workaround. */
  88    drm_intel_bo *workaround_bo;
  89    bool need_workaround_flush;
  90
  91    struct cached_batch_item *cached_items;
  92
  93    uint16_t emit, total;
  94    uint16_t used, reserved_space;
  95    uint32_t *map;
  96    uint32_t *cpu_map;
  97 #define BATCH_SZ (8192*sizeof(uint32_t))
  98
  99    uint32_t state_batch_offset;
 100    bool is_blit;
 101    bool needs_sol_reset;
 102
 103    struct {
 104       uint16_t used;
 105       int reloc_count;
 106    } saved;
 107 };
 108
 109 /**
 110  * intel_context is derived from Mesa's context class: struct gl_context.
 111  */
 112 struct intel_context
 113 {
 114    struct gl_context ctx;  /**< base class, must be first field */
 115
 116    struct
 117    {
 118       void (*destroy) (struct intel_context * intel);
 119       void (*finish_batch) (struct intel_context * intel);
 120       void (*new_batch) (struct intel_context * intel);
 121
 122       void (*invalidate_state) (struct intel_context *intel,
 123                                 GLuint new_state);
 124
 125       void (*debug_batch)(struct intel_context *intel);
 126       void (*annotate_aub)(struct intel_context *intel);
 127       bool (*render_target_supported)(struct intel_context *intel,
 128                                       struct gl_renderbuffer *rb);
 129
 130       /** Can HiZ be enabled on a depthbuffer of the given format? */
 131       bool (*is_hiz_depth_format)(struct intel_context *intel,
 132                                   gl_format format);
 133
 134       void (*update_texture_surface)(struct gl_context *ctx,
 135                                      unsigned unit,
 136                                      uint32_t *binding_table,
 137                                      unsigned surf_index);
 138       void (*update_renderbuffer_surface)(struct brw_context *brw,
 139                                           struct gl_renderbuffer *rb,
 140                                           bool layered,
 141                                           unsigned unit);
 142       void (*update_null_renderbuffer_surface)(struct brw_context *brw,
 143                                                unsigned unit);
 144       void (*create_constant_surface)(struct brw_context *brw,
 145                                       drm_intel_bo *bo,
 146                                       uint32_t offset,
 147                                       uint32_t size,
 148                                       uint32_t *out_offset,
 149                                       bool dword_pitch);
 150
 151       /**
 152        * Send the appropriate state packets to configure depth, stencil, and
 153        * HiZ buffers (i965+ only)
 154        */
 155       void (*emit_depth_stencil_hiz)(struct brw_context *brw,
 156                                      struct intel_mipmap_tree *depth_mt,
 157                                      uint32_t depth_offset,
 158                                      uint32_t depthbuffer_format,
 159                                      uint32_t depth_surface_type,
 160                                      struct intel_mipmap_tree *stencil_mt,
 161                                      bool hiz, bool separate_stencil,
 162                                      uint32_t width, uint32_t height,
 163                                      uint32_t tile_x, uint32_t tile_y);
 164
 165    } vtbl;
 166
 167    GLuint NewGLState;
 168
 169    dri_bufmgr *bufmgr;
 170    unsigned int maxBatchSize;
 171
 172    /**
 173     * Generation number of the hardware: 2 is 8xx, 3 is 9xx pre-965, 4 is 965.
 174     */
 175    int gen;
 176    int gt;
 177    bool needs_ff_sync;
 178    bool is_haswell;
 179    bool is_baytrail;
 180    bool is_g4x;
 181    bool has_separate_stencil;
 182    bool must_use_separate_stencil;
 183    bool has_hiz;
 184    bool has_llc;
 185    bool has_swizzling;
 186
 187    drm_intel_context *hw_ctx;
 188
 189    struct intel_batchbuffer batch;
 190
 191    drm_intel_bo *first_post_swapbuffers_batch;
 192    bool need_throttle;
 193    bool no_batch_wrap;
 194
 195    /**
 196     * Set if we're either a debug context or the INTEL_DEBUG=perf environment
 197     * variable is set, this is the flag indicating to do expensive work that
 198     * might lead to a perf_debug() call.
 199     */
 200    bool perf_debug;
 201
 202    struct {
 203       drm_intel_bo *bo;
 204       GLuint offset;
 205       uint32_t buffer_len;
 206       uint32_t buffer_offset;
 207       char buffer[4096];
 208    } upload;
 209
 210    uint32_t max_gtt_map_object_size;
 211
 212    GLuint stats_wm;
 213
 214    bool no_rast;
 215    bool always_flush_batch;
 216    bool always_flush_cache;
 217    bool disable_throttling;
 218
 219    GLenum reduced_primitive;
 220
 221    /**
 222     * Set if rendering has occured to the drawable's front buffer.
 223     *
 224     * This is used in the DRI2 case to detect that glFlush should also copy
 225     * the contents of the fake front buffer to the real front buffer.
 226     */
 227    bool front_buffer_dirty;
 228
 229    /**
 230     * Track whether front-buffer rendering is currently enabled
 231     *
 232     * A separate flag is used to track this in order to support MRT more
 233     * easily.
 234     */
 235    bool is_front_buffer_rendering;
 236    /**
 237     * Track whether front-buffer is the current read target.
 238     *
 239     * This is closely associated with is_front_buffer_rendering, but may
 240     * be set separately.  The DRI2 fake front buffer must be referenced
 241     * either way.
 242     */
 243    bool is_front_buffer_reading;
 244
 245    int driFd;
 246
 247    __DRIcontext *driContext;
 248    struct intel_screen *intelScreen;
 249
 250    /**
 251     * Configuration cache
 252     */
 253    driOptionCache optionCache;
 254 };
 255
 256 /**
 257  * Align a value down to an alignment value
 258  *
 259  * If \c value is not already aligned to the requested alignment value, it
 260  * will be rounded down.
 261  *
 262  * \param value  Value to be rounded
 263  * \param alignment  Alignment value to be used.  This must be a power of two.
 264  *
 265  * \sa ALIGN()
 266  */
 267 #define ROUND_DOWN_TO(value, alignment) ((value) & ~(alignment - 1))
 268
 269 static INLINE uint32_t
 270 U_FIXED(float value, uint32_t frac_bits)
 271 {
 272    value *= (1 << frac_bits);
 273    return value < 0 ? 0 : value;
 274 }
 275
 276 static INLINE uint32_t
 277 S_FIXED(float value, uint32_t frac_bits)
 278 {
 279    return value * (1 << frac_bits);
 280 }
 281
 282 /* ================================================================
 283  * From linux kernel i386 header files, copes with odd sizes better
 284  * than COPY_DWORDS would:
 285  * XXX Put this in src/mesa/main/imports.h ???
 286  */
 287 #if defined(i386) || defined(__i386__)
 288 static INLINE void * __memcpy(void * to, const void * from, size_t n)
 289 {
 290    int d0, d1, d2;
 291    __asm__ __volatile__(
 292       "rep ; movsl\n\t"
 293       "testb $2,%b4\n\t"
 294       "je 1f\n\t"
 295       "movsw\n"
 296       "1:\ttestb $1,%b4\n\t"
 297       "je 2f\n\t"
 298       "movsb\n"
 299       "2:"
 300       : "=&c" (d0), "=&D" (d1), "=&S" (d2)
 301       :"0" (n/4), "q" (n),"1" ((long) to),"2" ((long) from)
 302       : "memory");
 303    return (to);
 304 }
 305 #else
 306 #define __memcpy(a,b,c) memcpy(a,b,c)
 307 #endif
 308
 309
 310 /* ================================================================
 311  * Debugging:
 312  */
 313 extern int INTEL_DEBUG;
 314
 315 #define DEBUG_TEXTURE   0x1
 316 #define DEBUG_STATE     0x2
 317 #define DEBUG_IOCTL     0x4
 318 #define DEBUG_BLIT      0x8
 319 #define DEBUG_MIPTREE   0x10
 320 #define DEBUG_PERF      0x20
 321 #define DEBUG_BATCH     0x80
 322 #define DEBUG_PIXEL     0x100
 323 #define DEBUG_BUFMGR    0x200
 324 #define DEBUG_REGION    0x400
 325 #define DEBUG_FBO       0x800
 326 #define DEBUG_GS        0x1000
 327 #define DEBUG_SYNC      0x2000
 328 #define DEBUG_PRIMS     0x4000
 329 #define DEBUG_VERTS     0x8000
 330 #define DEBUG_DRI       0x10000
 331 #define DEBUG_SF        0x20000
 332 #define DEBUG_STATS     0x100000
 333 #define DEBUG_WM        0x400000
 334 #define DEBUG_URB       0x800000
 335 #define DEBUG_VS        0x1000000
 336 #define DEBUG_CLIP      0x2000000
 337 #define DEBUG_AUB       0x4000000
 338 #define DEBUG_SHADER_TIME 0x8000000
 339 #define DEBUG_BLORP     0x10000000
 340 #define DEBUG_NO16      0x20000000
 341
 342 #ifdef HAVE_ANDROID_PLATFORM
 343 #define LOG_TAG "INTEL-MESA"
 344 #include <cutils/log.h>
 345 #ifndef ALOGW
 346 #define ALOGW LOGW
 347 #endif
 348 #define dbg_printf(...) ALOGW(__VA_ARGS__)
 349 #else
 350 #define dbg_printf(...) printf(__VA_ARGS__)
 351 #endif /* HAVE_ANDROID_PLATFORM */
 352
 353 #define DBG(...) do {                                           \
 354         if (unlikely(INTEL_DEBUG & FILE_DEBUG_FLAG))            \
 355                 dbg_printf(__VA_ARGS__);                        \
 356 } while(0)
 357
 358 #define perf_debug(...) do {                                    \
 359    static GLuint msg_id = 0;                                    \
 360    if (unlikely(INTEL_DEBUG & DEBUG_PERF))                      \
 361       dbg_printf(__VA_ARGS__);                                  \
 362    if (intel->perf_debug)                                       \
 363       _mesa_gl_debug(&intel->ctx, &msg_id,                      \
 364                      MESA_DEBUG_TYPE_PERFORMANCE,               \
 365                      MESA_DEBUG_SEVERITY_MEDIUM,                \
 366                      __VA_ARGS__);                              \
 367 } while(0)
 368
 369 #define WARN_ONCE(cond, fmt...) do {                            \
 370    if (unlikely(cond)) {                                        \
 371       static bool _warned = false;                              \
 372       static GLuint msg_id = 0;                                 \
 373       if (!_warned) {                                           \
 374          fprintf(stderr, "WARNING: ");                          \
 375          fprintf(stderr, fmt);                                  \
 376          _warned = true;                                        \
 377                                                                 \
 378          _mesa_gl_debug(ctx, &msg_id,                           \
 379                         MESA_DEBUG_TYPE_OTHER,                  \
 380                         MESA_DEBUG_SEVERITY_HIGH, fmt);         \
 381       }                                                         \
 382    }                                                            \
 383 } while (0)
 384
 385 /* ================================================================
 386  * intel_context.c:
 387  */
 388
 389 extern bool intelInitContext(struct intel_context *intel,
 390                              int api,
 391                              unsigned major_version,
 392                              unsigned minor_version,
 393                              const struct gl_config * mesaVis,
 394                              __DRIcontext * driContextPriv,
 395                              void *sharedContextPrivate,
 396                              struct dd_function_table *functions,
 397                              unsigned *dri_ctx_error);
 398
 399 extern void intelFinish(struct gl_context * ctx);
 400 extern void _intel_flush(struct gl_context * ctx, const char *file, int line);
 401
 402 #define intel_flush(ctx) _intel_flush(ctx, __FILE__, __LINE__)
 403
 404 extern void intelInitDriverFunctions(struct dd_function_table *functions);
 405
 406 void intel_init_syncobj_functions(struct dd_function_table *functions);
 407
 408 enum {
 409    DRI_CONF_BO_REUSE_DISABLED,
 410    DRI_CONF_BO_REUSE_ALL
 411 };
 412
 413 extern int intel_translate_shadow_compare_func(GLenum func);
 414 extern int intel_translate_compare_func(GLenum func);
 415 extern int intel_translate_stencil_op(GLenum op);
 416 extern int intel_translate_logic_op(GLenum opcode);
 417
 418 void intel_update_renderbuffers(__DRIcontext *context,
 419                                 __DRIdrawable *drawable);
 420 void intel_prepare_render(struct intel_context *intel);
 421
 422 void
 423 intel_resolve_for_dri2_flush(struct intel_context *intel,
 424                              __DRIdrawable *drawable);
 425
 426 extern void
 427 intelInitExtensions(struct gl_context *ctx);
 428 extern void
 429 intelInitClearFuncs(struct dd_function_table *functions);
 430
 431 /*======================================================================
 432  * Inline conversion functions.
 433  * These are better-typed than the macros used previously:
 434  */
 435 static INLINE struct intel_context *
 436 intel_context(struct gl_context * ctx)
 437 {
 438    return (struct intel_context *) ctx;
 439 }
 440
 441 static INLINE bool
 442 is_power_of_two(uint32_t value)
 443 {
 444    return (value & (value - 1)) == 0;
 445 }
 446
 447 #ifdef __cplusplus
 448 }
 449 #endif
 450
 451 #endif