1 /**************************************************************************
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
28 #ifndef INTELCONTEXT_INC
29 #define INTELCONTEXT_INC
34 #include "main/mtypes.h"
39 /* Evil hack for using libdrm in a c++ compiler. */
44 #include "intel_bufmgr.h"
46 #include "intel_screen.h"
47 #include "intel_tex_obj.h"
54 #include "tnl/t_vertex.h"
56 #define TAG(x) intel##x
57 #include "tnl_dd/t_dd_vertex.h"
63 typedef void (*intel_tri_func
) (struct intel_context
*, intelVertex
*,
64 intelVertex
*, intelVertex
*);
65 typedef void (*intel_line_func
) (struct intel_context
*, intelVertex
*,
67 typedef void (*intel_point_func
) (struct intel_context
*, intelVertex
*);
69 #define INTEL_WRITE_PART 0x1
70 #define INTEL_WRITE_FULL 0x2
71 #define INTEL_READ 0x4
75 #define likely(expr) (__builtin_expect(expr, 1))
76 #define unlikely(expr) (__builtin_expect(expr, 0))
78 #define likely(expr) (expr)
79 #define unlikely(expr) (expr)
83 struct intel_sync_object
{
84 struct gl_sync_object Base
;
86 /** Batch associated with this sync object */
92 struct intel_batchbuffer
{
93 /** Current batchbuffer being queued up. */
95 /** Last BO submitted to the hardware. Used for glFinish(). */
96 drm_intel_bo
*last_bo
;
97 /** BO for post-sync nonzero writes for gen6 workaround. */
98 drm_intel_bo
*workaround_bo
;
99 bool need_workaround_flush
;
101 struct cached_batch_item
*cached_items
;
103 uint16_t emit
, total
;
104 uint16_t used
, reserved_space
;
107 #define BATCH_SZ (8192*sizeof(uint32_t))
109 uint32_t state_batch_offset
;
111 bool needs_sol_reset
;
120 * intel_context is derived from Mesa's context class: struct gl_context.
124 struct gl_context ctx
; /**< base class, must be first field */
128 void (*destroy
) (struct intel_context
* intel
);
129 void (*finish_batch
) (struct intel_context
* intel
);
130 void (*new_batch
) (struct intel_context
* intel
);
132 void (*invalidate_state
) (struct intel_context
*intel
,
135 void (*debug_batch
)(struct intel_context
*intel
);
136 void (*annotate_aub
)(struct intel_context
*intel
);
137 bool (*render_target_supported
)(struct intel_context
*intel
,
138 struct gl_renderbuffer
*rb
);
140 /** Can HiZ be enabled on a depthbuffer of the given format? */
141 bool (*is_hiz_depth_format
)(struct intel_context
*intel
,
144 void (*update_texture_surface
)(struct gl_context
*ctx
,
146 uint32_t *binding_table
,
147 unsigned surf_index
);
148 void (*update_renderbuffer_surface
)(struct brw_context
*brw
,
149 struct gl_renderbuffer
*rb
,
152 void (*update_null_renderbuffer_surface
)(struct brw_context
*brw
,
154 void (*create_constant_surface
)(struct brw_context
*brw
,
158 uint32_t *out_offset
,
162 * Send the appropriate state packets to configure depth, stencil, and
163 * HiZ buffers (i965+ only)
165 void (*emit_depth_stencil_hiz
)(struct brw_context
*brw
,
166 struct intel_mipmap_tree
*depth_mt
,
167 uint32_t depth_offset
,
168 uint32_t depthbuffer_format
,
169 uint32_t depth_surface_type
,
170 struct intel_mipmap_tree
*stencil_mt
,
171 bool hiz
, bool separate_stencil
,
172 uint32_t width
, uint32_t height
,
173 uint32_t tile_x
, uint32_t tile_y
);
180 unsigned int maxBatchSize
;
183 * Generation number of the hardware: 2 is 8xx, 3 is 9xx pre-965, 4 is 965.
192 bool has_separate_stencil
;
193 bool must_use_separate_stencil
;
200 drm_intel_context
*hw_ctx
;
202 struct intel_batchbuffer batch
;
204 drm_intel_bo
*first_post_swapbuffers_batch
;
209 * Set if we're either a debug context or the INTEL_DEBUG=perf environment
210 * variable is set, this is the flag indicating to do expensive work that
211 * might lead to a perf_debug() call.
219 uint32_t buffer_offset
;
223 uint32_t max_gtt_map_object_size
;
228 bool always_flush_batch
;
229 bool always_flush_cache
;
230 bool disable_throttling
;
232 GLenum reduced_primitive
;
235 * Set if rendering has occured to the drawable's front buffer.
237 * This is used in the DRI2 case to detect that glFlush should also copy
238 * the contents of the fake front buffer to the real front buffer.
240 bool front_buffer_dirty
;
243 * Track whether front-buffer rendering is currently enabled
245 * A separate flag is used to track this in order to support MRT more
248 bool is_front_buffer_rendering
;
250 * Track whether front-buffer is the current read target.
252 * This is closely associated with is_front_buffer_rendering, but may
253 * be set separately. The DRI2 fake front buffer must be referenced
256 bool is_front_buffer_reading
;
260 __DRIcontext
*driContext
;
261 struct intel_screen
*intelScreen
;
262 void (*saved_viewport
)(struct gl_context
* ctx
,
263 GLint x
, GLint y
, GLsizei width
, GLsizei height
);
266 * Configuration cache
268 driOptionCache optionCache
;
272 * Align a value down to an alignment value
274 * If \c value is not already aligned to the requested alignment value, it
275 * will be rounded down.
277 * \param value Value to be rounded
278 * \param alignment Alignment value to be used. This must be a power of two.
282 #define ROUND_DOWN_TO(value, alignment) ((value) & ~(alignment - 1))
284 static INLINE
uint32_t
285 U_FIXED(float value
, uint32_t frac_bits
)
287 value
*= (1 << frac_bits
);
288 return value
< 0 ? 0 : value
;
291 static INLINE
uint32_t
292 S_FIXED(float value
, uint32_t frac_bits
)
294 return value
* (1 << frac_bits
);
297 /* ================================================================
298 * From linux kernel i386 header files, copes with odd sizes better
299 * than COPY_DWORDS would:
300 * XXX Put this in src/mesa/main/imports.h ???
302 #if defined(i386) || defined(__i386__)
303 static INLINE
void * __memcpy(void * to
, const void * from
, size_t n
)
306 __asm__
__volatile__(
311 "1:\ttestb $1,%b4\n\t"
315 : "=&c" (d0
), "=&D" (d1
), "=&S" (d2
)
316 :"0" (n
/4), "q" (n
),"1" ((long) to
),"2" ((long) from
)
321 #define __memcpy(a,b,c) memcpy(a,b,c)
325 /* ================================================================
328 extern int INTEL_DEBUG
;
330 #define DEBUG_TEXTURE 0x1
331 #define DEBUG_STATE 0x2
332 #define DEBUG_IOCTL 0x4
333 #define DEBUG_BLIT 0x8
334 #define DEBUG_MIPTREE 0x10
335 #define DEBUG_PERF 0x20
336 #define DEBUG_BATCH 0x80
337 #define DEBUG_PIXEL 0x100
338 #define DEBUG_BUFMGR 0x200
339 #define DEBUG_REGION 0x400
340 #define DEBUG_FBO 0x800
341 #define DEBUG_GS 0x1000
342 #define DEBUG_SYNC 0x2000
343 #define DEBUG_PRIMS 0x4000
344 #define DEBUG_VERTS 0x8000
345 #define DEBUG_DRI 0x10000
346 #define DEBUG_SF 0x20000
347 #define DEBUG_STATS 0x100000
348 #define DEBUG_WM 0x400000
349 #define DEBUG_URB 0x800000
350 #define DEBUG_VS 0x1000000
351 #define DEBUG_CLIP 0x2000000
352 #define DEBUG_AUB 0x4000000
353 #define DEBUG_SHADER_TIME 0x8000000
354 #define DEBUG_BLORP 0x10000000
355 #define DEBUG_NO16 0x20000000
357 #ifdef HAVE_ANDROID_PLATFORM
358 #define LOG_TAG "INTEL-MESA"
359 #include <cutils/log.h>
363 #define dbg_printf(...) ALOGW(__VA_ARGS__)
365 #define dbg_printf(...) printf(__VA_ARGS__)
366 #endif /* HAVE_ANDROID_PLATFORM */
368 #define DBG(...) do { \
369 if (unlikely(INTEL_DEBUG & FILE_DEBUG_FLAG)) \
370 dbg_printf(__VA_ARGS__); \
373 #define perf_debug(...) do { \
374 static GLuint msg_id = 0; \
375 if (unlikely(INTEL_DEBUG & DEBUG_PERF)) \
376 dbg_printf(__VA_ARGS__); \
377 if (intel->perf_debug) \
378 _mesa_gl_debug(&intel->ctx, &msg_id, \
379 MESA_DEBUG_TYPE_PERFORMANCE, \
380 MESA_DEBUG_SEVERITY_MEDIUM, \
384 #define WARN_ONCE(cond, fmt...) do { \
385 if (unlikely(cond)) { \
386 static bool _warned = false; \
387 static GLuint msg_id = 0; \
389 fprintf(stderr, "WARNING: "); \
390 fprintf(stderr, fmt); \
393 _mesa_gl_debug(ctx, &msg_id, \
394 MESA_DEBUG_TYPE_OTHER, \
395 MESA_DEBUG_SEVERITY_HIGH, fmt); \
400 /* ================================================================
404 extern bool intelInitContext(struct intel_context
*intel
,
406 unsigned major_version
,
407 unsigned minor_version
,
408 const struct gl_config
* mesaVis
,
409 __DRIcontext
* driContextPriv
,
410 void *sharedContextPrivate
,
411 struct dd_function_table
*functions
,
412 unsigned *dri_ctx_error
);
414 extern void intelFinish(struct gl_context
* ctx
);
415 extern void _intel_flush(struct gl_context
* ctx
, const char *file
, int line
);
417 #define intel_flush(ctx) _intel_flush(ctx, __FILE__, __LINE__)
419 extern void intelInitDriverFunctions(struct dd_function_table
*functions
);
421 void intel_init_syncobj_functions(struct dd_function_table
*functions
);
424 /* ================================================================
428 #define COMPAREFUNC_ALWAYS 0
429 #define COMPAREFUNC_NEVER 0x1
430 #define COMPAREFUNC_LESS 0x2
431 #define COMPAREFUNC_EQUAL 0x3
432 #define COMPAREFUNC_LEQUAL 0x4
433 #define COMPAREFUNC_GREATER 0x5
434 #define COMPAREFUNC_NOTEQUAL 0x6
435 #define COMPAREFUNC_GEQUAL 0x7
437 #define STENCILOP_KEEP 0
438 #define STENCILOP_ZERO 0x1
439 #define STENCILOP_REPLACE 0x2
440 #define STENCILOP_INCRSAT 0x3
441 #define STENCILOP_DECRSAT 0x4
442 #define STENCILOP_INCR 0x5
443 #define STENCILOP_DECR 0x6
444 #define STENCILOP_INVERT 0x7
446 #define LOGICOP_CLEAR 0
447 #define LOGICOP_NOR 0x1
448 #define LOGICOP_AND_INV 0x2
449 #define LOGICOP_COPY_INV 0x3
450 #define LOGICOP_AND_RVRSE 0x4
451 #define LOGICOP_INV 0x5
452 #define LOGICOP_XOR 0x6
453 #define LOGICOP_NAND 0x7
454 #define LOGICOP_AND 0x8
455 #define LOGICOP_EQUIV 0x9
456 #define LOGICOP_NOOP 0xa
457 #define LOGICOP_OR_INV 0xb
458 #define LOGICOP_COPY 0xc
459 #define LOGICOP_OR_RVRSE 0xd
460 #define LOGICOP_OR 0xe
461 #define LOGICOP_SET 0xf
463 #define BLENDFACT_ZERO 0x01
464 #define BLENDFACT_ONE 0x02
465 #define BLENDFACT_SRC_COLR 0x03
466 #define BLENDFACT_INV_SRC_COLR 0x04
467 #define BLENDFACT_SRC_ALPHA 0x05
468 #define BLENDFACT_INV_SRC_ALPHA 0x06
469 #define BLENDFACT_DST_ALPHA 0x07
470 #define BLENDFACT_INV_DST_ALPHA 0x08
471 #define BLENDFACT_DST_COLR 0x09
472 #define BLENDFACT_INV_DST_COLR 0x0a
473 #define BLENDFACT_SRC_ALPHA_SATURATE 0x0b
474 #define BLENDFACT_CONST_COLOR 0x0c
475 #define BLENDFACT_INV_CONST_COLOR 0x0d
476 #define BLENDFACT_CONST_ALPHA 0x0e
477 #define BLENDFACT_INV_CONST_ALPHA 0x0f
478 #define BLENDFACT_MASK 0x0f
481 DRI_CONF_BO_REUSE_DISABLED
,
482 DRI_CONF_BO_REUSE_ALL
485 extern int intel_translate_shadow_compare_func(GLenum func
);
486 extern int intel_translate_compare_func(GLenum func
);
487 extern int intel_translate_stencil_op(GLenum op
);
488 extern int intel_translate_logic_op(GLenum opcode
);
490 void intel_update_renderbuffers(__DRIcontext
*context
,
491 __DRIdrawable
*drawable
);
492 void intel_prepare_render(struct intel_context
*intel
);
495 intel_resolve_for_dri2_flush(struct intel_context
*intel
,
496 __DRIdrawable
*drawable
);
498 void i915_set_buf_info_for_region(uint32_t *state
, struct intel_region
*region
,
500 void intel_init_texture_formats(struct gl_context
*ctx
);
502 /*======================================================================
503 * Inline conversion functions.
504 * These are better-typed than the macros used previously:
506 static INLINE
struct intel_context
*
507 intel_context(struct gl_context
* ctx
)
509 return (struct intel_context
*) ctx
;
513 is_power_of_two(uint32_t value
)
515 return (value
& (value
- 1)) == 0;