i965: Move intel_context::has_swizzling to brw_context.
[mesa.git] / src / mesa / drivers / dri / i965 / intel_context.h
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #ifndef INTELCONTEXT_INC
29 #define INTELCONTEXT_INC
30
31
32 #include <stdbool.h>
33 #include <string.h>
34 #include "main/mtypes.h"
35 #include "main/mm.h"
36
37 #ifdef __cplusplus
38 extern "C" {
39 /* Evil hack for using libdrm in a c++ compiler. */
40 #define virtual virt
41 #endif
42
43 #include "drm.h"
44 #include "intel_bufmgr.h"
45
46 #include "intel_screen.h"
47 #include "intel_tex_obj.h"
48 #include "i915_drm.h"
49
50 #ifdef __cplusplus
51 #undef virtual
52 #endif
53
54 #include "tnl/t_vertex.h"
55
56 struct intel_region;
57 struct intel_context;
58
59 #define INTEL_WRITE_PART 0x1
60 #define INTEL_WRITE_FULL 0x2
61 #define INTEL_READ 0x4
62
63 #ifndef likely
64 #ifdef __GNUC__
65 #define likely(expr) (__builtin_expect(expr, 1))
66 #define unlikely(expr) (__builtin_expect(expr, 0))
67 #else
68 #define likely(expr) (expr)
69 #define unlikely(expr) (expr)
70 #endif
71 #endif
72
73 struct intel_sync_object {
74 struct gl_sync_object Base;
75
76 /** Batch associated with this sync object */
77 drm_intel_bo *bo;
78 };
79
80 struct brw_context;
81
82 struct intel_batchbuffer {
83 /** Current batchbuffer being queued up. */
84 drm_intel_bo *bo;
85 /** Last BO submitted to the hardware. Used for glFinish(). */
86 drm_intel_bo *last_bo;
87 /** BO for post-sync nonzero writes for gen6 workaround. */
88 drm_intel_bo *workaround_bo;
89 bool need_workaround_flush;
90
91 struct cached_batch_item *cached_items;
92
93 uint16_t emit, total;
94 uint16_t used, reserved_space;
95 uint32_t *map;
96 uint32_t *cpu_map;
97 #define BATCH_SZ (8192*sizeof(uint32_t))
98
99 uint32_t state_batch_offset;
100 bool is_blit;
101 bool needs_sol_reset;
102
103 struct {
104 uint16_t used;
105 int reloc_count;
106 } saved;
107 };
108
109 /**
110 * intel_context is derived from Mesa's context class: struct gl_context.
111 */
112 struct intel_context
113 {
114 struct gl_context ctx; /**< base class, must be first field */
115
116 /**
117 * Generation number of the hardware: 2 is 8xx, 3 is 9xx pre-965, 4 is 965.
118 */
119 int gen;
120 int gt;
121 bool is_haswell;
122 bool is_baytrail;
123 bool is_g4x;
124 bool has_separate_stencil;
125 bool must_use_separate_stencil;
126 bool has_hiz;
127 bool has_llc;
128 };
129
130 /**
131 * Align a value down to an alignment value
132 *
133 * If \c value is not already aligned to the requested alignment value, it
134 * will be rounded down.
135 *
136 * \param value Value to be rounded
137 * \param alignment Alignment value to be used. This must be a power of two.
138 *
139 * \sa ALIGN()
140 */
141 #define ROUND_DOWN_TO(value, alignment) ((value) & ~(alignment - 1))
142
143 static INLINE uint32_t
144 U_FIXED(float value, uint32_t frac_bits)
145 {
146 value *= (1 << frac_bits);
147 return value < 0 ? 0 : value;
148 }
149
150 static INLINE uint32_t
151 S_FIXED(float value, uint32_t frac_bits)
152 {
153 return value * (1 << frac_bits);
154 }
155
156 /* ================================================================
157 * From linux kernel i386 header files, copes with odd sizes better
158 * than COPY_DWORDS would:
159 * XXX Put this in src/mesa/main/imports.h ???
160 */
161 #if defined(i386) || defined(__i386__)
162 static INLINE void * __memcpy(void * to, const void * from, size_t n)
163 {
164 int d0, d1, d2;
165 __asm__ __volatile__(
166 "rep ; movsl\n\t"
167 "testb $2,%b4\n\t"
168 "je 1f\n\t"
169 "movsw\n"
170 "1:\ttestb $1,%b4\n\t"
171 "je 2f\n\t"
172 "movsb\n"
173 "2:"
174 : "=&c" (d0), "=&D" (d1), "=&S" (d2)
175 :"0" (n/4), "q" (n),"1" ((long) to),"2" ((long) from)
176 : "memory");
177 return (to);
178 }
179 #else
180 #define __memcpy(a,b,c) memcpy(a,b,c)
181 #endif
182
183
184 /* ================================================================
185 * Debugging:
186 */
187 extern int INTEL_DEBUG;
188
189 #define DEBUG_TEXTURE 0x1
190 #define DEBUG_STATE 0x2
191 #define DEBUG_IOCTL 0x4
192 #define DEBUG_BLIT 0x8
193 #define DEBUG_MIPTREE 0x10
194 #define DEBUG_PERF 0x20
195 #define DEBUG_BATCH 0x80
196 #define DEBUG_PIXEL 0x100
197 #define DEBUG_BUFMGR 0x200
198 #define DEBUG_REGION 0x400
199 #define DEBUG_FBO 0x800
200 #define DEBUG_GS 0x1000
201 #define DEBUG_SYNC 0x2000
202 #define DEBUG_PRIMS 0x4000
203 #define DEBUG_VERTS 0x8000
204 #define DEBUG_DRI 0x10000
205 #define DEBUG_SF 0x20000
206 #define DEBUG_STATS 0x100000
207 #define DEBUG_WM 0x400000
208 #define DEBUG_URB 0x800000
209 #define DEBUG_VS 0x1000000
210 #define DEBUG_CLIP 0x2000000
211 #define DEBUG_AUB 0x4000000
212 #define DEBUG_SHADER_TIME 0x8000000
213 #define DEBUG_BLORP 0x10000000
214 #define DEBUG_NO16 0x20000000
215
216 #ifdef HAVE_ANDROID_PLATFORM
217 #define LOG_TAG "INTEL-MESA"
218 #include <cutils/log.h>
219 #ifndef ALOGW
220 #define ALOGW LOGW
221 #endif
222 #define dbg_printf(...) ALOGW(__VA_ARGS__)
223 #else
224 #define dbg_printf(...) printf(__VA_ARGS__)
225 #endif /* HAVE_ANDROID_PLATFORM */
226
227 #define DBG(...) do { \
228 if (unlikely(INTEL_DEBUG & FILE_DEBUG_FLAG)) \
229 dbg_printf(__VA_ARGS__); \
230 } while(0)
231
232 #define perf_debug(...) do { \
233 static GLuint msg_id = 0; \
234 if (unlikely(INTEL_DEBUG & DEBUG_PERF)) \
235 dbg_printf(__VA_ARGS__); \
236 if (brw->perf_debug) \
237 _mesa_gl_debug(&brw->intel.ctx, &msg_id, \
238 MESA_DEBUG_TYPE_PERFORMANCE, \
239 MESA_DEBUG_SEVERITY_MEDIUM, \
240 __VA_ARGS__); \
241 } while(0)
242
243 #define WARN_ONCE(cond, fmt...) do { \
244 if (unlikely(cond)) { \
245 static bool _warned = false; \
246 static GLuint msg_id = 0; \
247 if (!_warned) { \
248 fprintf(stderr, "WARNING: "); \
249 fprintf(stderr, fmt); \
250 _warned = true; \
251 \
252 _mesa_gl_debug(ctx, &msg_id, \
253 MESA_DEBUG_TYPE_OTHER, \
254 MESA_DEBUG_SEVERITY_HIGH, fmt); \
255 } \
256 } \
257 } while (0)
258
259 /* ================================================================
260 * intel_context.c:
261 */
262
263 extern bool intelInitContext(struct brw_context *brw,
264 int api,
265 unsigned major_version,
266 unsigned minor_version,
267 const struct gl_config * mesaVis,
268 __DRIcontext * driContextPriv,
269 void *sharedContextPrivate,
270 struct dd_function_table *functions,
271 unsigned *dri_ctx_error);
272
273 extern void intelFinish(struct gl_context * ctx);
274 extern void _intel_flush(struct gl_context * ctx, const char *file, int line);
275
276 #define intel_flush(ctx) _intel_flush(ctx, __FILE__, __LINE__)
277
278 extern void intelInitDriverFunctions(struct dd_function_table *functions);
279
280 void intel_init_syncobj_functions(struct dd_function_table *functions);
281
282 enum {
283 DRI_CONF_BO_REUSE_DISABLED,
284 DRI_CONF_BO_REUSE_ALL
285 };
286
287 extern int intel_translate_shadow_compare_func(GLenum func);
288 extern int intel_translate_compare_func(GLenum func);
289 extern int intel_translate_stencil_op(GLenum op);
290 extern int intel_translate_logic_op(GLenum opcode);
291
292 void intel_update_renderbuffers(__DRIcontext *context,
293 __DRIdrawable *drawable);
294 void intel_prepare_render(struct brw_context *brw);
295
296 void
297 intel_resolve_for_dri2_flush(struct brw_context *brw,
298 __DRIdrawable *drawable);
299
300 extern void
301 intelInitExtensions(struct gl_context *ctx);
302 extern void
303 intelInitClearFuncs(struct dd_function_table *functions);
304
305 /*======================================================================
306 * Inline conversion functions.
307 * These are better-typed than the macros used previously:
308 */
309 static INLINE struct intel_context *
310 intel_context(struct gl_context * ctx)
311 {
312 return (struct intel_context *) ctx;
313 }
314
315 static INLINE bool
316 is_power_of_two(uint32_t value)
317 {
318 return (value & (value - 1)) == 0;
319 }
320
321 #ifdef __cplusplus
322 }
323 #endif
324
325 #endif