i965: Move intel_context's driconf flags to brw_context.
[mesa.git] / src / mesa / drivers / dri / i965 / intel_context.h
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #ifndef INTELCONTEXT_INC
29 #define INTELCONTEXT_INC
30
31
32 #include <stdbool.h>
33 #include <string.h>
34 #include "main/mtypes.h"
35 #include "main/mm.h"
36
37 #ifdef __cplusplus
38 extern "C" {
39 /* Evil hack for using libdrm in a c++ compiler. */
40 #define virtual virt
41 #endif
42
43 #include "drm.h"
44 #include "intel_bufmgr.h"
45
46 #include "intel_screen.h"
47 #include "intel_tex_obj.h"
48 #include "i915_drm.h"
49
50 #ifdef __cplusplus
51 #undef virtual
52 #endif
53
54 #include "tnl/t_vertex.h"
55
56 struct intel_region;
57 struct intel_context;
58
59 #define INTEL_WRITE_PART 0x1
60 #define INTEL_WRITE_FULL 0x2
61 #define INTEL_READ 0x4
62
63 #ifndef likely
64 #ifdef __GNUC__
65 #define likely(expr) (__builtin_expect(expr, 1))
66 #define unlikely(expr) (__builtin_expect(expr, 0))
67 #else
68 #define likely(expr) (expr)
69 #define unlikely(expr) (expr)
70 #endif
71 #endif
72
73 struct intel_sync_object {
74 struct gl_sync_object Base;
75
76 /** Batch associated with this sync object */
77 drm_intel_bo *bo;
78 };
79
80 struct brw_context;
81
82 struct intel_batchbuffer {
83 /** Current batchbuffer being queued up. */
84 drm_intel_bo *bo;
85 /** Last BO submitted to the hardware. Used for glFinish(). */
86 drm_intel_bo *last_bo;
87 /** BO for post-sync nonzero writes for gen6 workaround. */
88 drm_intel_bo *workaround_bo;
89 bool need_workaround_flush;
90
91 struct cached_batch_item *cached_items;
92
93 uint16_t emit, total;
94 uint16_t used, reserved_space;
95 uint32_t *map;
96 uint32_t *cpu_map;
97 #define BATCH_SZ (8192*sizeof(uint32_t))
98
99 uint32_t state_batch_offset;
100 bool is_blit;
101 bool needs_sol_reset;
102
103 struct {
104 uint16_t used;
105 int reloc_count;
106 } saved;
107 };
108
109 /**
110 * intel_context is derived from Mesa's context class: struct gl_context.
111 */
112 struct intel_context
113 {
114 struct gl_context ctx; /**< base class, must be first field */
115
116 GLuint NewGLState;
117
118 dri_bufmgr *bufmgr;
119
120 /**
121 * Generation number of the hardware: 2 is 8xx, 3 is 9xx pre-965, 4 is 965.
122 */
123 int gen;
124 int gt;
125 bool is_haswell;
126 bool is_baytrail;
127 bool is_g4x;
128 bool has_separate_stencil;
129 bool must_use_separate_stencil;
130 bool has_hiz;
131 bool has_llc;
132 bool has_swizzling;
133
134 drm_intel_context *hw_ctx;
135
136 struct intel_batchbuffer batch;
137
138 drm_intel_bo *first_post_swapbuffers_batch;
139 bool need_throttle;
140 bool no_batch_wrap;
141
142 /**
143 * Set if we're either a debug context or the INTEL_DEBUG=perf environment
144 * variable is set, this is the flag indicating to do expensive work that
145 * might lead to a perf_debug() call.
146 */
147 bool perf_debug;
148
149 struct {
150 drm_intel_bo *bo;
151 GLuint offset;
152 uint32_t buffer_len;
153 uint32_t buffer_offset;
154 char buffer[4096];
155 } upload;
156
157 uint32_t max_gtt_map_object_size;
158
159 GLuint stats_wm;
160
161 int driFd;
162
163 __DRIcontext *driContext;
164 struct intel_screen *intelScreen;
165 };
166
167 /**
168 * Align a value down to an alignment value
169 *
170 * If \c value is not already aligned to the requested alignment value, it
171 * will be rounded down.
172 *
173 * \param value Value to be rounded
174 * \param alignment Alignment value to be used. This must be a power of two.
175 *
176 * \sa ALIGN()
177 */
178 #define ROUND_DOWN_TO(value, alignment) ((value) & ~(alignment - 1))
179
180 static INLINE uint32_t
181 U_FIXED(float value, uint32_t frac_bits)
182 {
183 value *= (1 << frac_bits);
184 return value < 0 ? 0 : value;
185 }
186
187 static INLINE uint32_t
188 S_FIXED(float value, uint32_t frac_bits)
189 {
190 return value * (1 << frac_bits);
191 }
192
193 /* ================================================================
194 * From linux kernel i386 header files, copes with odd sizes better
195 * than COPY_DWORDS would:
196 * XXX Put this in src/mesa/main/imports.h ???
197 */
198 #if defined(i386) || defined(__i386__)
199 static INLINE void * __memcpy(void * to, const void * from, size_t n)
200 {
201 int d0, d1, d2;
202 __asm__ __volatile__(
203 "rep ; movsl\n\t"
204 "testb $2,%b4\n\t"
205 "je 1f\n\t"
206 "movsw\n"
207 "1:\ttestb $1,%b4\n\t"
208 "je 2f\n\t"
209 "movsb\n"
210 "2:"
211 : "=&c" (d0), "=&D" (d1), "=&S" (d2)
212 :"0" (n/4), "q" (n),"1" ((long) to),"2" ((long) from)
213 : "memory");
214 return (to);
215 }
216 #else
217 #define __memcpy(a,b,c) memcpy(a,b,c)
218 #endif
219
220
221 /* ================================================================
222 * Debugging:
223 */
224 extern int INTEL_DEBUG;
225
226 #define DEBUG_TEXTURE 0x1
227 #define DEBUG_STATE 0x2
228 #define DEBUG_IOCTL 0x4
229 #define DEBUG_BLIT 0x8
230 #define DEBUG_MIPTREE 0x10
231 #define DEBUG_PERF 0x20
232 #define DEBUG_BATCH 0x80
233 #define DEBUG_PIXEL 0x100
234 #define DEBUG_BUFMGR 0x200
235 #define DEBUG_REGION 0x400
236 #define DEBUG_FBO 0x800
237 #define DEBUG_GS 0x1000
238 #define DEBUG_SYNC 0x2000
239 #define DEBUG_PRIMS 0x4000
240 #define DEBUG_VERTS 0x8000
241 #define DEBUG_DRI 0x10000
242 #define DEBUG_SF 0x20000
243 #define DEBUG_STATS 0x100000
244 #define DEBUG_WM 0x400000
245 #define DEBUG_URB 0x800000
246 #define DEBUG_VS 0x1000000
247 #define DEBUG_CLIP 0x2000000
248 #define DEBUG_AUB 0x4000000
249 #define DEBUG_SHADER_TIME 0x8000000
250 #define DEBUG_BLORP 0x10000000
251 #define DEBUG_NO16 0x20000000
252
253 #ifdef HAVE_ANDROID_PLATFORM
254 #define LOG_TAG "INTEL-MESA"
255 #include <cutils/log.h>
256 #ifndef ALOGW
257 #define ALOGW LOGW
258 #endif
259 #define dbg_printf(...) ALOGW(__VA_ARGS__)
260 #else
261 #define dbg_printf(...) printf(__VA_ARGS__)
262 #endif /* HAVE_ANDROID_PLATFORM */
263
264 #define DBG(...) do { \
265 if (unlikely(INTEL_DEBUG & FILE_DEBUG_FLAG)) \
266 dbg_printf(__VA_ARGS__); \
267 } while(0)
268
269 #define perf_debug(...) do { \
270 static GLuint msg_id = 0; \
271 if (unlikely(INTEL_DEBUG & DEBUG_PERF)) \
272 dbg_printf(__VA_ARGS__); \
273 if (intel->perf_debug) \
274 _mesa_gl_debug(&intel->ctx, &msg_id, \
275 MESA_DEBUG_TYPE_PERFORMANCE, \
276 MESA_DEBUG_SEVERITY_MEDIUM, \
277 __VA_ARGS__); \
278 } while(0)
279
280 #define WARN_ONCE(cond, fmt...) do { \
281 if (unlikely(cond)) { \
282 static bool _warned = false; \
283 static GLuint msg_id = 0; \
284 if (!_warned) { \
285 fprintf(stderr, "WARNING: "); \
286 fprintf(stderr, fmt); \
287 _warned = true; \
288 \
289 _mesa_gl_debug(ctx, &msg_id, \
290 MESA_DEBUG_TYPE_OTHER, \
291 MESA_DEBUG_SEVERITY_HIGH, fmt); \
292 } \
293 } \
294 } while (0)
295
296 /* ================================================================
297 * intel_context.c:
298 */
299
300 extern bool intelInitContext(struct brw_context *brw,
301 int api,
302 unsigned major_version,
303 unsigned minor_version,
304 const struct gl_config * mesaVis,
305 __DRIcontext * driContextPriv,
306 void *sharedContextPrivate,
307 struct dd_function_table *functions,
308 unsigned *dri_ctx_error);
309
310 extern void intelFinish(struct gl_context * ctx);
311 extern void _intel_flush(struct gl_context * ctx, const char *file, int line);
312
313 #define intel_flush(ctx) _intel_flush(ctx, __FILE__, __LINE__)
314
315 extern void intelInitDriverFunctions(struct dd_function_table *functions);
316
317 void intel_init_syncobj_functions(struct dd_function_table *functions);
318
319 enum {
320 DRI_CONF_BO_REUSE_DISABLED,
321 DRI_CONF_BO_REUSE_ALL
322 };
323
324 extern int intel_translate_shadow_compare_func(GLenum func);
325 extern int intel_translate_compare_func(GLenum func);
326 extern int intel_translate_stencil_op(GLenum op);
327 extern int intel_translate_logic_op(GLenum opcode);
328
329 void intel_update_renderbuffers(__DRIcontext *context,
330 __DRIdrawable *drawable);
331 void intel_prepare_render(struct brw_context *brw);
332
333 void
334 intel_resolve_for_dri2_flush(struct brw_context *brw,
335 __DRIdrawable *drawable);
336
337 extern void
338 intelInitExtensions(struct gl_context *ctx);
339 extern void
340 intelInitClearFuncs(struct dd_function_table *functions);
341
342 /*======================================================================
343 * Inline conversion functions.
344 * These are better-typed than the macros used previously:
345 */
346 static INLINE struct intel_context *
347 intel_context(struct gl_context * ctx)
348 {
349 return (struct intel_context *) ctx;
350 }
351
352 static INLINE bool
353 is_power_of_two(uint32_t value)
354 {
355 return (value & (value - 1)) == 0;
356 }
357
358 #ifdef __cplusplus
359 }
360 #endif
361
362 #endif