i965: Fix typos in license
[mesa.git] / src / mesa / drivers / dri / i965 / intel_fbo.c
1 /*
2 * Copyright 2006 VMware, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial portions
15 * of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
18 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
21 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
22 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
23 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 */
25
26 #include "main/enums.h"
27 #include "main/imports.h"
28 #include "main/macros.h"
29 #include "main/mtypes.h"
30 #include "main/fbobject.h"
31 #include "main/framebuffer.h"
32 #include "main/renderbuffer.h"
33 #include "main/context.h"
34 #include "main/teximage.h"
35 #include "main/image.h"
36 #include "main/condrender.h"
37 #include "util/hash_table.h"
38 #include "util/set.h"
39
40 #include "swrast/swrast.h"
41 #include "drivers/common/meta.h"
42
43 #include "intel_batchbuffer.h"
44 #include "intel_buffers.h"
45 #include "intel_blit.h"
46 #include "intel_fbo.h"
47 #include "intel_mipmap_tree.h"
48 #include "intel_image.h"
49 #include "intel_screen.h"
50 #include "intel_tex.h"
51 #include "brw_context.h"
52
53 #define FILE_DEBUG_FLAG DEBUG_FBO
54
55 /**
56 * Create a new framebuffer object.
57 */
58 static struct gl_framebuffer *
59 intel_new_framebuffer(struct gl_context * ctx, GLuint name)
60 {
61 /* Only drawable state in intel_framebuffer at this time, just use Mesa's
62 * class
63 */
64 return _mesa_new_framebuffer(ctx, name);
65 }
66
67
68 /** Called by gl_renderbuffer::Delete() */
69 static void
70 intel_delete_renderbuffer(struct gl_context *ctx, struct gl_renderbuffer *rb)
71 {
72 struct intel_renderbuffer *irb = intel_renderbuffer(rb);
73
74 assert(irb);
75
76 intel_miptree_release(&irb->mt);
77 intel_miptree_release(&irb->singlesample_mt);
78
79 _mesa_delete_renderbuffer(ctx, rb);
80 }
81
82 /**
83 * \brief Downsample a winsys renderbuffer from mt to singlesample_mt.
84 *
85 * If the miptree needs no downsample, then skip.
86 */
87 void
88 intel_renderbuffer_downsample(struct brw_context *brw,
89 struct intel_renderbuffer *irb)
90 {
91 if (!irb->need_downsample)
92 return;
93 intel_miptree_updownsample(brw, irb->mt, irb->singlesample_mt);
94 irb->need_downsample = false;
95 }
96
97 /**
98 * \brief Upsample a winsys renderbuffer from singlesample_mt to mt.
99 *
100 * The upsample is done unconditionally.
101 */
102 void
103 intel_renderbuffer_upsample(struct brw_context *brw,
104 struct intel_renderbuffer *irb)
105 {
106 assert(!irb->need_downsample);
107
108 intel_miptree_updownsample(brw, irb->singlesample_mt, irb->mt);
109 }
110
111 /**
112 * \see dd_function_table::MapRenderbuffer
113 */
114 static void
115 intel_map_renderbuffer(struct gl_context *ctx,
116 struct gl_renderbuffer *rb,
117 GLuint x, GLuint y, GLuint w, GLuint h,
118 GLbitfield mode,
119 GLubyte **out_map,
120 GLint *out_stride)
121 {
122 struct brw_context *brw = brw_context(ctx);
123 struct swrast_renderbuffer *srb = (struct swrast_renderbuffer *)rb;
124 struct intel_renderbuffer *irb = intel_renderbuffer(rb);
125 struct intel_mipmap_tree *mt;
126 void *map;
127 ptrdiff_t stride;
128
129 if (srb->Buffer) {
130 /* this is a malloc'd renderbuffer (accum buffer), not an irb */
131 GLint bpp = _mesa_get_format_bytes(rb->Format);
132 GLint rowStride = srb->RowStride;
133 *out_map = (GLubyte *) srb->Buffer + y * rowStride + x * bpp;
134 *out_stride = rowStride;
135 return;
136 }
137
138 intel_prepare_render(brw);
139
140 /* The MapRenderbuffer API should always return a single-sampled mapping.
141 * The case we are asked to map multisampled RBs is in glReadPixels() (or
142 * swrast paths like glCopyTexImage()) from a window-system MSAA buffer,
143 * and GL expects an automatic resolve to happen.
144 *
145 * If it's a color miptree, there is a ->singlesample_mt which wraps the
146 * actual window system renderbuffer (which we may resolve to at any time),
147 * while the miptree itself is our driver-private allocation. If it's a
148 * depth or stencil miptree, we have a private MSAA buffer and no shared
149 * singlesample buffer, and since we don't expect anybody to ever actually
150 * resolve it, we just make a temporary singlesample buffer now when we
151 * have to.
152 */
153 if (rb->NumSamples > 1) {
154 if (!irb->singlesample_mt) {
155 irb->singlesample_mt =
156 intel_miptree_create_for_renderbuffer(brw, irb->mt->format,
157 rb->Width, rb->Height,
158 0 /*num_samples*/);
159 if (!irb->singlesample_mt)
160 goto fail;
161 irb->singlesample_mt_is_tmp = true;
162 irb->need_downsample = true;
163 }
164
165 intel_renderbuffer_downsample(brw, irb);
166 mt = irb->singlesample_mt;
167
168 irb->need_map_upsample = mode & GL_MAP_WRITE_BIT;
169 } else {
170 mt = irb->mt;
171 }
172
173 /* For a window-system renderbuffer, we need to flip the mapping we receive
174 * upside-down. So we need to ask for a rectangle on flipped vertically, and
175 * we then return a pointer to the bottom of it with a negative stride.
176 */
177 if (rb->Name == 0) {
178 y = rb->Height - y - h;
179 }
180
181 intel_miptree_map(brw, mt, irb->mt_level, irb->mt_layer,
182 x, y, w, h, mode, &map, &stride);
183
184 if (rb->Name == 0) {
185 map += (h - 1) * stride;
186 stride = -stride;
187 }
188
189 DBG("%s: rb %d (%s) mt mapped: (%d, %d) (%dx%d) -> %p/%"PRIdPTR"\n",
190 __func__, rb->Name, _mesa_get_format_name(rb->Format),
191 x, y, w, h, map, stride);
192
193 *out_map = map;
194 *out_stride = stride;
195 return;
196
197 fail:
198 *out_map = NULL;
199 *out_stride = 0;
200 }
201
202 /**
203 * \see dd_function_table::UnmapRenderbuffer
204 */
205 static void
206 intel_unmap_renderbuffer(struct gl_context *ctx,
207 struct gl_renderbuffer *rb)
208 {
209 struct brw_context *brw = brw_context(ctx);
210 struct swrast_renderbuffer *srb = (struct swrast_renderbuffer *)rb;
211 struct intel_renderbuffer *irb = intel_renderbuffer(rb);
212 struct intel_mipmap_tree *mt;
213
214 DBG("%s: rb %d (%s)\n", __func__,
215 rb->Name, _mesa_get_format_name(rb->Format));
216
217 if (srb->Buffer) {
218 /* this is a malloc'd renderbuffer (accum buffer) */
219 /* nothing to do */
220 return;
221 }
222
223 if (rb->NumSamples > 1) {
224 mt = irb->singlesample_mt;
225 } else {
226 mt = irb->mt;
227 }
228
229 intel_miptree_unmap(brw, mt, irb->mt_level, irb->mt_layer);
230
231 if (irb->need_map_upsample) {
232 intel_renderbuffer_upsample(brw, irb);
233 irb->need_map_upsample = false;
234 }
235
236 if (irb->singlesample_mt_is_tmp)
237 intel_miptree_release(&irb->singlesample_mt);
238 }
239
240
241 /**
242 * Round up the requested multisample count to the next supported sample size.
243 */
244 unsigned
245 intel_quantize_num_samples(struct intel_screen *intel, unsigned num_samples)
246 {
247 const int *msaa_modes = intel_supported_msaa_modes(intel);
248 int quantized_samples = 0;
249
250 for (int i = 0; msaa_modes[i] != -1; ++i) {
251 if (msaa_modes[i] >= num_samples)
252 quantized_samples = msaa_modes[i];
253 else
254 break;
255 }
256
257 return quantized_samples;
258 }
259
260 static mesa_format
261 intel_renderbuffer_format(struct gl_context * ctx, GLenum internalFormat)
262 {
263 struct brw_context *brw = brw_context(ctx);
264
265 switch (internalFormat) {
266 default:
267 /* Use the same format-choice logic as for textures.
268 * Renderbuffers aren't any different from textures for us,
269 * except they're less useful because you can't texture with
270 * them.
271 */
272 return ctx->Driver.ChooseTextureFormat(ctx, GL_TEXTURE_2D,
273 internalFormat,
274 GL_NONE, GL_NONE);
275 break;
276 case GL_STENCIL_INDEX:
277 case GL_STENCIL_INDEX1_EXT:
278 case GL_STENCIL_INDEX4_EXT:
279 case GL_STENCIL_INDEX8_EXT:
280 case GL_STENCIL_INDEX16_EXT:
281 /* These aren't actual texture formats, so force them here. */
282 if (brw->has_separate_stencil) {
283 return MESA_FORMAT_S_UINT8;
284 } else {
285 assert(!brw->must_use_separate_stencil);
286 return MESA_FORMAT_Z24_UNORM_S8_UINT;
287 }
288 }
289 }
290
291 static GLboolean
292 intel_alloc_private_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffer *rb,
293 GLenum internalFormat,
294 GLuint width, GLuint height)
295 {
296 struct brw_context *brw = brw_context(ctx);
297 struct intel_screen *screen = brw->intelScreen;
298 struct intel_renderbuffer *irb = intel_renderbuffer(rb);
299
300 assert(rb->Format != MESA_FORMAT_NONE);
301
302 rb->NumSamples = intel_quantize_num_samples(screen, rb->NumSamples);
303 rb->Width = width;
304 rb->Height = height;
305 rb->_BaseFormat = _mesa_base_fbo_format(ctx, internalFormat);
306
307 intel_miptree_release(&irb->mt);
308
309 DBG("%s: %s: %s (%dx%d)\n", __func__,
310 _mesa_enum_to_string(internalFormat),
311 _mesa_get_format_name(rb->Format), width, height);
312
313 if (width == 0 || height == 0)
314 return true;
315
316 irb->mt = intel_miptree_create_for_renderbuffer(brw, rb->Format,
317 width, height,
318 rb->NumSamples);
319 if (!irb->mt)
320 return false;
321
322 irb->layer_count = 1;
323
324 return true;
325 }
326
327 /**
328 * Called via glRenderbufferStorageEXT() to set the format and allocate
329 * storage for a user-created renderbuffer.
330 */
331 static GLboolean
332 intel_alloc_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffer *rb,
333 GLenum internalFormat,
334 GLuint width, GLuint height)
335 {
336 rb->Format = intel_renderbuffer_format(ctx, internalFormat);
337 return intel_alloc_private_renderbuffer_storage(ctx, rb, internalFormat, width, height);
338 }
339
340 static void
341 intel_image_target_renderbuffer_storage(struct gl_context *ctx,
342 struct gl_renderbuffer *rb,
343 void *image_handle)
344 {
345 struct brw_context *brw = brw_context(ctx);
346 struct intel_renderbuffer *irb;
347 __DRIscreen *screen;
348 __DRIimage *image;
349
350 screen = brw->intelScreen->driScrnPriv;
351 image = screen->dri2.image->lookupEGLImage(screen, image_handle,
352 screen->loaderPrivate);
353 if (image == NULL)
354 return;
355
356 if (image->planar_format && image->planar_format->nplanes > 1) {
357 _mesa_error(ctx, GL_INVALID_OPERATION,
358 "glEGLImageTargetRenderbufferStorage(planar buffers are not "
359 "supported as render targets.");
360 return;
361 }
362
363 /* __DRIimage is opaque to the core so it has to be checked here */
364 switch (image->format) {
365 case MESA_FORMAT_R8G8B8A8_UNORM:
366 _mesa_error(ctx, GL_INVALID_OPERATION,
367 "glEGLImageTargetRenderbufferStorage(unsupported image format");
368 return;
369 break;
370 default:
371 break;
372 }
373
374 irb = intel_renderbuffer(rb);
375 intel_miptree_release(&irb->mt);
376
377 /* Disable creation of the miptree's aux buffers because the driver exposes
378 * no EGL API to manage them. That is, there is no API for resolving the aux
379 * buffer's content to the main buffer nor for invalidating the aux buffer's
380 * content.
381 */
382 irb->mt = intel_miptree_create_for_bo(brw,
383 image->bo,
384 image->format,
385 image->offset,
386 image->width,
387 image->height,
388 1,
389 image->pitch,
390 MIPTREE_LAYOUT_DISABLE_AUX);
391 if (!irb->mt)
392 return;
393
394 rb->InternalFormat = image->internal_format;
395 rb->Width = image->width;
396 rb->Height = image->height;
397 rb->Format = image->format;
398 rb->_BaseFormat = _mesa_get_format_base_format(image->format);
399 rb->NeedsFinishRenderTexture = true;
400 irb->layer_count = 1;
401 }
402
403 /**
404 * Called by _mesa_resize_framebuffer() for each hardware renderbuffer when a
405 * window system framebuffer is resized.
406 *
407 * Any actual buffer reallocations for hardware renderbuffers (which would
408 * have triggered _mesa_resize_framebuffer()) were done by
409 * intel_process_dri2_buffer().
410 */
411 static GLboolean
412 intel_alloc_window_storage(struct gl_context * ctx, struct gl_renderbuffer *rb,
413 GLenum internalFormat, GLuint width, GLuint height)
414 {
415 assert(rb->Name == 0);
416 rb->Width = width;
417 rb->Height = height;
418 rb->InternalFormat = internalFormat;
419
420 return true;
421 }
422
423 /** Dummy function for gl_renderbuffer::AllocStorage() */
424 static GLboolean
425 intel_nop_alloc_storage(struct gl_context * ctx, struct gl_renderbuffer *rb,
426 GLenum internalFormat, GLuint width, GLuint height)
427 {
428 _mesa_problem(ctx, "intel_nop_alloc_storage should never be called.");
429 return false;
430 }
431
432 /**
433 * Create a new intel_renderbuffer which corresponds to an on-screen window,
434 * not a user-created renderbuffer.
435 *
436 * \param num_samples must be quantized.
437 */
438 struct intel_renderbuffer *
439 intel_create_renderbuffer(mesa_format format, unsigned num_samples)
440 {
441 struct intel_renderbuffer *irb;
442 struct gl_renderbuffer *rb;
443
444 GET_CURRENT_CONTEXT(ctx);
445
446 irb = CALLOC_STRUCT(intel_renderbuffer);
447 if (!irb) {
448 _mesa_error(ctx, GL_OUT_OF_MEMORY, "creating renderbuffer");
449 return NULL;
450 }
451
452 rb = &irb->Base.Base;
453 irb->layer_count = 1;
454
455 _mesa_init_renderbuffer(rb, 0);
456 rb->ClassID = INTEL_RB_CLASS;
457 rb->_BaseFormat = _mesa_get_format_base_format(format);
458 rb->Format = format;
459 rb->InternalFormat = rb->_BaseFormat;
460 rb->NumSamples = num_samples;
461
462 /* intel-specific methods */
463 rb->Delete = intel_delete_renderbuffer;
464 rb->AllocStorage = intel_alloc_window_storage;
465
466 return irb;
467 }
468
469 /**
470 * Private window-system buffers (as opposed to ones shared with the display
471 * server created with intel_create_renderbuffer()) are most similar in their
472 * handling to user-created renderbuffers, but they have a resize handler that
473 * may be called at intel_update_renderbuffers() time.
474 *
475 * \param num_samples must be quantized.
476 */
477 struct intel_renderbuffer *
478 intel_create_private_renderbuffer(mesa_format format, unsigned num_samples)
479 {
480 struct intel_renderbuffer *irb;
481
482 irb = intel_create_renderbuffer(format, num_samples);
483 irb->Base.Base.AllocStorage = intel_alloc_private_renderbuffer_storage;
484
485 return irb;
486 }
487
488 /**
489 * Create a new renderbuffer object.
490 * Typically called via glBindRenderbufferEXT().
491 */
492 static struct gl_renderbuffer *
493 intel_new_renderbuffer(struct gl_context * ctx, GLuint name)
494 {
495 struct intel_renderbuffer *irb;
496 struct gl_renderbuffer *rb;
497
498 irb = CALLOC_STRUCT(intel_renderbuffer);
499 if (!irb) {
500 _mesa_error(ctx, GL_OUT_OF_MEMORY, "creating renderbuffer");
501 return NULL;
502 }
503
504 rb = &irb->Base.Base;
505
506 _mesa_init_renderbuffer(rb, name);
507 rb->ClassID = INTEL_RB_CLASS;
508
509 /* intel-specific methods */
510 rb->Delete = intel_delete_renderbuffer;
511 rb->AllocStorage = intel_alloc_renderbuffer_storage;
512 /* span routines set in alloc_storage function */
513
514 return rb;
515 }
516
517 static bool
518 intel_renderbuffer_update_wrapper(struct brw_context *brw,
519 struct intel_renderbuffer *irb,
520 struct gl_texture_image *image,
521 uint32_t layer,
522 bool layered)
523 {
524 struct gl_renderbuffer *rb = &irb->Base.Base;
525 struct intel_texture_image *intel_image = intel_texture_image(image);
526 struct intel_mipmap_tree *mt = intel_image->mt;
527 int level = image->Level;
528
529 rb->AllocStorage = intel_nop_alloc_storage;
530
531 /* adjust for texture view parameters */
532 layer += image->TexObject->MinLayer;
533 level += image->TexObject->MinLevel;
534
535 intel_miptree_check_level_layer(mt, level, layer);
536 irb->mt_level = level;
537
538 int layer_multiplier;
539 switch (mt->msaa_layout) {
540 case INTEL_MSAA_LAYOUT_UMS:
541 case INTEL_MSAA_LAYOUT_CMS:
542 layer_multiplier = mt->num_samples;
543 break;
544
545 default:
546 layer_multiplier = 1;
547 }
548
549 irb->mt_layer = layer_multiplier * layer;
550
551 if (!layered) {
552 irb->layer_count = 1;
553 } else if (image->TexObject->NumLayers > 0) {
554 irb->layer_count = image->TexObject->NumLayers;
555 } else {
556 irb->layer_count = mt->level[level].depth / layer_multiplier;
557 }
558
559 intel_miptree_reference(&irb->mt, mt);
560
561 intel_renderbuffer_set_draw_offset(irb);
562
563 if (intel_miptree_wants_hiz_buffer(brw, mt)) {
564 intel_miptree_alloc_hiz(brw, mt);
565 if (!mt->hiz_buf)
566 return false;
567 }
568
569 return true;
570 }
571
572 void
573 intel_renderbuffer_set_draw_offset(struct intel_renderbuffer *irb)
574 {
575 unsigned int dst_x, dst_y;
576
577 /* compute offset of the particular 2D image within the texture region */
578 intel_miptree_get_image_offset(irb->mt,
579 irb->mt_level,
580 irb->mt_layer,
581 &dst_x, &dst_y);
582
583 irb->draw_x = dst_x;
584 irb->draw_y = dst_y;
585 }
586
587 /**
588 * Called by glFramebufferTexture[123]DEXT() (and other places) to
589 * prepare for rendering into texture memory. This might be called
590 * many times to choose different texture levels, cube faces, etc
591 * before intel_finish_render_texture() is ever called.
592 */
593 static void
594 intel_render_texture(struct gl_context * ctx,
595 struct gl_framebuffer *fb,
596 struct gl_renderbuffer_attachment *att)
597 {
598 struct brw_context *brw = brw_context(ctx);
599 struct gl_renderbuffer *rb = att->Renderbuffer;
600 struct intel_renderbuffer *irb = intel_renderbuffer(rb);
601 struct gl_texture_image *image = rb->TexImage;
602 struct intel_texture_image *intel_image = intel_texture_image(image);
603 struct intel_mipmap_tree *mt = intel_image->mt;
604 int layer;
605
606 (void) fb;
607
608 if (att->CubeMapFace > 0) {
609 assert(att->Zoffset == 0);
610 layer = att->CubeMapFace;
611 } else {
612 layer = att->Zoffset;
613 }
614
615 if (!intel_image->mt) {
616 /* Fallback on drawing to a texture that doesn't have a miptree
617 * (has a border, width/height 0, etc.)
618 */
619 _swrast_render_texture(ctx, fb, att);
620 return;
621 }
622
623 intel_miptree_check_level_layer(mt, att->TextureLevel, layer);
624
625 if (!intel_renderbuffer_update_wrapper(brw, irb, image, layer, att->Layered)) {
626 _swrast_render_texture(ctx, fb, att);
627 return;
628 }
629
630 DBG("Begin render %s texture tex=%u w=%d h=%d d=%d refcount=%d\n",
631 _mesa_get_format_name(image->TexFormat),
632 att->Texture->Name, image->Width, image->Height, image->Depth,
633 rb->RefCount);
634 }
635
636
637 #define fbo_incomplete(fb, ...) do { \
638 static GLuint msg_id = 0; \
639 if (unlikely(ctx->Const.ContextFlags & GL_CONTEXT_FLAG_DEBUG_BIT)) { \
640 _mesa_gl_debug(ctx, &msg_id, \
641 MESA_DEBUG_SOURCE_API, \
642 MESA_DEBUG_TYPE_OTHER, \
643 MESA_DEBUG_SEVERITY_MEDIUM, \
644 __VA_ARGS__); \
645 } \
646 DBG(__VA_ARGS__); \
647 fb->_Status = GL_FRAMEBUFFER_UNSUPPORTED; \
648 } while (0)
649
650 /**
651 * Do additional "completeness" testing of a framebuffer object.
652 */
653 static void
654 intel_validate_framebuffer(struct gl_context *ctx, struct gl_framebuffer *fb)
655 {
656 struct brw_context *brw = brw_context(ctx);
657 struct intel_renderbuffer *depthRb =
658 intel_get_renderbuffer(fb, BUFFER_DEPTH);
659 struct intel_renderbuffer *stencilRb =
660 intel_get_renderbuffer(fb, BUFFER_STENCIL);
661 struct intel_mipmap_tree *depth_mt = NULL, *stencil_mt = NULL;
662 unsigned i;
663
664 DBG("%s() on fb %p (%s)\n", __func__,
665 fb, (fb == ctx->DrawBuffer ? "drawbuffer" :
666 (fb == ctx->ReadBuffer ? "readbuffer" : "other buffer")));
667
668 if (depthRb)
669 depth_mt = depthRb->mt;
670 if (stencilRb) {
671 stencil_mt = stencilRb->mt;
672 if (stencil_mt->stencil_mt)
673 stencil_mt = stencil_mt->stencil_mt;
674 }
675
676 if (depth_mt && stencil_mt) {
677 if (brw->gen >= 6) {
678 /* For gen >= 6, we are using the lod/minimum-array-element fields
679 * and supporting layered rendering. This means that we must restrict
680 * the depth & stencil attachments to match in various more retrictive
681 * ways. (width, height, depth, LOD and layer)
682 */
683 if (depth_mt->physical_width0 != stencil_mt->physical_width0 ||
684 depth_mt->physical_height0 != stencil_mt->physical_height0 ||
685 depth_mt->physical_depth0 != stencil_mt->physical_depth0 ||
686 depthRb->mt_level != stencilRb->mt_level ||
687 depthRb->mt_layer != stencilRb->mt_layer) {
688 fbo_incomplete(fb,
689 "FBO incomplete: depth and stencil must match in"
690 "width, height, depth, LOD and layer\n");
691 }
692 }
693 if (depth_mt == stencil_mt) {
694 /* For true packed depth/stencil (not faked on prefers-separate-stencil
695 * hardware) we need to be sure they're the same level/layer, since
696 * we'll be emitting a single packet describing the packed setup.
697 */
698 if (depthRb->mt_level != stencilRb->mt_level ||
699 depthRb->mt_layer != stencilRb->mt_layer) {
700 fbo_incomplete(fb,
701 "FBO incomplete: depth image level/layer %d/%d != "
702 "stencil image %d/%d\n",
703 depthRb->mt_level,
704 depthRb->mt_layer,
705 stencilRb->mt_level,
706 stencilRb->mt_layer);
707 }
708 } else {
709 if (!brw->has_separate_stencil) {
710 fbo_incomplete(fb, "FBO incomplete: separate stencil "
711 "unsupported\n");
712 }
713 if (stencil_mt->format != MESA_FORMAT_S_UINT8) {
714 fbo_incomplete(fb, "FBO incomplete: separate stencil is %s "
715 "instead of S8\n",
716 _mesa_get_format_name(stencil_mt->format));
717 }
718 if (brw->gen < 7 && !intel_renderbuffer_has_hiz(depthRb)) {
719 /* Before Gen7, separate depth and stencil buffers can be used
720 * only if HiZ is enabled. From the Sandybridge PRM, Volume 2,
721 * Part 1, Bit 3DSTATE_DEPTH_BUFFER.SeparateStencilBufferEnable:
722 * [DevSNB]: This field must be set to the same value (enabled
723 * or disabled) as Hierarchical Depth Buffer Enable.
724 */
725 fbo_incomplete(fb, "FBO incomplete: separate stencil "
726 "without HiZ\n");
727 }
728 }
729 }
730
731 for (i = 0; i < ARRAY_SIZE(fb->Attachment); i++) {
732 struct gl_renderbuffer *rb;
733 struct intel_renderbuffer *irb;
734
735 if (fb->Attachment[i].Type == GL_NONE)
736 continue;
737
738 /* A supported attachment will have a Renderbuffer set either
739 * from being a Renderbuffer or being a texture that got the
740 * intel_wrap_texture() treatment.
741 */
742 rb = fb->Attachment[i].Renderbuffer;
743 if (rb == NULL) {
744 fbo_incomplete(fb, "FBO incomplete: attachment without "
745 "renderbuffer\n");
746 continue;
747 }
748
749 if (fb->Attachment[i].Type == GL_TEXTURE) {
750 if (rb->TexImage->Border) {
751 fbo_incomplete(fb, "FBO incomplete: texture with border\n");
752 continue;
753 }
754 }
755
756 irb = intel_renderbuffer(rb);
757 if (irb == NULL) {
758 fbo_incomplete(fb, "FBO incomplete: software rendering "
759 "renderbuffer\n");
760 continue;
761 }
762
763 if (!brw_render_target_supported(brw, rb)) {
764 fbo_incomplete(fb, "FBO incomplete: Unsupported HW "
765 "texture/renderbuffer format attached: %s\n",
766 _mesa_get_format_name(intel_rb_format(irb)));
767 }
768 }
769 }
770
771 /**
772 * Try to do a glBlitFramebuffer using glCopyTexSubImage2D
773 * We can do this when the dst renderbuffer is actually a texture and
774 * there is no scaling, mirroring or scissoring.
775 *
776 * \return new buffer mask indicating the buffers left to blit using the
777 * normal path.
778 */
779 static GLbitfield
780 intel_blit_framebuffer_with_blitter(struct gl_context *ctx,
781 const struct gl_framebuffer *readFb,
782 const struct gl_framebuffer *drawFb,
783 GLint srcX0, GLint srcY0,
784 GLint srcX1, GLint srcY1,
785 GLint dstX0, GLint dstY0,
786 GLint dstX1, GLint dstY1,
787 GLbitfield mask, GLenum filter)
788 {
789 struct brw_context *brw = brw_context(ctx);
790
791 /* Sync up the state of window system buffers. We need to do this before
792 * we go looking for the buffers.
793 */
794 intel_prepare_render(brw);
795
796 if (mask & GL_COLOR_BUFFER_BIT) {
797 unsigned i;
798 struct gl_renderbuffer *src_rb = readFb->_ColorReadBuffer;
799 struct intel_renderbuffer *src_irb = intel_renderbuffer(src_rb);
800
801 if (!src_irb) {
802 perf_debug("glBlitFramebuffer(): missing src renderbuffer. "
803 "Falling back to software rendering.\n");
804 return mask;
805 }
806
807 /* If the source and destination are the same size with no mirroring,
808 * the rectangles are within the size of the texture and there is no
809 * scissor, then we can probably use the blit engine.
810 */
811 if (!(srcX0 - srcX1 == dstX0 - dstX1 &&
812 srcY0 - srcY1 == dstY0 - dstY1 &&
813 srcX1 >= srcX0 &&
814 srcY1 >= srcY0 &&
815 srcX0 >= 0 && srcX1 <= readFb->Width &&
816 srcY0 >= 0 && srcY1 <= readFb->Height &&
817 dstX0 >= 0 && dstX1 <= drawFb->Width &&
818 dstY0 >= 0 && dstY1 <= drawFb->Height &&
819 !(ctx->Scissor.EnableFlags))) {
820 perf_debug("glBlitFramebuffer(): non-1:1 blit. "
821 "Falling back to software rendering.\n");
822 return mask;
823 }
824
825 /* Blit to all active draw buffers. We don't do any pre-checking,
826 * because we assume that copying to MRTs is rare, and failure midway
827 * through copying is even more rare. Even if it was to occur, it's
828 * safe to let meta start the copy over from scratch, because
829 * glBlitFramebuffer completely overwrites the destination pixels, and
830 * results are undefined if any destination pixels have a dependency on
831 * source pixels.
832 */
833 for (i = 0; i < drawFb->_NumColorDrawBuffers; i++) {
834 struct gl_renderbuffer *dst_rb = drawFb->_ColorDrawBuffers[i];
835 struct intel_renderbuffer *dst_irb = intel_renderbuffer(dst_rb);
836
837 if (!dst_irb) {
838 perf_debug("glBlitFramebuffer(): missing dst renderbuffer. "
839 "Falling back to software rendering.\n");
840 return mask;
841 }
842
843 if (!intel_miptree_blit(brw,
844 src_irb->mt,
845 src_irb->mt_level, src_irb->mt_layer,
846 srcX0, srcY0, src_rb->Name == 0,
847 dst_irb->mt,
848 dst_irb->mt_level, dst_irb->mt_layer,
849 dstX0, dstY0, dst_rb->Name == 0,
850 dstX1 - dstX0, dstY1 - dstY0, GL_COPY)) {
851 perf_debug("glBlitFramebuffer(): unknown blit failure. "
852 "Falling back to software rendering.\n");
853 return mask;
854 }
855 }
856
857 mask &= ~GL_COLOR_BUFFER_BIT;
858 }
859
860 return mask;
861 }
862
863 static void
864 intel_blit_framebuffer(struct gl_context *ctx,
865 struct gl_framebuffer *readFb,
866 struct gl_framebuffer *drawFb,
867 GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1,
868 GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1,
869 GLbitfield mask, GLenum filter)
870 {
871 struct brw_context *brw = brw_context(ctx);
872
873 /* Page 679 of OpenGL 4.4 spec says:
874 * "Added BlitFramebuffer to commands affected by conditional rendering in
875 * section 10.10 (Bug 9562)."
876 */
877 if (!_mesa_check_conditional_render(ctx))
878 return;
879
880 mask = brw_blorp_framebuffer(brw, readFb, drawFb,
881 srcX0, srcY0, srcX1, srcY1,
882 dstX0, dstY0, dstX1, dstY1,
883 mask, filter);
884 if (mask == 0x0)
885 return;
886
887 mask = _mesa_meta_BlitFramebuffer(ctx, readFb, drawFb,
888 srcX0, srcY0, srcX1, srcY1,
889 dstX0, dstY0, dstX1, dstY1,
890 mask, filter);
891 if (mask == 0x0)
892 return;
893
894 if (brw->gen >= 8 && (mask & GL_STENCIL_BUFFER_BIT)) {
895 brw_meta_fbo_stencil_blit(brw_context(ctx), readFb, drawFb,
896 srcX0, srcY0, srcX1, srcY1,
897 dstX0, dstY0, dstX1, dstY1);
898 mask &= ~GL_STENCIL_BUFFER_BIT;
899 if (mask == 0x0)
900 return;
901 }
902
903 /* Try using the BLT engine. */
904 mask = intel_blit_framebuffer_with_blitter(ctx, readFb, drawFb,
905 srcX0, srcY0, srcX1, srcY1,
906 dstX0, dstY0, dstX1, dstY1,
907 mask, filter);
908 if (mask == 0x0)
909 return;
910
911 _swrast_BlitFramebuffer(ctx, readFb, drawFb,
912 srcX0, srcY0, srcX1, srcY1,
913 dstX0, dstY0, dstX1, dstY1,
914 mask, filter);
915 }
916
917 /**
918 * Gen4-5 implementation of glBlitFrameBuffer().
919 *
920 * Tries BLT, Meta, then swrast.
921 *
922 * Gen4-5 have a single ring for both 3D and BLT operations, so there's no
923 * inter-ring synchronization issues like on Gen6+. It is apparently faster
924 * than using the 3D pipeline. Original Gen4 also has to rebase and copy
925 * miptree slices in order to render to unaligned locations.
926 */
927 static void
928 gen4_blit_framebuffer(struct gl_context *ctx,
929 struct gl_framebuffer *readFb,
930 struct gl_framebuffer *drawFb,
931 GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1,
932 GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1,
933 GLbitfield mask, GLenum filter)
934 {
935 /* Page 679 of OpenGL 4.4 spec says:
936 * "Added BlitFramebuffer to commands affected by conditional rendering in
937 * section 10.10 (Bug 9562)."
938 */
939 if (!_mesa_check_conditional_render(ctx))
940 return;
941
942 mask = intel_blit_framebuffer_with_blitter(ctx, readFb, drawFb,
943 srcX0, srcY0, srcX1, srcY1,
944 dstX0, dstY0, dstX1, dstY1,
945 mask, filter);
946 if (mask == 0x0)
947 return;
948
949 mask = _mesa_meta_BlitFramebuffer(ctx, readFb, drawFb,
950 srcX0, srcY0, srcX1, srcY1,
951 dstX0, dstY0, dstX1, dstY1,
952 mask, filter);
953 if (mask == 0x0)
954 return;
955
956 _swrast_BlitFramebuffer(ctx, readFb, drawFb,
957 srcX0, srcY0, srcX1, srcY1,
958 dstX0, dstY0, dstX1, dstY1,
959 mask, filter);
960 }
961
962 /**
963 * Does the renderbuffer have hiz enabled?
964 */
965 bool
966 intel_renderbuffer_has_hiz(struct intel_renderbuffer *irb)
967 {
968 return intel_miptree_level_has_hiz(irb->mt, irb->mt_level);
969 }
970
971 bool
972 intel_renderbuffer_resolve_hiz(struct brw_context *brw,
973 struct intel_renderbuffer *irb)
974 {
975 if (irb->mt)
976 return intel_miptree_slice_resolve_hiz(brw,
977 irb->mt,
978 irb->mt_level,
979 irb->mt_layer);
980
981 return false;
982 }
983
984 void
985 intel_renderbuffer_att_set_needs_depth_resolve(struct gl_renderbuffer_attachment *att)
986 {
987 struct intel_renderbuffer *irb = intel_renderbuffer(att->Renderbuffer);
988 if (irb->mt) {
989 if (att->Layered) {
990 intel_miptree_set_all_slices_need_depth_resolve(irb->mt, irb->mt_level);
991 } else {
992 intel_miptree_slice_set_needs_depth_resolve(irb->mt,
993 irb->mt_level,
994 irb->mt_layer);
995 }
996 }
997 }
998
999 bool
1000 intel_renderbuffer_resolve_depth(struct brw_context *brw,
1001 struct intel_renderbuffer *irb)
1002 {
1003 if (irb->mt)
1004 return intel_miptree_slice_resolve_depth(brw,
1005 irb->mt,
1006 irb->mt_level,
1007 irb->mt_layer);
1008
1009 return false;
1010 }
1011
1012 void
1013 intel_renderbuffer_move_to_temp(struct brw_context *brw,
1014 struct intel_renderbuffer *irb,
1015 bool invalidate)
1016 {
1017 struct gl_renderbuffer *rb =&irb->Base.Base;
1018 struct intel_texture_image *intel_image = intel_texture_image(rb->TexImage);
1019 struct intel_mipmap_tree *new_mt;
1020 int width, height, depth;
1021
1022 uint32_t layout_flags = MIPTREE_LAYOUT_ACCELERATED_UPLOAD |
1023 MIPTREE_LAYOUT_TILING_ANY;
1024
1025 intel_miptree_get_dimensions_for_image(rb->TexImage, &width, &height, &depth);
1026
1027 new_mt = intel_miptree_create(brw, rb->TexImage->TexObject->Target,
1028 intel_image->base.Base.TexFormat,
1029 intel_image->base.Base.Level,
1030 intel_image->base.Base.Level,
1031 width, height, depth,
1032 irb->mt->num_samples,
1033 layout_flags);
1034
1035 if (intel_miptree_wants_hiz_buffer(brw, new_mt)) {
1036 intel_miptree_alloc_hiz(brw, new_mt);
1037 }
1038
1039 intel_miptree_copy_teximage(brw, intel_image, new_mt, invalidate);
1040
1041 intel_miptree_reference(&irb->mt, intel_image->mt);
1042 intel_renderbuffer_set_draw_offset(irb);
1043 intel_miptree_release(&new_mt);
1044 }
1045
1046 void
1047 brw_render_cache_set_clear(struct brw_context *brw)
1048 {
1049 struct set_entry *entry;
1050
1051 set_foreach(brw->render_cache, entry) {
1052 _mesa_set_remove(brw->render_cache, entry);
1053 }
1054 }
1055
1056 void
1057 brw_render_cache_set_add_bo(struct brw_context *brw, drm_intel_bo *bo)
1058 {
1059 _mesa_set_add(brw->render_cache, bo);
1060 }
1061
1062 /**
1063 * Emits an appropriate flush for a BO if it has been rendered to within the
1064 * same batchbuffer as a read that's about to be emitted.
1065 *
1066 * The GPU has separate, incoherent caches for the render cache and the
1067 * sampler cache, along with other caches. Usually data in the different
1068 * caches don't interact (e.g. we don't render to our driver-generated
1069 * immediate constant data), but for render-to-texture in FBOs we definitely
1070 * do. When a batchbuffer is flushed, the kernel will ensure that everything
1071 * necessary is flushed before another use of that BO, but for reuse from
1072 * different caches within a batchbuffer, it's all our responsibility.
1073 */
1074 void
1075 brw_render_cache_set_check_flush(struct brw_context *brw, drm_intel_bo *bo)
1076 {
1077 if (!_mesa_set_search(brw->render_cache, bo))
1078 return;
1079
1080 brw_emit_mi_flush(brw);
1081 }
1082
1083 /**
1084 * Do one-time context initializations related to GL_EXT_framebuffer_object.
1085 * Hook in device driver functions.
1086 */
1087 void
1088 intel_fbo_init(struct brw_context *brw)
1089 {
1090 struct dd_function_table *dd = &brw->ctx.Driver;
1091 dd->NewFramebuffer = intel_new_framebuffer;
1092 dd->NewRenderbuffer = intel_new_renderbuffer;
1093 dd->MapRenderbuffer = intel_map_renderbuffer;
1094 dd->UnmapRenderbuffer = intel_unmap_renderbuffer;
1095 dd->RenderTexture = intel_render_texture;
1096 dd->ValidateFramebuffer = intel_validate_framebuffer;
1097 if (brw->gen >= 6)
1098 dd->BlitFramebuffer = intel_blit_framebuffer;
1099 else
1100 dd->BlitFramebuffer = gen4_blit_framebuffer;
1101 dd->EGLImageTargetRenderbufferStorage =
1102 intel_image_target_renderbuffer_storage;
1103
1104 brw->render_cache = _mesa_set_create(brw, _mesa_hash_pointer,
1105 _mesa_key_pointer_equal);
1106 }