i965/dri: Support R8G8B8A8 and R8G8B8X8 configs
[mesa.git] / src / mesa / drivers / dri / i965 / intel_fbo.c
1 /*
2 * Copyright 2006 VMware, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial portions
15 * of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
18 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
21 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
22 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
23 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 */
25
26 #include "main/enums.h"
27 #include "main/imports.h"
28 #include "main/macros.h"
29 #include "main/mtypes.h"
30 #include "main/fbobject.h"
31 #include "main/framebuffer.h"
32 #include "main/renderbuffer.h"
33 #include "main/context.h"
34 #include "main/teximage.h"
35 #include "main/image.h"
36 #include "main/condrender.h"
37 #include "util/hash_table.h"
38 #include "util/set.h"
39
40 #include "swrast/swrast.h"
41 #include "drivers/common/meta.h"
42
43 #include "intel_batchbuffer.h"
44 #include "intel_buffers.h"
45 #include "intel_blit.h"
46 #include "intel_fbo.h"
47 #include "intel_mipmap_tree.h"
48 #include "intel_image.h"
49 #include "intel_screen.h"
50 #include "intel_tex.h"
51 #include "brw_context.h"
52 #include "brw_defines.h"
53
54 #define FILE_DEBUG_FLAG DEBUG_FBO
55
56 /** Called by gl_renderbuffer::Delete() */
57 static void
58 intel_delete_renderbuffer(struct gl_context *ctx, struct gl_renderbuffer *rb)
59 {
60 struct intel_renderbuffer *irb = intel_renderbuffer(rb);
61
62 assert(irb);
63
64 intel_miptree_release(&irb->mt);
65 intel_miptree_release(&irb->singlesample_mt);
66
67 _mesa_delete_renderbuffer(ctx, rb);
68 }
69
70 /**
71 * \brief Downsample a winsys renderbuffer from mt to singlesample_mt.
72 *
73 * If the miptree needs no downsample, then skip.
74 */
75 void
76 intel_renderbuffer_downsample(struct brw_context *brw,
77 struct intel_renderbuffer *irb)
78 {
79 if (!irb->need_downsample)
80 return;
81 intel_miptree_updownsample(brw, irb->mt, irb->singlesample_mt);
82 irb->need_downsample = false;
83 }
84
85 /**
86 * \brief Upsample a winsys renderbuffer from singlesample_mt to mt.
87 *
88 * The upsample is done unconditionally.
89 */
90 void
91 intel_renderbuffer_upsample(struct brw_context *brw,
92 struct intel_renderbuffer *irb)
93 {
94 assert(!irb->need_downsample);
95
96 intel_miptree_updownsample(brw, irb->singlesample_mt, irb->mt);
97 }
98
99 /**
100 * \see dd_function_table::MapRenderbuffer
101 */
102 static void
103 intel_map_renderbuffer(struct gl_context *ctx,
104 struct gl_renderbuffer *rb,
105 GLuint x, GLuint y, GLuint w, GLuint h,
106 GLbitfield mode,
107 GLubyte **out_map,
108 GLint *out_stride)
109 {
110 struct brw_context *brw = brw_context(ctx);
111 struct swrast_renderbuffer *srb = (struct swrast_renderbuffer *)rb;
112 struct intel_renderbuffer *irb = intel_renderbuffer(rb);
113 struct intel_mipmap_tree *mt;
114 void *map;
115 ptrdiff_t stride;
116
117 if (srb->Buffer) {
118 /* this is a malloc'd renderbuffer (accum buffer), not an irb */
119 GLint bpp = _mesa_get_format_bytes(rb->Format);
120 GLint rowStride = srb->RowStride;
121 *out_map = (GLubyte *) srb->Buffer + y * rowStride + x * bpp;
122 *out_stride = rowStride;
123 return;
124 }
125
126 intel_prepare_render(brw);
127
128 /* The MapRenderbuffer API should always return a single-sampled mapping.
129 * The case we are asked to map multisampled RBs is in glReadPixels() (or
130 * swrast paths like glCopyTexImage()) from a window-system MSAA buffer,
131 * and GL expects an automatic resolve to happen.
132 *
133 * If it's a color miptree, there is a ->singlesample_mt which wraps the
134 * actual window system renderbuffer (which we may resolve to at any time),
135 * while the miptree itself is our driver-private allocation. If it's a
136 * depth or stencil miptree, we have a private MSAA buffer and no shared
137 * singlesample buffer, and since we don't expect anybody to ever actually
138 * resolve it, we just make a temporary singlesample buffer now when we
139 * have to.
140 */
141 if (rb->NumSamples > 1) {
142 if (!irb->singlesample_mt) {
143 irb->singlesample_mt =
144 intel_miptree_create_for_renderbuffer(brw, irb->mt->format,
145 rb->Width, rb->Height,
146 0 /*num_samples*/);
147 if (!irb->singlesample_mt)
148 goto fail;
149 irb->singlesample_mt_is_tmp = true;
150 irb->need_downsample = true;
151 }
152
153 intel_renderbuffer_downsample(brw, irb);
154 mt = irb->singlesample_mt;
155
156 irb->need_map_upsample = mode & GL_MAP_WRITE_BIT;
157 } else {
158 mt = irb->mt;
159 }
160
161 /* For a window-system renderbuffer, we need to flip the mapping we receive
162 * upside-down. So we need to ask for a rectangle on flipped vertically, and
163 * we then return a pointer to the bottom of it with a negative stride.
164 */
165 if (rb->Name == 0) {
166 y = rb->Height - y - h;
167 }
168
169 intel_miptree_map(brw, mt, irb->mt_level, irb->mt_layer,
170 x, y, w, h, mode, &map, &stride);
171
172 if (rb->Name == 0) {
173 map += (h - 1) * stride;
174 stride = -stride;
175 }
176
177 DBG("%s: rb %d (%s) mt mapped: (%d, %d) (%dx%d) -> %p/%"PRIdPTR"\n",
178 __func__, rb->Name, _mesa_get_format_name(rb->Format),
179 x, y, w, h, map, stride);
180
181 *out_map = map;
182 *out_stride = stride;
183 return;
184
185 fail:
186 *out_map = NULL;
187 *out_stride = 0;
188 }
189
190 /**
191 * \see dd_function_table::UnmapRenderbuffer
192 */
193 static void
194 intel_unmap_renderbuffer(struct gl_context *ctx,
195 struct gl_renderbuffer *rb)
196 {
197 struct brw_context *brw = brw_context(ctx);
198 struct swrast_renderbuffer *srb = (struct swrast_renderbuffer *)rb;
199 struct intel_renderbuffer *irb = intel_renderbuffer(rb);
200 struct intel_mipmap_tree *mt;
201
202 DBG("%s: rb %d (%s)\n", __func__,
203 rb->Name, _mesa_get_format_name(rb->Format));
204
205 if (srb->Buffer) {
206 /* this is a malloc'd renderbuffer (accum buffer) */
207 /* nothing to do */
208 return;
209 }
210
211 if (rb->NumSamples > 1) {
212 mt = irb->singlesample_mt;
213 } else {
214 mt = irb->mt;
215 }
216
217 intel_miptree_unmap(brw, mt, irb->mt_level, irb->mt_layer);
218
219 if (irb->need_map_upsample) {
220 intel_renderbuffer_upsample(brw, irb);
221 irb->need_map_upsample = false;
222 }
223
224 if (irb->singlesample_mt_is_tmp)
225 intel_miptree_release(&irb->singlesample_mt);
226 }
227
228
229 /**
230 * Round up the requested multisample count to the next supported sample size.
231 */
232 unsigned
233 intel_quantize_num_samples(struct intel_screen *intel, unsigned num_samples)
234 {
235 const int *msaa_modes = intel_supported_msaa_modes(intel);
236 int quantized_samples = 0;
237
238 for (int i = 0; msaa_modes[i] != -1; ++i) {
239 if (msaa_modes[i] >= num_samples)
240 quantized_samples = msaa_modes[i];
241 else
242 break;
243 }
244
245 return quantized_samples;
246 }
247
248 static mesa_format
249 intel_renderbuffer_format(struct gl_context * ctx, GLenum internalFormat)
250 {
251 struct brw_context *brw = brw_context(ctx);
252
253 switch (internalFormat) {
254 default:
255 /* Use the same format-choice logic as for textures.
256 * Renderbuffers aren't any different from textures for us,
257 * except they're less useful because you can't texture with
258 * them.
259 */
260 return ctx->Driver.ChooseTextureFormat(ctx, GL_TEXTURE_2D,
261 internalFormat,
262 GL_NONE, GL_NONE);
263 break;
264 case GL_STENCIL_INDEX:
265 case GL_STENCIL_INDEX1_EXT:
266 case GL_STENCIL_INDEX4_EXT:
267 case GL_STENCIL_INDEX8_EXT:
268 case GL_STENCIL_INDEX16_EXT:
269 /* These aren't actual texture formats, so force them here. */
270 if (brw->has_separate_stencil) {
271 return MESA_FORMAT_S_UINT8;
272 } else {
273 assert(!brw->must_use_separate_stencil);
274 return MESA_FORMAT_Z24_UNORM_S8_UINT;
275 }
276 }
277 }
278
279 static GLboolean
280 intel_alloc_private_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffer *rb,
281 GLenum internalFormat,
282 GLuint width, GLuint height)
283 {
284 struct brw_context *brw = brw_context(ctx);
285 struct intel_screen *screen = brw->screen;
286 struct intel_renderbuffer *irb = intel_renderbuffer(rb);
287
288 assert(rb->Format != MESA_FORMAT_NONE);
289
290 rb->NumSamples = intel_quantize_num_samples(screen, rb->NumSamples);
291 rb->Width = width;
292 rb->Height = height;
293 rb->_BaseFormat = _mesa_get_format_base_format(rb->Format);
294
295 intel_miptree_release(&irb->mt);
296
297 DBG("%s: %s: %s (%dx%d)\n", __func__,
298 _mesa_enum_to_string(internalFormat),
299 _mesa_get_format_name(rb->Format), width, height);
300
301 if (width == 0 || height == 0)
302 return true;
303
304 irb->mt = intel_miptree_create_for_renderbuffer(brw, rb->Format,
305 width, height,
306 rb->NumSamples);
307 if (!irb->mt)
308 return false;
309
310 irb->layer_count = 1;
311
312 return true;
313 }
314
315 /**
316 * Called via glRenderbufferStorageEXT() to set the format and allocate
317 * storage for a user-created renderbuffer.
318 */
319 static GLboolean
320 intel_alloc_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffer *rb,
321 GLenum internalFormat,
322 GLuint width, GLuint height)
323 {
324 rb->Format = intel_renderbuffer_format(ctx, internalFormat);
325 return intel_alloc_private_renderbuffer_storage(ctx, rb, internalFormat, width, height);
326 }
327
328 static void
329 intel_image_target_renderbuffer_storage(struct gl_context *ctx,
330 struct gl_renderbuffer *rb,
331 void *image_handle)
332 {
333 struct brw_context *brw = brw_context(ctx);
334 struct intel_renderbuffer *irb;
335 __DRIscreen *dri_screen = brw->screen->driScrnPriv;
336 __DRIimage *image;
337
338 image = dri_screen->dri2.image->lookupEGLImage(dri_screen, image_handle,
339 dri_screen->loaderPrivate);
340 if (image == NULL)
341 return;
342
343 if (image->planar_format && image->planar_format->nplanes > 1) {
344 _mesa_error(ctx, GL_INVALID_OPERATION,
345 "glEGLImageTargetRenderbufferStorage(planar buffers are not "
346 "supported as render targets.)");
347 return;
348 }
349
350 /* __DRIimage is opaque to the core so it has to be checked here */
351 if (!brw->mesa_format_supports_render[image->format]) {
352 _mesa_error(ctx, GL_INVALID_OPERATION,
353 "glEGLImageTargetRenderbufferStorage(unsupported image format)");
354 return;
355 }
356
357 irb = intel_renderbuffer(rb);
358 intel_miptree_release(&irb->mt);
359
360 /* Disable creation of the miptree's aux buffers because the driver exposes
361 * no EGL API to manage them. That is, there is no API for resolving the aux
362 * buffer's content to the main buffer nor for invalidating the aux buffer's
363 * content.
364 */
365 irb->mt = intel_miptree_create_for_bo(brw,
366 image->bo,
367 image->format,
368 image->offset,
369 image->width,
370 image->height,
371 1,
372 image->pitch,
373 MIPTREE_LAYOUT_DISABLE_AUX);
374 if (!irb->mt)
375 return;
376
377 /* Adjust the miptree's upper-left coordinate.
378 *
379 * FIXME: Adjusting the miptree's layout outside of
380 * intel_miptree_create_layout() is fragile. Plumb the adjustment through
381 * intel_miptree_create_layout() and brw_tex_layout().
382 */
383 irb->mt->level[0].level_x = image->tile_x;
384 irb->mt->level[0].level_y = image->tile_y;
385 irb->mt->level[0].slice[0].x_offset = image->tile_x;
386 irb->mt->level[0].slice[0].y_offset = image->tile_y;
387 irb->mt->total_width += image->tile_x;
388 irb->mt->total_height += image->tile_y;
389
390 rb->InternalFormat = image->internal_format;
391 rb->Width = image->width;
392 rb->Height = image->height;
393 rb->Format = image->format;
394 rb->_BaseFormat = _mesa_get_format_base_format(image->format);
395 rb->NeedsFinishRenderTexture = true;
396 irb->layer_count = 1;
397 }
398
399 /**
400 * Called by _mesa_resize_framebuffer() for each hardware renderbuffer when a
401 * window system framebuffer is resized.
402 *
403 * Any actual buffer reallocations for hardware renderbuffers (which would
404 * have triggered _mesa_resize_framebuffer()) were done by
405 * intel_process_dri2_buffer().
406 */
407 static GLboolean
408 intel_alloc_window_storage(struct gl_context * ctx, struct gl_renderbuffer *rb,
409 GLenum internalFormat, GLuint width, GLuint height)
410 {
411 (void) ctx;
412 assert(rb->Name == 0);
413 rb->Width = width;
414 rb->Height = height;
415 rb->InternalFormat = internalFormat;
416
417 return true;
418 }
419
420 /** Dummy function for gl_renderbuffer::AllocStorage() */
421 static GLboolean
422 intel_nop_alloc_storage(struct gl_context * ctx, struct gl_renderbuffer *rb,
423 GLenum internalFormat, GLuint width, GLuint height)
424 {
425 (void) rb;
426 (void) internalFormat;
427 (void) width;
428 (void) height;
429 _mesa_problem(ctx, "intel_nop_alloc_storage should never be called.");
430 return false;
431 }
432
433 /**
434 * Create an intel_renderbuffer for a __DRIdrawable. This function is
435 * unrelated to GL renderbuffers (that is, those created by
436 * glGenRenderbuffers).
437 *
438 * \param num_samples must be quantized.
439 */
440 struct intel_renderbuffer *
441 intel_create_winsys_renderbuffer(struct intel_screen *screen,
442 mesa_format format, unsigned num_samples)
443 {
444 struct intel_renderbuffer *irb = CALLOC_STRUCT(intel_renderbuffer);
445 if (!irb)
446 return NULL;
447
448 struct gl_renderbuffer *rb = &irb->Base.Base;
449 irb->layer_count = 1;
450
451 _mesa_init_renderbuffer(rb, 0);
452 rb->ClassID = INTEL_RB_CLASS;
453 rb->NumSamples = num_samples;
454
455 /* The base format and internal format must be derived from the user-visible
456 * format (that is, the gl_config's format), even if we internally use
457 * choose a different format for the renderbuffer. Otherwise, rendering may
458 * use incorrect channel write masks.
459 */
460 rb->_BaseFormat = _mesa_get_format_base_format(format);
461 rb->InternalFormat = rb->_BaseFormat;
462
463 rb->Format = format;
464 if (!screen->mesa_format_supports_render[rb->Format]) {
465 /* The glRenderbufferStorage paths in core Mesa detect if the driver
466 * does not support the user-requested format, and then searches for
467 * a falback format. The DRI code bypasses core Mesa, though. So we do
468 * the fallbacks here.
469 *
470 * We must support MESA_FORMAT_R8G8B8X8 on Android because the Android
471 * framework requires HAL_PIXEL_FORMAT_RGBX8888 winsys surfaces.
472 */
473 rb->Format = _mesa_format_fallback_rgbx_to_rgba(rb->Format);
474 assert(screen->mesa_format_supports_render[rb->Format]);
475 }
476
477 /* intel-specific methods */
478 rb->Delete = intel_delete_renderbuffer;
479 rb->AllocStorage = intel_alloc_window_storage;
480
481 return irb;
482 }
483
484 /**
485 * Private window-system buffers (as opposed to ones shared with the display
486 * server created with intel_create_winsys_renderbuffer()) are most similar in their
487 * handling to user-created renderbuffers, but they have a resize handler that
488 * may be called at intel_update_renderbuffers() time.
489 *
490 * \param num_samples must be quantized.
491 */
492 struct intel_renderbuffer *
493 intel_create_private_renderbuffer(struct intel_screen *screen,
494 mesa_format format, unsigned num_samples)
495 {
496 struct intel_renderbuffer *irb;
497
498 irb = intel_create_winsys_renderbuffer(screen, format, num_samples);
499 irb->Base.Base.AllocStorage = intel_alloc_private_renderbuffer_storage;
500
501 return irb;
502 }
503
504 /**
505 * Create a new renderbuffer object.
506 * Typically called via glBindRenderbufferEXT().
507 */
508 static struct gl_renderbuffer *
509 intel_new_renderbuffer(struct gl_context * ctx, GLuint name)
510 {
511 struct intel_renderbuffer *irb;
512 struct gl_renderbuffer *rb;
513
514 irb = CALLOC_STRUCT(intel_renderbuffer);
515 if (!irb) {
516 _mesa_error(ctx, GL_OUT_OF_MEMORY, "creating renderbuffer");
517 return NULL;
518 }
519
520 rb = &irb->Base.Base;
521
522 _mesa_init_renderbuffer(rb, name);
523 rb->ClassID = INTEL_RB_CLASS;
524
525 /* intel-specific methods */
526 rb->Delete = intel_delete_renderbuffer;
527 rb->AllocStorage = intel_alloc_renderbuffer_storage;
528 /* span routines set in alloc_storage function */
529
530 return rb;
531 }
532
533 static bool
534 intel_renderbuffer_update_wrapper(struct brw_context *brw,
535 struct intel_renderbuffer *irb,
536 struct gl_texture_image *image,
537 uint32_t layer,
538 bool layered)
539 {
540 struct gl_renderbuffer *rb = &irb->Base.Base;
541 struct intel_texture_image *intel_image = intel_texture_image(image);
542 struct intel_mipmap_tree *mt = intel_image->mt;
543 int level = image->Level;
544
545 rb->AllocStorage = intel_nop_alloc_storage;
546
547 /* adjust for texture view parameters */
548 layer += image->TexObject->MinLayer;
549 level += image->TexObject->MinLevel;
550
551 intel_miptree_check_level_layer(mt, level, layer);
552 irb->mt_level = level;
553
554 int layer_multiplier;
555 switch (mt->msaa_layout) {
556 case INTEL_MSAA_LAYOUT_UMS:
557 case INTEL_MSAA_LAYOUT_CMS:
558 layer_multiplier = MAX2(mt->num_samples, 1);
559 break;
560
561 default:
562 layer_multiplier = 1;
563 }
564
565 irb->mt_layer = layer_multiplier * layer;
566
567 if (!layered) {
568 irb->layer_count = 1;
569 } else if (mt->target != GL_TEXTURE_3D && image->TexObject->NumLayers > 0) {
570 irb->layer_count = image->TexObject->NumLayers;
571 } else {
572 irb->layer_count = mt->level[level].depth / layer_multiplier;
573 }
574
575 intel_miptree_reference(&irb->mt, mt);
576
577 intel_renderbuffer_set_draw_offset(irb);
578
579 if (mt->aux_usage == ISL_AUX_USAGE_HIZ && !mt->hiz_buf) {
580 intel_miptree_alloc_hiz(brw, mt);
581 if (!mt->hiz_buf)
582 return false;
583 }
584
585 return true;
586 }
587
588 void
589 intel_renderbuffer_set_draw_offset(struct intel_renderbuffer *irb)
590 {
591 unsigned int dst_x, dst_y;
592
593 /* compute offset of the particular 2D image within the texture region */
594 intel_miptree_get_image_offset(irb->mt,
595 irb->mt_level,
596 irb->mt_layer,
597 &dst_x, &dst_y);
598
599 irb->draw_x = dst_x;
600 irb->draw_y = dst_y;
601 }
602
603 /**
604 * Called by glFramebufferTexture[123]DEXT() (and other places) to
605 * prepare for rendering into texture memory. This might be called
606 * many times to choose different texture levels, cube faces, etc
607 * before intel_finish_render_texture() is ever called.
608 */
609 static void
610 intel_render_texture(struct gl_context * ctx,
611 struct gl_framebuffer *fb,
612 struct gl_renderbuffer_attachment *att)
613 {
614 struct brw_context *brw = brw_context(ctx);
615 struct gl_renderbuffer *rb = att->Renderbuffer;
616 struct intel_renderbuffer *irb = intel_renderbuffer(rb);
617 struct gl_texture_image *image = rb->TexImage;
618 struct intel_texture_image *intel_image = intel_texture_image(image);
619 struct intel_mipmap_tree *mt = intel_image->mt;
620 int layer;
621
622 (void) fb;
623
624 if (att->CubeMapFace > 0) {
625 assert(att->Zoffset == 0);
626 layer = att->CubeMapFace;
627 } else {
628 layer = att->Zoffset;
629 }
630
631 if (!intel_image->mt) {
632 /* Fallback on drawing to a texture that doesn't have a miptree
633 * (has a border, width/height 0, etc.)
634 */
635 _swrast_render_texture(ctx, fb, att);
636 return;
637 }
638
639 intel_miptree_check_level_layer(mt, att->TextureLevel, layer);
640
641 if (!intel_renderbuffer_update_wrapper(brw, irb, image, layer, att->Layered)) {
642 _swrast_render_texture(ctx, fb, att);
643 return;
644 }
645
646 DBG("Begin render %s texture tex=%u w=%d h=%d d=%d refcount=%d\n",
647 _mesa_get_format_name(image->TexFormat),
648 att->Texture->Name, image->Width, image->Height, image->Depth,
649 rb->RefCount);
650 }
651
652
653 #define fbo_incomplete(fb, ...) do { \
654 static GLuint msg_id = 0; \
655 if (unlikely(ctx->Const.ContextFlags & GL_CONTEXT_FLAG_DEBUG_BIT)) { \
656 _mesa_gl_debug(ctx, &msg_id, \
657 MESA_DEBUG_SOURCE_API, \
658 MESA_DEBUG_TYPE_OTHER, \
659 MESA_DEBUG_SEVERITY_MEDIUM, \
660 __VA_ARGS__); \
661 } \
662 DBG(__VA_ARGS__); \
663 fb->_Status = GL_FRAMEBUFFER_UNSUPPORTED; \
664 } while (0)
665
666 /**
667 * Do additional "completeness" testing of a framebuffer object.
668 */
669 static void
670 intel_validate_framebuffer(struct gl_context *ctx, struct gl_framebuffer *fb)
671 {
672 struct brw_context *brw = brw_context(ctx);
673 struct intel_renderbuffer *depthRb =
674 intel_get_renderbuffer(fb, BUFFER_DEPTH);
675 struct intel_renderbuffer *stencilRb =
676 intel_get_renderbuffer(fb, BUFFER_STENCIL);
677 struct intel_mipmap_tree *depth_mt = NULL, *stencil_mt = NULL;
678 unsigned i;
679
680 DBG("%s() on fb %p (%s)\n", __func__,
681 fb, (fb == ctx->DrawBuffer ? "drawbuffer" :
682 (fb == ctx->ReadBuffer ? "readbuffer" : "other buffer")));
683
684 if (depthRb)
685 depth_mt = depthRb->mt;
686 if (stencilRb) {
687 stencil_mt = stencilRb->mt;
688 if (stencil_mt->stencil_mt)
689 stencil_mt = stencil_mt->stencil_mt;
690 }
691
692 if (depth_mt && stencil_mt) {
693 if (brw->gen >= 6) {
694 unsigned d_width, d_height, d_depth;
695 unsigned s_width, s_height, s_depth;
696
697 if (depth_mt->surf.size > 0) {
698 d_width = depth_mt->surf.phys_level0_sa.width;
699 d_height = depth_mt->surf.phys_level0_sa.height;
700 d_depth = depth_mt->surf.dim == ISL_SURF_DIM_3D ?
701 depth_mt->surf.phys_level0_sa.depth :
702 depth_mt->surf.phys_level0_sa.array_len;
703 } else {
704 d_width = depth_mt->physical_width0;
705 d_height = depth_mt->physical_height0;
706 d_depth = depth_mt->physical_depth0;
707 }
708
709 if (stencil_mt->surf.size > 0) {
710 s_width = stencil_mt->surf.phys_level0_sa.width;
711 s_height = stencil_mt->surf.phys_level0_sa.height;
712 s_depth = stencil_mt->surf.dim == ISL_SURF_DIM_3D ?
713 stencil_mt->surf.phys_level0_sa.depth :
714 stencil_mt->surf.phys_level0_sa.array_len;
715 } else {
716 s_width = stencil_mt->physical_width0;
717 s_height = stencil_mt->physical_height0;
718 s_depth = stencil_mt->physical_depth0;
719 }
720
721 /* For gen >= 6, we are using the lod/minimum-array-element fields
722 * and supporting layered rendering. This means that we must restrict
723 * the depth & stencil attachments to match in various more retrictive
724 * ways. (width, height, depth, LOD and layer)
725 */
726 if (d_width != s_width ||
727 d_height != s_height ||
728 d_depth != s_depth ||
729 depthRb->mt_level != stencilRb->mt_level ||
730 depthRb->mt_layer != stencilRb->mt_layer) {
731 fbo_incomplete(fb,
732 "FBO incomplete: depth and stencil must match in"
733 "width, height, depth, LOD and layer\n");
734 }
735 }
736 if (depth_mt == stencil_mt) {
737 /* For true packed depth/stencil (not faked on prefers-separate-stencil
738 * hardware) we need to be sure they're the same level/layer, since
739 * we'll be emitting a single packet describing the packed setup.
740 */
741 if (depthRb->mt_level != stencilRb->mt_level ||
742 depthRb->mt_layer != stencilRb->mt_layer) {
743 fbo_incomplete(fb,
744 "FBO incomplete: depth image level/layer %d/%d != "
745 "stencil image %d/%d\n",
746 depthRb->mt_level,
747 depthRb->mt_layer,
748 stencilRb->mt_level,
749 stencilRb->mt_layer);
750 }
751 } else {
752 if (!brw->has_separate_stencil) {
753 fbo_incomplete(fb, "FBO incomplete: separate stencil "
754 "unsupported\n");
755 }
756 if (stencil_mt->format != MESA_FORMAT_S_UINT8) {
757 fbo_incomplete(fb, "FBO incomplete: separate stencil is %s "
758 "instead of S8\n",
759 _mesa_get_format_name(stencil_mt->format));
760 }
761 if (brw->gen < 7 && !intel_renderbuffer_has_hiz(depthRb)) {
762 /* Before Gen7, separate depth and stencil buffers can be used
763 * only if HiZ is enabled. From the Sandybridge PRM, Volume 2,
764 * Part 1, Bit 3DSTATE_DEPTH_BUFFER.SeparateStencilBufferEnable:
765 * [DevSNB]: This field must be set to the same value (enabled
766 * or disabled) as Hierarchical Depth Buffer Enable.
767 */
768 fbo_incomplete(fb, "FBO incomplete: separate stencil "
769 "without HiZ\n");
770 }
771 }
772 }
773
774 for (i = 0; i < ARRAY_SIZE(fb->Attachment); i++) {
775 struct gl_renderbuffer *rb;
776 struct intel_renderbuffer *irb;
777
778 if (fb->Attachment[i].Type == GL_NONE)
779 continue;
780
781 /* A supported attachment will have a Renderbuffer set either
782 * from being a Renderbuffer or being a texture that got the
783 * intel_wrap_texture() treatment.
784 */
785 rb = fb->Attachment[i].Renderbuffer;
786 if (rb == NULL) {
787 fbo_incomplete(fb, "FBO incomplete: attachment without "
788 "renderbuffer\n");
789 continue;
790 }
791
792 if (fb->Attachment[i].Type == GL_TEXTURE) {
793 if (rb->TexImage->Border) {
794 fbo_incomplete(fb, "FBO incomplete: texture with border\n");
795 continue;
796 }
797 }
798
799 irb = intel_renderbuffer(rb);
800 if (irb == NULL) {
801 fbo_incomplete(fb, "FBO incomplete: software rendering "
802 "renderbuffer\n");
803 continue;
804 }
805
806 if (!brw_render_target_supported(brw, rb)) {
807 fbo_incomplete(fb, "FBO incomplete: Unsupported HW "
808 "texture/renderbuffer format attached: %s\n",
809 _mesa_get_format_name(intel_rb_format(irb)));
810 }
811 }
812 }
813
814 /**
815 * Try to do a glBlitFramebuffer using glCopyTexSubImage2D
816 * We can do this when the dst renderbuffer is actually a texture and
817 * there is no scaling, mirroring or scissoring.
818 *
819 * \return new buffer mask indicating the buffers left to blit using the
820 * normal path.
821 */
822 static GLbitfield
823 intel_blit_framebuffer_with_blitter(struct gl_context *ctx,
824 const struct gl_framebuffer *readFb,
825 const struct gl_framebuffer *drawFb,
826 GLint srcX0, GLint srcY0,
827 GLint srcX1, GLint srcY1,
828 GLint dstX0, GLint dstY0,
829 GLint dstX1, GLint dstY1,
830 GLbitfield mask)
831 {
832 struct brw_context *brw = brw_context(ctx);
833
834 /* Sync up the state of window system buffers. We need to do this before
835 * we go looking for the buffers.
836 */
837 intel_prepare_render(brw);
838
839 if (mask & GL_COLOR_BUFFER_BIT) {
840 unsigned i;
841 struct gl_renderbuffer *src_rb = readFb->_ColorReadBuffer;
842 struct intel_renderbuffer *src_irb = intel_renderbuffer(src_rb);
843
844 if (!src_irb) {
845 perf_debug("glBlitFramebuffer(): missing src renderbuffer. "
846 "Falling back to software rendering.\n");
847 return mask;
848 }
849
850 /* If the source and destination are the same size with no mirroring,
851 * the rectangles are within the size of the texture and there is no
852 * scissor, then we can probably use the blit engine.
853 */
854 if (!(srcX0 - srcX1 == dstX0 - dstX1 &&
855 srcY0 - srcY1 == dstY0 - dstY1 &&
856 srcX1 >= srcX0 &&
857 srcY1 >= srcY0 &&
858 srcX0 >= 0 && srcX1 <= readFb->Width &&
859 srcY0 >= 0 && srcY1 <= readFb->Height &&
860 dstX0 >= 0 && dstX1 <= drawFb->Width &&
861 dstY0 >= 0 && dstY1 <= drawFb->Height &&
862 !(ctx->Scissor.EnableFlags))) {
863 perf_debug("glBlitFramebuffer(): non-1:1 blit. "
864 "Falling back to software rendering.\n");
865 return mask;
866 }
867
868 /* Blit to all active draw buffers. We don't do any pre-checking,
869 * because we assume that copying to MRTs is rare, and failure midway
870 * through copying is even more rare. Even if it was to occur, it's
871 * safe to let meta start the copy over from scratch, because
872 * glBlitFramebuffer completely overwrites the destination pixels, and
873 * results are undefined if any destination pixels have a dependency on
874 * source pixels.
875 */
876 for (i = 0; i < drawFb->_NumColorDrawBuffers; i++) {
877 struct gl_renderbuffer *dst_rb = drawFb->_ColorDrawBuffers[i];
878 struct intel_renderbuffer *dst_irb = intel_renderbuffer(dst_rb);
879
880 if (!dst_irb) {
881 perf_debug("glBlitFramebuffer(): missing dst renderbuffer. "
882 "Falling back to software rendering.\n");
883 return mask;
884 }
885
886 if (ctx->Color.sRGBEnabled &&
887 _mesa_get_format_color_encoding(src_irb->mt->format) !=
888 _mesa_get_format_color_encoding(dst_irb->mt->format)) {
889 perf_debug("glBlitFramebuffer() with sRGB conversion cannot be "
890 "handled by BLT path.\n");
891 return mask;
892 }
893
894 if (!intel_miptree_blit(brw,
895 src_irb->mt,
896 src_irb->mt_level, src_irb->mt_layer,
897 srcX0, srcY0, src_rb->Name == 0,
898 dst_irb->mt,
899 dst_irb->mt_level, dst_irb->mt_layer,
900 dstX0, dstY0, dst_rb->Name == 0,
901 dstX1 - dstX0, dstY1 - dstY0, GL_COPY)) {
902 perf_debug("glBlitFramebuffer(): unknown blit failure. "
903 "Falling back to software rendering.\n");
904 return mask;
905 }
906 }
907
908 mask &= ~GL_COLOR_BUFFER_BIT;
909 }
910
911 return mask;
912 }
913
914 static void
915 intel_blit_framebuffer(struct gl_context *ctx,
916 struct gl_framebuffer *readFb,
917 struct gl_framebuffer *drawFb,
918 GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1,
919 GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1,
920 GLbitfield mask, GLenum filter)
921 {
922 struct brw_context *brw = brw_context(ctx);
923
924 /* Page 679 of OpenGL 4.4 spec says:
925 * "Added BlitFramebuffer to commands affected by conditional rendering in
926 * section 10.10 (Bug 9562)."
927 */
928 if (!_mesa_check_conditional_render(ctx))
929 return;
930
931 if (brw->gen < 6) {
932 /* On gen4-5, try BLT first.
933 *
934 * Gen4-5 have a single ring for both 3D and BLT operations, so there's
935 * no inter-ring synchronization issues like on Gen6+. It is apparently
936 * faster than using the 3D pipeline. Original Gen4 also has to rebase
937 * and copy miptree slices in order to render to unaligned locations.
938 */
939 mask = intel_blit_framebuffer_with_blitter(ctx, readFb, drawFb,
940 srcX0, srcY0, srcX1, srcY1,
941 dstX0, dstY0, dstX1, dstY1,
942 mask);
943 if (mask == 0x0)
944 return;
945 }
946
947 mask = brw_blorp_framebuffer(brw, readFb, drawFb,
948 srcX0, srcY0, srcX1, srcY1,
949 dstX0, dstY0, dstX1, dstY1,
950 mask, filter);
951 if (mask == 0x0)
952 return;
953
954 mask = _mesa_meta_BlitFramebuffer(ctx, readFb, drawFb,
955 srcX0, srcY0, srcX1, srcY1,
956 dstX0, dstY0, dstX1, dstY1,
957 mask, filter);
958 if (mask == 0x0)
959 return;
960
961 if (brw->gen >= 8 && (mask & GL_STENCIL_BUFFER_BIT)) {
962 assert(!"Invalid blit");
963 }
964
965 /* Try using the BLT engine. */
966 mask = intel_blit_framebuffer_with_blitter(ctx, readFb, drawFb,
967 srcX0, srcY0, srcX1, srcY1,
968 dstX0, dstY0, dstX1, dstY1,
969 mask);
970 if (mask == 0x0)
971 return;
972
973 _swrast_BlitFramebuffer(ctx, readFb, drawFb,
974 srcX0, srcY0, srcX1, srcY1,
975 dstX0, dstY0, dstX1, dstY1,
976 mask, filter);
977 }
978
979 /**
980 * Does the renderbuffer have hiz enabled?
981 */
982 bool
983 intel_renderbuffer_has_hiz(struct intel_renderbuffer *irb)
984 {
985 return intel_miptree_level_has_hiz(irb->mt, irb->mt_level);
986 }
987
988 void
989 intel_renderbuffer_move_to_temp(struct brw_context *brw,
990 struct intel_renderbuffer *irb,
991 bool invalidate)
992 {
993 struct gl_renderbuffer *rb =&irb->Base.Base;
994 struct intel_texture_image *intel_image = intel_texture_image(rb->TexImage);
995 struct intel_mipmap_tree *new_mt;
996 int width, height, depth;
997
998 uint32_t layout_flags = MIPTREE_LAYOUT_ACCELERATED_UPLOAD |
999 MIPTREE_LAYOUT_TILING_ANY;
1000
1001 intel_get_image_dims(rb->TexImage, &width, &height, &depth);
1002
1003 assert(irb->align_wa_mt == NULL);
1004 new_mt = intel_miptree_create(brw, GL_TEXTURE_2D,
1005 intel_image->base.Base.TexFormat,
1006 0, 0,
1007 width, height, 1,
1008 irb->mt->num_samples,
1009 layout_flags);
1010
1011 if (!invalidate)
1012 intel_miptree_copy_slice(brw, intel_image->mt,
1013 intel_image->base.Base.Level, irb->mt_layer,
1014 new_mt, 0, 0);
1015
1016 intel_miptree_reference(&irb->align_wa_mt, new_mt);
1017 intel_miptree_release(&new_mt);
1018
1019 irb->draw_x = 0;
1020 irb->draw_y = 0;
1021 }
1022
1023 void
1024 brw_render_cache_set_clear(struct brw_context *brw)
1025 {
1026 struct set_entry *entry;
1027
1028 set_foreach(brw->render_cache, entry) {
1029 _mesa_set_remove(brw->render_cache, entry);
1030 }
1031 }
1032
1033 void
1034 brw_render_cache_set_add_bo(struct brw_context *brw, struct brw_bo *bo)
1035 {
1036 _mesa_set_add(brw->render_cache, bo);
1037 }
1038
1039 /**
1040 * Emits an appropriate flush for a BO if it has been rendered to within the
1041 * same batchbuffer as a read that's about to be emitted.
1042 *
1043 * The GPU has separate, incoherent caches for the render cache and the
1044 * sampler cache, along with other caches. Usually data in the different
1045 * caches don't interact (e.g. we don't render to our driver-generated
1046 * immediate constant data), but for render-to-texture in FBOs we definitely
1047 * do. When a batchbuffer is flushed, the kernel will ensure that everything
1048 * necessary is flushed before another use of that BO, but for reuse from
1049 * different caches within a batchbuffer, it's all our responsibility.
1050 */
1051 void
1052 brw_render_cache_set_check_flush(struct brw_context *brw, struct brw_bo *bo)
1053 {
1054 if (!_mesa_set_search(brw->render_cache, bo))
1055 return;
1056
1057 if (brw->gen >= 6) {
1058 brw_emit_pipe_control_flush(brw,
1059 PIPE_CONTROL_DEPTH_CACHE_FLUSH |
1060 PIPE_CONTROL_RENDER_TARGET_FLUSH |
1061 PIPE_CONTROL_CS_STALL);
1062
1063 brw_emit_pipe_control_flush(brw,
1064 PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE |
1065 PIPE_CONTROL_CONST_CACHE_INVALIDATE);
1066 } else {
1067 brw_emit_mi_flush(brw);
1068 }
1069
1070 brw_render_cache_set_clear(brw);
1071 }
1072
1073 /**
1074 * Do one-time context initializations related to GL_EXT_framebuffer_object.
1075 * Hook in device driver functions.
1076 */
1077 void
1078 intel_fbo_init(struct brw_context *brw)
1079 {
1080 struct dd_function_table *dd = &brw->ctx.Driver;
1081 dd->NewRenderbuffer = intel_new_renderbuffer;
1082 dd->MapRenderbuffer = intel_map_renderbuffer;
1083 dd->UnmapRenderbuffer = intel_unmap_renderbuffer;
1084 dd->RenderTexture = intel_render_texture;
1085 dd->ValidateFramebuffer = intel_validate_framebuffer;
1086 dd->BlitFramebuffer = intel_blit_framebuffer;
1087 dd->EGLImageTargetRenderbufferStorage =
1088 intel_image_target_renderbuffer_storage;
1089
1090 brw->render_cache = _mesa_set_create(brw, _mesa_hash_pointer,
1091 _mesa_key_pointer_equal);
1092 }