i965/nir/vec4: Implement load_const intrinsic
[mesa.git] / src / mesa / drivers / dri / i965 / intel_fbo.h
1 /**************************************************************************
2 *
3 * Copyright 2006 VMware, Inc.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #ifndef INTEL_FBO_H
29 #define INTEL_FBO_H
30
31 #include <stdbool.h>
32 #include <assert.h>
33 #include "main/formats.h"
34 #include "main/macros.h"
35 #include "brw_context.h"
36 #include "intel_mipmap_tree.h"
37 #include "intel_screen.h"
38
39 #ifdef __cplusplus
40 extern "C" {
41 #endif
42
43 struct intel_mipmap_tree;
44 struct intel_texture_image;
45
46 /**
47 * Intel renderbuffer, derived from gl_renderbuffer.
48 */
49 struct intel_renderbuffer
50 {
51 struct swrast_renderbuffer Base;
52 /**
53 * The real renderbuffer storage.
54 *
55 * This is multisampled if NumSamples is > 1.
56 */
57 struct intel_mipmap_tree *mt;
58
59 /**
60 * Downsampled contents for window-system MSAA renderbuffers.
61 *
62 * For window system MSAA color buffers, the singlesample_mt is shared with
63 * other processes in DRI2 (and in DRI3, it's the image buffer managed by
64 * glx_dri3.c), while mt is private to our process. To do a swapbuffers,
65 * we have to downsample out of mt into singlesample_mt. For depth and
66 * stencil buffers, the singlesample_mt is also private, and since we don't
67 * expect to need to do resolves (except if someone does a glReadPixels()
68 * or glCopyTexImage()), we just temporarily allocate singlesample_mt when
69 * asked to map the renderbuffer.
70 */
71 struct intel_mipmap_tree *singlesample_mt;
72
73 /**
74 * \name Miptree view
75 * \{
76 *
77 * Multiple renderbuffers may simultaneously wrap a single texture and each
78 * provide a different view into that texture. The fields below indicate
79 * which miptree slice is wrapped by this renderbuffer. The fields' values
80 * are consistent with the 'level' and 'layer' parameters of
81 * glFramebufferTextureLayer().
82 *
83 * For renderbuffers not created with glFramebufferTexture*(), mt_level and
84 * mt_layer are 0.
85 *
86 * Note: for a 2D multisample array texture on Gen7+ using
87 * INTEL_MSAA_LAYOUT_UMS or INTEL_MSAA_LAYOUT_CMS, mt_layer is the physical
88 * layer holding sample 0. So, for example, if mt->num_samples == 4, then
89 * logical layer n corresponds to mt_layer == 4*n.
90 */
91 unsigned int mt_level;
92 unsigned int mt_layer;
93
94 /* The number of attached logical layers. */
95 unsigned int layer_count;
96 /** \} */
97
98 GLuint draw_x, draw_y; /**< Offset of drawing within the region */
99
100 /**
101 * Set to true at every draw call, to indicate if a window-system
102 * renderbuffer needs to be downsampled before using singlesample_mt.
103 */
104 bool need_downsample;
105
106 /**
107 * Set to true when doing an intel_renderbuffer_map()/unmap() that requires
108 * an upsample at the end.
109 */
110 bool need_map_upsample;
111
112 /**
113 * Set to true if singlesample_mt is temporary storage that persists only
114 * for the duration of a mapping.
115 */
116 bool singlesample_mt_is_tmp;
117 };
118
119
120 /**
121 * gl_renderbuffer is a base class which we subclass. The Class field
122 * is used for simple run-time type checking.
123 */
124 #define INTEL_RB_CLASS 0x12345678
125
126
127 /**
128 * Return a gl_renderbuffer ptr casted to intel_renderbuffer.
129 * NULL will be returned if the rb isn't really an intel_renderbuffer.
130 * This is determined by checking the ClassID.
131 */
132 static inline struct intel_renderbuffer *
133 intel_renderbuffer(struct gl_renderbuffer *rb)
134 {
135 struct intel_renderbuffer *irb = (struct intel_renderbuffer *) rb;
136 if (irb && irb->Base.Base.ClassID == INTEL_RB_CLASS) {
137 /*_mesa_warning(NULL, "Returning non-intel Rb\n");*/
138 return irb;
139 }
140 else
141 return NULL;
142 }
143
144
145 /**
146 * \brief Return the framebuffer attachment specified by attIndex.
147 *
148 * If the framebuffer lacks the specified attachment, then return null.
149 *
150 * If the attached renderbuffer is a wrapper, then return wrapped
151 * renderbuffer.
152 */
153 static inline struct intel_renderbuffer *
154 intel_get_renderbuffer(struct gl_framebuffer *fb, gl_buffer_index attIndex)
155 {
156 struct gl_renderbuffer *rb;
157
158 assert((unsigned)attIndex < ARRAY_SIZE(fb->Attachment));
159
160 rb = fb->Attachment[attIndex].Renderbuffer;
161 if (!rb)
162 return NULL;
163
164 return intel_renderbuffer(rb);
165 }
166
167
168 static inline mesa_format
169 intel_rb_format(const struct intel_renderbuffer *rb)
170 {
171 return rb->Base.Base.Format;
172 }
173
174 extern struct intel_renderbuffer *
175 intel_create_renderbuffer(mesa_format format, unsigned num_samples);
176
177 struct intel_renderbuffer *
178 intel_create_private_renderbuffer(mesa_format format, unsigned num_samples);
179
180 struct gl_renderbuffer*
181 intel_create_wrapped_renderbuffer(struct gl_context * ctx,
182 int width, int height,
183 mesa_format format);
184
185 extern void
186 intel_fbo_init(struct brw_context *brw);
187
188 void
189 intel_renderbuffer_set_draw_offset(struct intel_renderbuffer *irb);
190
191 static inline uint32_t
192 intel_renderbuffer_get_tile_offsets(struct intel_renderbuffer *irb,
193 uint32_t *tile_x,
194 uint32_t *tile_y)
195 {
196 return intel_miptree_get_tile_offsets(irb->mt, irb->mt_level, irb->mt_layer,
197 tile_x, tile_y);
198 }
199
200 bool
201 intel_renderbuffer_has_hiz(struct intel_renderbuffer *irb);
202
203 void
204 intel_renderbuffer_att_set_needs_depth_resolve(struct gl_renderbuffer_attachment *att);
205
206
207 /**
208 * \brief Perform a HiZ resolve on the renderbuffer.
209 *
210 * It is safe to call this function on a renderbuffer without HiZ. In that
211 * case, the function is a no-op.
212 *
213 * \return false if no resolve was needed
214 */
215 bool
216 intel_renderbuffer_resolve_hiz(struct brw_context *brw,
217 struct intel_renderbuffer *irb);
218
219 /**
220 * \brief Perform a depth resolve on the renderbuffer.
221 *
222 * It is safe to call this function on a renderbuffer without HiZ. In that
223 * case, the function is a no-op.
224 *
225 * \return false if no resolve was needed
226 */
227 bool
228 intel_renderbuffer_resolve_depth(struct brw_context *brw,
229 struct intel_renderbuffer *irb);
230
231 void intel_renderbuffer_move_to_temp(struct brw_context *brw,
232 struct intel_renderbuffer *irb,
233 bool invalidate);
234
235 void
236 intel_renderbuffer_downsample(struct brw_context *brw,
237 struct intel_renderbuffer *irb);
238
239 void
240 intel_renderbuffer_upsample(struct brw_context *brw,
241 struct intel_renderbuffer *irb);
242
243 void brw_render_cache_set_clear(struct brw_context *brw);
244 void brw_render_cache_set_add_bo(struct brw_context *brw, drm_intel_bo *bo);
245 void brw_render_cache_set_check_flush(struct brw_context *brw, drm_intel_bo *bo);
246
247 unsigned
248 intel_quantize_num_samples(struct intel_screen *intel, unsigned num_samples);
249
250 #ifdef __cplusplus
251 }
252 #endif
253
254 #endif /* INTEL_FBO_H */