src/mesa/drivers/dri/i965/intel_pixel_read.c

   1 /*
   2  * Copyright 2003 VMware, Inc.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sublicense, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the
  14  * next paragraph) shall be included in all copies or substantial portions
  15  * of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  18  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20  * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
  21  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  22  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  23  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24  */
  25
  26 #include "main/enums.h"
  27 #include "main/mtypes.h"
  28 #include "main/macros.h"
  29 #include "main/fbobject.h"
  30 #include "main/image.h"
  31 #include "main/bufferobj.h"
  32 #include "main/readpix.h"
  33 #include "main/state.h"
  34 #include "main/glformats.h"
  35 #include "drivers/common/meta.h"
  36
  37 #include "brw_context.h"
  38 #include "intel_screen.h"
  39 #include "intel_batchbuffer.h"
  40 #include "intel_blit.h"
  41 #include "intel_buffers.h"
  42 #include "intel_fbo.h"
  43 #include "intel_mipmap_tree.h"
  44 #include "intel_pixel.h"
  45 #include "intel_buffer_objects.h"
  46 #include "intel_tiled_memcpy.h"
  47
  48 #define FILE_DEBUG_FLAG DEBUG_PIXEL
  49
  50 /**
  51  * \brief A fast path for glReadPixels
  52  *
  53  * This fast path is taken when the source format is BGRA, RGBA,
  54  * A or L and when the texture memory is X- or Y-tiled.  It downloads
  55  * the source data by directly mapping the memory without a GTT fence.
  56  * This then needs to be de-tiled on the CPU before presenting the data to
  57  * the user in the linear fasion.
  58  *
  59  * This is a performance win over the conventional texture download path.
  60  * In the conventional texture download path, the texture is either mapped
  61  * through the GTT or copied to a linear buffer with the blitter before
  62  * handing off to a software path.  This allows us to avoid round-tripping
  63  * through the GPU (in the case where we would be blitting) and do only a
  64  * single copy operation.
  65  */
  66 static bool
  67 intel_readpixels_tiled_memcpy(struct gl_context * ctx,
  68                               GLint xoffset, GLint yoffset,
  69                               GLsizei width, GLsizei height,
  70                               GLenum format, GLenum type,
  71                               GLvoid * pixels,
  72                               const struct gl_pixelstore_attrib *pack)
  73 {
  74    struct brw_context *brw = brw_context(ctx);
  75    struct gl_renderbuffer *rb = ctx->ReadBuffer->_ColorReadBuffer;
  76
  77    /* This path supports reading from color buffers only */
  78    if (rb == NULL)
  79       return false;
  80
  81    struct intel_renderbuffer *irb = intel_renderbuffer(rb);
  82    int dst_pitch;
  83
  84    /* The miptree's buffer. */
  85    struct brw_bo *bo;
  86
  87    uint32_t cpp;
  88    mem_copy_fn mem_copy = NULL;
  89
  90    /* This fastpath is restricted to specific renderbuffer types:
  91     * a 2D BGRA, RGBA, L8 or A8 texture. It could be generalized to support
  92     * more types.
  93     */
  94    if (!brw->has_llc ||
  95        !(type == GL_UNSIGNED_BYTE || type == GL_UNSIGNED_INT_8_8_8_8_REV) ||
  96        pixels == NULL ||
  97        _mesa_is_bufferobj(pack->BufferObj) ||
  98        pack->Alignment > 4 ||
  99        pack->SkipPixels > 0 ||
 100        pack->SkipRows > 0 ||
 101        (pack->RowLength != 0 && pack->RowLength != width) ||
 102        pack->SwapBytes ||
 103        pack->LsbFirst ||
 104        pack->Invert)
 105       return false;
 106
 107    /* Only a simple blit, no scale, bias or other mapping. */
 108    if (ctx->_ImageTransferState)
 109       return false;
 110
 111    /* It is possible that the renderbuffer (or underlying texture) is
 112     * multisampled.  Since ReadPixels from a multisampled buffer requires a
 113     * multisample resolve, we can't handle this here
 114     */
 115    if (rb->NumSamples > 1)
 116       return false;
 117
 118    /* We can't handle copying from RGBX or BGRX because the tiled_memcpy
 119     * function doesn't set the last channel to 1. Note this checks BaseFormat
 120     * rather than TexFormat in case the RGBX format is being simulated with an
 121     * RGBA format.
 122     */
 123    if (rb->_BaseFormat == GL_RGB)
 124       return false;
 125
 126    if (!intel_get_memcpy(rb->Format, format, type, &mem_copy, &cpp))
 127       return false;
 128
 129    if (!irb->mt ||
 130        (irb->mt->surf.tiling != ISL_TILING_X &&
 131         irb->mt->surf.tiling != ISL_TILING_Y0)) {
 132       /* The algorithm is written only for X- or Y-tiled memory. */
 133       return false;
 134    }
 135
 136    /* tiled_to_linear() assumes that if the object is swizzled, it is using
 137     * I915_BIT6_SWIZZLE_9_10 for X and I915_BIT6_SWIZZLE_9 for Y.  This is only
 138     * true on gen5 and above.
 139     *
 140     * The killer on top is that some gen4 have an L-shaped swizzle mode, where
 141     * parts of the memory aren't swizzled at all. Userspace just can't handle
 142     * that.
 143     */
 144    if (brw->gen < 5 && brw->has_swizzling)
 145       return false;
 146
 147    /* Since we are going to read raw data to the miptree, we need to resolve
 148     * any pending fast color clears before we start.
 149     */
 150    intel_miptree_access_raw(brw, irb->mt, irb->mt_level, irb->mt_layer, false);
 151
 152    bo = irb->mt->bo;
 153
 154    if (brw_batch_references(&brw->batch, bo)) {
 155       perf_debug("Flushing before mapping a referenced bo.\n");
 156       intel_batchbuffer_flush(brw);
 157    }
 158
 159    void *map = brw_bo_map(brw, bo, MAP_READ | MAP_RAW);
 160    if (map == NULL) {
 161       DBG("%s: failed to map bo\n", __func__);
 162       return false;
 163    }
 164
 165    unsigned slice_offset_x, slice_offset_y;
 166    intel_miptree_get_image_offset(irb->mt, irb->mt_level, irb->mt_layer,
 167                                   &slice_offset_x, &slice_offset_y);
 168    xoffset += slice_offset_x;
 169    yoffset += slice_offset_y;
 170
 171    dst_pitch = _mesa_image_row_stride(pack, width, format, type);
 172
 173    /* For a window-system renderbuffer, the buffer is actually flipped
 174     * vertically, so we need to handle that.  Since the detiling function
 175     * can only really work in the forwards direction, we have to be a
 176     * little creative.  First, we compute the Y-offset of the first row of
 177     * the renderbuffer (in renderbuffer coordinates).  We then match that
 178     * with the last row of the client's data.  Finally, we give
 179     * tiled_to_linear a negative pitch so that it walks through the
 180     * client's data backwards as it walks through the renderbufer forwards.
 181     */
 182    if (rb->Name == 0) {
 183       yoffset = rb->Height - yoffset - height;
 184       pixels += (ptrdiff_t) (height - 1) * dst_pitch;
 185       dst_pitch = -dst_pitch;
 186    }
 187
 188    /* We postponed printing this message until having committed to executing
 189     * the function.
 190     */
 191    DBG("%s: x,y=(%d,%d) (w,h)=(%d,%d) format=0x%x type=0x%x "
 192        "mesa_format=0x%x tiling=%d "
 193        "pack=(alignment=%d row_length=%d skip_pixels=%d skip_rows=%d)\n",
 194        __func__, xoffset, yoffset, width, height,
 195        format, type, rb->Format, irb->mt->surf.tiling,
 196        pack->Alignment, pack->RowLength, pack->SkipPixels,
 197        pack->SkipRows);
 198
 199    tiled_to_linear(
 200       xoffset * cpp, (xoffset + width) * cpp,
 201       yoffset, yoffset + height,
 202       pixels - (ptrdiff_t) yoffset * dst_pitch - (ptrdiff_t) xoffset * cpp,
 203       map + irb->mt->offset,
 204       dst_pitch, irb->mt->pitch,
 205       brw->has_swizzling,
 206       irb->mt->surf.tiling,
 207       mem_copy
 208    );
 209
 210    brw_bo_unmap(bo);
 211    return true;
 212 }
 213
 214 void
 215 intelReadPixels(struct gl_context * ctx,
 216                 GLint x, GLint y, GLsizei width, GLsizei height,
 217                 GLenum format, GLenum type,
 218                 const struct gl_pixelstore_attrib *pack, GLvoid * pixels)
 219 {
 220    bool ok;
 221
 222    struct brw_context *brw = brw_context(ctx);
 223    bool dirty;
 224
 225    DBG("%s\n", __func__);
 226
 227    if (_mesa_is_bufferobj(pack->BufferObj)) {
 228       if (_mesa_meta_pbo_GetTexSubImage(ctx, 2, NULL, x, y, 0, width, height, 1,
 229                                         format, type, pixels, pack)) {
 230          /* _mesa_meta_pbo_GetTexSubImage() implements PBO transfers by
 231           * binding the user-provided BO as a fake framebuffer and rendering
 232           * to it.  This breaks the invariant of the GL that nothing is able
 233           * to render to a BO, causing nondeterministic corruption issues
 234           * because the render cache is not coherent with a number of other
 235           * caches that the BO could potentially be bound to afterwards.
 236           *
 237           * This could be solved in the same way that we guarantee texture
 238           * coherency after a texture is attached to a framebuffer and
 239           * rendered to, but that would involve checking *all* BOs bound to
 240           * the pipeline for the case we need to emit a cache flush due to
 241           * previous rendering to any of them -- Including vertex, index,
 242           * uniform, atomic counter, shader image, transform feedback,
 243           * indirect draw buffers, etc.
 244           *
 245           * That would increase the per-draw call overhead even though it's
 246           * very unlikely that any of the BOs bound to the pipeline has been
 247           * rendered to via a PBO at any point, so it seems better to just
 248           * flush here unconditionally.
 249           */
 250          brw_emit_mi_flush(brw);
 251          return;
 252       }
 253
 254       perf_debug("%s: fallback to CPU mapping in PBO case\n", __func__);
 255    }
 256
 257    /* Reading pixels wont dirty the front buffer, so reset the dirty
 258     * flag after calling intel_prepare_render(). */
 259    dirty = brw->front_buffer_dirty;
 260    intel_prepare_render(brw);
 261    brw->front_buffer_dirty = dirty;
 262
 263    ok = intel_readpixels_tiled_memcpy(ctx, x, y, width, height,
 264                                       format, type, pixels, pack);
 265    if(ok)
 266       return;
 267
 268    /* Update Mesa state before calling _mesa_readpixels().
 269     * XXX this may not be needed since ReadPixels no longer uses the
 270     * span code.
 271     */
 272
 273    if (ctx->NewState)
 274       _mesa_update_state(ctx);
 275
 276    _mesa_readpixels(ctx, x, y, width, height, format, type, pack, pixels);
 277
 278    /* There's an intel_prepare_render() call in intelSpanRenderStart(). */
 279    brw->front_buffer_dirty = dirty;
 280 }