i965: Add support for RGB565 __DRIimage
[mesa.git] / src / mesa / drivers / dri / i965 / intel_screen.c
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #include <errno.h>
29 #include <time.h>
30 #include "main/glheader.h"
31 #include "main/context.h"
32 #include "main/framebuffer.h"
33 #include "main/renderbuffer.h"
34 #include "main/texobj.h"
35 #include "main/hash.h"
36 #include "main/fbobject.h"
37 #include "main/version.h"
38 #include "swrast/s_renderbuffer.h"
39
40 #include "utils.h"
41 #include "xmlpool.h"
42
43 PUBLIC const char __driConfigOptions[] =
44 DRI_CONF_BEGIN
45 DRI_CONF_SECTION_PERFORMANCE
46 DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_ALWAYS_SYNC)
47 /* Options correspond to DRI_CONF_BO_REUSE_DISABLED,
48 * DRI_CONF_BO_REUSE_ALL
49 */
50 DRI_CONF_OPT_BEGIN_V(bo_reuse, enum, 1, "0:1")
51 DRI_CONF_DESC_BEGIN(en, "Buffer object reuse")
52 DRI_CONF_ENUM(0, "Disable buffer object reuse")
53 DRI_CONF_ENUM(1, "Enable reuse of all sizes of buffer objects")
54 DRI_CONF_DESC_END
55 DRI_CONF_OPT_END
56
57 DRI_CONF_OPT_BEGIN_B(hiz, "true")
58 DRI_CONF_DESC(en, "Enable Hierarchical Z on gen6+")
59 DRI_CONF_OPT_END
60
61 DRI_CONF_OPT_BEGIN_B(disable_derivative_optimization, "false")
62 DRI_CONF_DESC(en, "Derivatives with finer granularity by default")
63 DRI_CONF_OPT_END
64
65 DRI_CONF_SECTION_END
66 DRI_CONF_SECTION_QUALITY
67 DRI_CONF_FORCE_S3TC_ENABLE("false")
68 DRI_CONF_SECTION_END
69 DRI_CONF_SECTION_DEBUG
70 DRI_CONF_NO_RAST("false")
71 DRI_CONF_ALWAYS_FLUSH_BATCH("false")
72 DRI_CONF_ALWAYS_FLUSH_CACHE("false")
73 DRI_CONF_DISABLE_THROTTLING("false")
74 DRI_CONF_FORCE_GLSL_EXTENSIONS_WARN("false")
75 DRI_CONF_DISABLE_GLSL_LINE_CONTINUATIONS("false")
76 DRI_CONF_DISABLE_BLEND_FUNC_EXTENDED("false")
77
78 DRI_CONF_OPT_BEGIN_B(shader_precompile, "true")
79 DRI_CONF_DESC(en, "Perform code generation at shader link time.")
80 DRI_CONF_OPT_END
81 DRI_CONF_SECTION_END
82 DRI_CONF_END;
83
84 #include "intel_batchbuffer.h"
85 #include "intel_buffers.h"
86 #include "intel_bufmgr.h"
87 #include "intel_chipset.h"
88 #include "intel_fbo.h"
89 #include "intel_mipmap_tree.h"
90 #include "intel_screen.h"
91 #include "intel_tex.h"
92 #include "intel_regions.h"
93
94 #include "brw_context.h"
95
96 #include "i915_drm.h"
97
98 #ifdef USE_NEW_INTERFACE
99 static PFNGLXCREATECONTEXTMODES create_context_modes = NULL;
100 #endif /*USE_NEW_INTERFACE */
101
102 /**
103 * For debugging purposes, this returns a time in seconds.
104 */
105 double
106 get_time(void)
107 {
108 struct timespec tp;
109
110 clock_gettime(CLOCK_MONOTONIC, &tp);
111
112 return tp.tv_sec + tp.tv_nsec / 1000000000.0;
113 }
114
115 void
116 aub_dump_bmp(struct gl_context *ctx)
117 {
118 struct gl_framebuffer *fb = ctx->DrawBuffer;
119
120 for (int i = 0; i < fb->_NumColorDrawBuffers; i++) {
121 struct intel_renderbuffer *irb =
122 intel_renderbuffer(fb->_ColorDrawBuffers[i]);
123
124 if (irb && irb->mt) {
125 enum aub_dump_bmp_format format;
126
127 switch (irb->Base.Base.Format) {
128 case MESA_FORMAT_ARGB8888:
129 case MESA_FORMAT_XRGB8888:
130 format = AUB_DUMP_BMP_FORMAT_ARGB_8888;
131 break;
132 default:
133 continue;
134 }
135
136 assert(irb->mt->region->pitch % irb->mt->region->cpp == 0);
137 drm_intel_gem_bo_aub_dump_bmp(irb->mt->region->bo,
138 irb->draw_x,
139 irb->draw_y,
140 irb->Base.Base.Width,
141 irb->Base.Base.Height,
142 format,
143 irb->mt->region->pitch,
144 0);
145 }
146 }
147 }
148
149 static const __DRItexBufferExtension intelTexBufferExtension = {
150 .base = { __DRI_TEX_BUFFER, __DRI_TEX_BUFFER_VERSION },
151
152 .setTexBuffer = intelSetTexBuffer,
153 .setTexBuffer2 = intelSetTexBuffer2,
154 .releaseTexBuffer = NULL,
155 };
156
157 static void
158 intel_dri2_flush_with_flags(__DRIcontext *cPriv,
159 __DRIdrawable *dPriv,
160 unsigned flags,
161 enum __DRI2throttleReason reason)
162 {
163 struct brw_context *brw = cPriv->driverPrivate;
164
165 if (!brw)
166 return;
167
168 struct gl_context *ctx = &brw->ctx;
169
170 FLUSH_VERTICES(ctx, 0);
171
172 if (flags & __DRI2_FLUSH_DRAWABLE)
173 intel_resolve_for_dri2_flush(brw, dPriv);
174
175 if (reason == __DRI2_THROTTLE_SWAPBUFFER ||
176 reason == __DRI2_THROTTLE_FLUSHFRONT) {
177 brw->need_throttle = true;
178 }
179
180 intel_batchbuffer_flush(brw);
181
182 if (INTEL_DEBUG & DEBUG_AUB) {
183 aub_dump_bmp(ctx);
184 }
185 }
186
187 /**
188 * Provides compatibility with loaders that only support the older (version
189 * 1-3) flush interface.
190 *
191 * That includes libGL up to Mesa 9.0, and the X Server at least up to 1.13.
192 */
193 static void
194 intel_dri2_flush(__DRIdrawable *drawable)
195 {
196 intel_dri2_flush_with_flags(drawable->driContextPriv, drawable,
197 __DRI2_FLUSH_DRAWABLE,
198 __DRI2_THROTTLE_SWAPBUFFER);
199 }
200
201 static const struct __DRI2flushExtensionRec intelFlushExtension = {
202 .base = { __DRI2_FLUSH, 4 },
203
204 .flush = intel_dri2_flush,
205 .invalidate = dri2InvalidateDrawable,
206 .flush_with_flags = intel_dri2_flush_with_flags,
207 };
208
209 static struct intel_image_format intel_image_formats[] = {
210 { __DRI_IMAGE_FOURCC_ARGB8888, __DRI_IMAGE_COMPONENTS_RGBA, 1,
211 { { 0, 0, 0, __DRI_IMAGE_FORMAT_ARGB8888, 4 } } },
212
213 { __DRI_IMAGE_FOURCC_XRGB8888, __DRI_IMAGE_COMPONENTS_RGB, 1,
214 { { 0, 0, 0, __DRI_IMAGE_FORMAT_XRGB8888, 4 }, } },
215
216 { __DRI_IMAGE_FOURCC_RGB565, __DRI_IMAGE_COMPONENTS_RGB, 1,
217 { { 0, 0, 0, __DRI_IMAGE_FORMAT_RGB565, 2 } } },
218
219 { __DRI_IMAGE_FOURCC_YUV410, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
220 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
221 { 1, 2, 2, __DRI_IMAGE_FORMAT_R8, 1 },
222 { 2, 2, 2, __DRI_IMAGE_FORMAT_R8, 1 } } },
223
224 { __DRI_IMAGE_FOURCC_YUV411, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
225 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
226 { 1, 2, 0, __DRI_IMAGE_FORMAT_R8, 1 },
227 { 2, 2, 0, __DRI_IMAGE_FORMAT_R8, 1 } } },
228
229 { __DRI_IMAGE_FOURCC_YUV420, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
230 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
231 { 1, 1, 1, __DRI_IMAGE_FORMAT_R8, 1 },
232 { 2, 1, 1, __DRI_IMAGE_FORMAT_R8, 1 } } },
233
234 { __DRI_IMAGE_FOURCC_YUV422, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
235 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
236 { 1, 1, 0, __DRI_IMAGE_FORMAT_R8, 1 },
237 { 2, 1, 0, __DRI_IMAGE_FORMAT_R8, 1 } } },
238
239 { __DRI_IMAGE_FOURCC_YUV444, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
240 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
241 { 1, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
242 { 2, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 } } },
243
244 { __DRI_IMAGE_FOURCC_NV12, __DRI_IMAGE_COMPONENTS_Y_UV, 2,
245 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
246 { 1, 1, 1, __DRI_IMAGE_FORMAT_GR88, 2 } } },
247
248 { __DRI_IMAGE_FOURCC_NV16, __DRI_IMAGE_COMPONENTS_Y_UV, 2,
249 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
250 { 1, 1, 0, __DRI_IMAGE_FORMAT_GR88, 2 } } },
251
252 /* For YUYV buffers, we set up two overlapping DRI images and treat
253 * them as planar buffers in the compositors. Plane 0 is GR88 and
254 * samples YU or YV pairs and places Y into the R component, while
255 * plane 1 is ARGB and samples YUYV clusters and places pairs and
256 * places U into the G component and V into A. This lets the
257 * texture sampler interpolate the Y components correctly when
258 * sampling from plane 0, and interpolate U and V correctly when
259 * sampling from plane 1. */
260 { __DRI_IMAGE_FOURCC_YUYV, __DRI_IMAGE_COMPONENTS_Y_XUXV, 2,
261 { { 0, 0, 0, __DRI_IMAGE_FORMAT_GR88, 2 },
262 { 0, 1, 0, __DRI_IMAGE_FORMAT_ARGB8888, 4 } } }
263 };
264
265 static struct intel_image_format *
266 intel_image_format_lookup(int fourcc)
267 {
268 struct intel_image_format *f = NULL;
269
270 for (unsigned i = 0; i < ARRAY_SIZE(intel_image_formats); i++) {
271 if (intel_image_formats[i].fourcc == fourcc) {
272 f = &intel_image_formats[i];
273 break;
274 }
275 }
276
277 return f;
278 }
279
280 static __DRIimage *
281 intel_allocate_image(int dri_format, void *loaderPrivate)
282 {
283 __DRIimage *image;
284
285 image = calloc(1, sizeof *image);
286 if (image == NULL)
287 return NULL;
288
289 image->dri_format = dri_format;
290 image->offset = 0;
291
292 switch (dri_format) {
293 case __DRI_IMAGE_FORMAT_RGB565:
294 image->format = MESA_FORMAT_RGB565;
295 break;
296 case __DRI_IMAGE_FORMAT_XRGB8888:
297 image->format = MESA_FORMAT_XRGB8888;
298 break;
299 case __DRI_IMAGE_FORMAT_ARGB8888:
300 image->format = MESA_FORMAT_ARGB8888;
301 break;
302 case __DRI_IMAGE_FORMAT_ABGR8888:
303 image->format = MESA_FORMAT_RGBA8888_REV;
304 break;
305 case __DRI_IMAGE_FORMAT_XBGR8888:
306 image->format = MESA_FORMAT_RGBX8888_REV;
307 break;
308 case __DRI_IMAGE_FORMAT_R8:
309 image->format = MESA_FORMAT_R8;
310 break;
311 case __DRI_IMAGE_FORMAT_GR88:
312 image->format = MESA_FORMAT_GR88;
313 break;
314 case __DRI_IMAGE_FORMAT_NONE:
315 image->format = MESA_FORMAT_NONE;
316 break;
317 default:
318 free(image);
319 return NULL;
320 }
321
322 image->internal_format = _mesa_get_format_base_format(image->format);
323 image->data = loaderPrivate;
324
325 return image;
326 }
327
328 /**
329 * Sets up a DRIImage structure to point to our shared image in a region
330 */
331 static void
332 intel_setup_image_from_mipmap_tree(struct brw_context *brw, __DRIimage *image,
333 struct intel_mipmap_tree *mt, GLuint level,
334 GLuint zoffset)
335 {
336 unsigned int draw_x, draw_y;
337 uint32_t mask_x, mask_y;
338
339 intel_miptree_make_shareable(brw, mt);
340
341 intel_miptree_check_level_layer(mt, level, zoffset);
342
343 intel_region_get_tile_masks(mt->region, &mask_x, &mask_y, false);
344 intel_miptree_get_image_offset(mt, level, zoffset, &draw_x, &draw_y);
345
346 image->width = mt->level[level].width;
347 image->height = mt->level[level].height;
348 image->tile_x = draw_x & mask_x;
349 image->tile_y = draw_y & mask_y;
350
351 image->offset = intel_region_get_aligned_offset(mt->region,
352 draw_x & ~mask_x,
353 draw_y & ~mask_y,
354 false);
355
356 intel_region_reference(&image->region, mt->region);
357 }
358
359 static void
360 intel_setup_image_from_dimensions(__DRIimage *image)
361 {
362 image->width = image->region->width;
363 image->height = image->region->height;
364 image->tile_x = 0;
365 image->tile_y = 0;
366 image->has_depthstencil = false;
367 }
368
369 static inline uint32_t
370 intel_dri_format(GLuint format)
371 {
372 switch (format) {
373 case MESA_FORMAT_RGB565:
374 return __DRI_IMAGE_FORMAT_RGB565;
375 case MESA_FORMAT_XRGB8888:
376 return __DRI_IMAGE_FORMAT_XRGB8888;
377 case MESA_FORMAT_ARGB8888:
378 return __DRI_IMAGE_FORMAT_ARGB8888;
379 case MESA_FORMAT_RGBA8888_REV:
380 return __DRI_IMAGE_FORMAT_ABGR8888;
381 case MESA_FORMAT_R8:
382 return __DRI_IMAGE_FORMAT_R8;
383 case MESA_FORMAT_RG88:
384 return __DRI_IMAGE_FORMAT_GR88;
385 }
386
387 return MESA_FORMAT_NONE;
388 }
389
390 static __DRIimage *
391 intel_create_image_from_name(__DRIscreen *screen,
392 int width, int height, int format,
393 int name, int pitch, void *loaderPrivate)
394 {
395 struct intel_screen *intelScreen = screen->driverPrivate;
396 __DRIimage *image;
397 int cpp;
398
399 image = intel_allocate_image(format, loaderPrivate);
400 if (image == NULL)
401 return NULL;
402
403 if (image->format == MESA_FORMAT_NONE)
404 cpp = 1;
405 else
406 cpp = _mesa_get_format_bytes(image->format);
407 image->region = intel_region_alloc_for_handle(intelScreen,
408 cpp, width, height,
409 pitch * cpp, name, "image");
410 if (image->region == NULL) {
411 free(image);
412 return NULL;
413 }
414
415 intel_setup_image_from_dimensions(image);
416
417 return image;
418 }
419
420 static __DRIimage *
421 intel_create_image_from_renderbuffer(__DRIcontext *context,
422 int renderbuffer, void *loaderPrivate)
423 {
424 __DRIimage *image;
425 struct brw_context *brw = context->driverPrivate;
426 struct gl_context *ctx = &brw->ctx;
427 struct gl_renderbuffer *rb;
428 struct intel_renderbuffer *irb;
429
430 rb = _mesa_lookup_renderbuffer(ctx, renderbuffer);
431 if (!rb) {
432 _mesa_error(ctx, GL_INVALID_OPERATION, "glRenderbufferExternalMESA");
433 return NULL;
434 }
435
436 irb = intel_renderbuffer(rb);
437 intel_miptree_make_shareable(brw, irb->mt);
438 image = calloc(1, sizeof *image);
439 if (image == NULL)
440 return NULL;
441
442 image->internal_format = rb->InternalFormat;
443 image->format = rb->Format;
444 image->offset = 0;
445 image->data = loaderPrivate;
446 intel_region_reference(&image->region, irb->mt->region);
447 intel_setup_image_from_dimensions(image);
448 image->dri_format = intel_dri_format(image->format);
449 image->has_depthstencil = irb->mt->stencil_mt? true : false;
450
451 rb->NeedsFinishRenderTexture = true;
452 return image;
453 }
454
455 static __DRIimage *
456 intel_create_image_from_texture(__DRIcontext *context, int target,
457 unsigned texture, int zoffset,
458 int level,
459 unsigned *error,
460 void *loaderPrivate)
461 {
462 __DRIimage *image;
463 struct brw_context *brw = context->driverPrivate;
464 struct gl_texture_object *obj;
465 struct intel_texture_object *iobj;
466 GLuint face = 0;
467
468 obj = _mesa_lookup_texture(&brw->ctx, texture);
469 if (!obj || obj->Target != target) {
470 *error = __DRI_IMAGE_ERROR_BAD_PARAMETER;
471 return NULL;
472 }
473
474 if (target == GL_TEXTURE_CUBE_MAP)
475 face = zoffset;
476
477 _mesa_test_texobj_completeness(&brw->ctx, obj);
478 iobj = intel_texture_object(obj);
479 if (!obj->_BaseComplete || (level > 0 && !obj->_MipmapComplete)) {
480 *error = __DRI_IMAGE_ERROR_BAD_PARAMETER;
481 return NULL;
482 }
483
484 if (level < obj->BaseLevel || level > obj->_MaxLevel) {
485 *error = __DRI_IMAGE_ERROR_BAD_MATCH;
486 return NULL;
487 }
488
489 if (target == GL_TEXTURE_3D && obj->Image[face][level]->Depth < zoffset) {
490 *error = __DRI_IMAGE_ERROR_BAD_MATCH;
491 return NULL;
492 }
493 image = calloc(1, sizeof *image);
494 if (image == NULL) {
495 *error = __DRI_IMAGE_ERROR_BAD_ALLOC;
496 return NULL;
497 }
498
499 image->internal_format = obj->Image[face][level]->InternalFormat;
500 image->format = obj->Image[face][level]->TexFormat;
501 image->data = loaderPrivate;
502 intel_setup_image_from_mipmap_tree(brw, image, iobj->mt, level, zoffset);
503 image->dri_format = intel_dri_format(image->format);
504 image->has_depthstencil = iobj->mt->stencil_mt? true : false;
505 if (image->dri_format == MESA_FORMAT_NONE) {
506 *error = __DRI_IMAGE_ERROR_BAD_PARAMETER;
507 free(image);
508 return NULL;
509 }
510
511 *error = __DRI_IMAGE_ERROR_SUCCESS;
512 return image;
513 }
514
515 static void
516 intel_destroy_image(__DRIimage *image)
517 {
518 intel_region_release(&image->region);
519 free(image);
520 }
521
522 static __DRIimage *
523 intel_create_image(__DRIscreen *screen,
524 int width, int height, int format,
525 unsigned int use,
526 void *loaderPrivate)
527 {
528 __DRIimage *image;
529 struct intel_screen *intelScreen = screen->driverPrivate;
530 uint32_t tiling;
531 int cpp;
532
533 tiling = I915_TILING_X;
534 if (use & __DRI_IMAGE_USE_CURSOR) {
535 if (width != 64 || height != 64)
536 return NULL;
537 tiling = I915_TILING_NONE;
538 }
539
540 if (use & __DRI_IMAGE_USE_LINEAR)
541 tiling = I915_TILING_NONE;
542
543 image = intel_allocate_image(format, loaderPrivate);
544 if (image == NULL)
545 return NULL;
546
547 cpp = _mesa_get_format_bytes(image->format);
548 image->region =
549 intel_region_alloc(intelScreen, tiling, cpp, width, height, true);
550 if (image->region == NULL) {
551 free(image);
552 return NULL;
553 }
554
555 intel_setup_image_from_dimensions(image);
556
557 return image;
558 }
559
560 static GLboolean
561 intel_query_image(__DRIimage *image, int attrib, int *value)
562 {
563 switch (attrib) {
564 case __DRI_IMAGE_ATTRIB_STRIDE:
565 *value = image->region->pitch;
566 return true;
567 case __DRI_IMAGE_ATTRIB_HANDLE:
568 *value = image->region->bo->handle;
569 return true;
570 case __DRI_IMAGE_ATTRIB_NAME:
571 return intel_region_flink(image->region, (uint32_t *) value);
572 case __DRI_IMAGE_ATTRIB_FORMAT:
573 *value = image->dri_format;
574 return true;
575 case __DRI_IMAGE_ATTRIB_WIDTH:
576 *value = image->region->width;
577 return true;
578 case __DRI_IMAGE_ATTRIB_HEIGHT:
579 *value = image->region->height;
580 return true;
581 case __DRI_IMAGE_ATTRIB_COMPONENTS:
582 if (image->planar_format == NULL)
583 return false;
584 *value = image->planar_format->components;
585 return true;
586 case __DRI_IMAGE_ATTRIB_FD:
587 if (drm_intel_bo_gem_export_to_prime(image->region->bo, value) == 0)
588 return true;
589 return false;
590 default:
591 return false;
592 }
593 }
594
595 static __DRIimage *
596 intel_dup_image(__DRIimage *orig_image, void *loaderPrivate)
597 {
598 __DRIimage *image;
599
600 image = calloc(1, sizeof *image);
601 if (image == NULL)
602 return NULL;
603
604 intel_region_reference(&image->region, orig_image->region);
605 if (image->region == NULL) {
606 free(image);
607 return NULL;
608 }
609
610 image->internal_format = orig_image->internal_format;
611 image->planar_format = orig_image->planar_format;
612 image->dri_format = orig_image->dri_format;
613 image->format = orig_image->format;
614 image->offset = orig_image->offset;
615 image->width = orig_image->width;
616 image->height = orig_image->height;
617 image->tile_x = orig_image->tile_x;
618 image->tile_y = orig_image->tile_y;
619 image->has_depthstencil = orig_image->has_depthstencil;
620 image->data = loaderPrivate;
621
622 memcpy(image->strides, orig_image->strides, sizeof(image->strides));
623 memcpy(image->offsets, orig_image->offsets, sizeof(image->offsets));
624
625 return image;
626 }
627
628 static GLboolean
629 intel_validate_usage(__DRIimage *image, unsigned int use)
630 {
631 if (use & __DRI_IMAGE_USE_CURSOR) {
632 if (image->region->width != 64 || image->region->height != 64)
633 return GL_FALSE;
634 }
635
636 return GL_TRUE;
637 }
638
639 static __DRIimage *
640 intel_create_image_from_names(__DRIscreen *screen,
641 int width, int height, int fourcc,
642 int *names, int num_names,
643 int *strides, int *offsets,
644 void *loaderPrivate)
645 {
646 struct intel_image_format *f = NULL;
647 __DRIimage *image;
648 int i, index;
649
650 if (screen == NULL || names == NULL || num_names != 1)
651 return NULL;
652
653 f = intel_image_format_lookup(fourcc);
654 if (f == NULL)
655 return NULL;
656
657 image = intel_create_image_from_name(screen, width, height,
658 __DRI_IMAGE_FORMAT_NONE,
659 names[0], strides[0],
660 loaderPrivate);
661
662 if (image == NULL)
663 return NULL;
664
665 image->planar_format = f;
666 for (i = 0; i < f->nplanes; i++) {
667 index = f->planes[i].buffer_index;
668 image->offsets[index] = offsets[index];
669 image->strides[index] = strides[index];
670 }
671
672 return image;
673 }
674
675 static __DRIimage *
676 intel_create_image_from_fds(__DRIscreen *screen,
677 int width, int height, int fourcc,
678 int *fds, int num_fds, int *strides, int *offsets,
679 void *loaderPrivate)
680 {
681 struct intel_screen *intelScreen = screen->driverPrivate;
682 struct intel_image_format *f;
683 __DRIimage *image;
684 int i, index;
685
686 if (fds == NULL || num_fds != 1)
687 return NULL;
688
689 f = intel_image_format_lookup(fourcc);
690 if (f == NULL)
691 return NULL;
692
693 if (f->nplanes == 1)
694 image = intel_allocate_image(f->planes[0].dri_format, loaderPrivate);
695 else
696 image = intel_allocate_image(__DRI_IMAGE_FORMAT_NONE, loaderPrivate);
697
698 if (image == NULL)
699 return NULL;
700
701 image->region = intel_region_alloc_for_fd(intelScreen,
702 1, width, height,
703 strides[0], fds[0], "image");
704 if (image->region == NULL) {
705 free(image);
706 return NULL;
707 }
708
709 image->planar_format = f;
710 for (i = 0; i < f->nplanes; i++) {
711 index = f->planes[i].buffer_index;
712 image->offsets[index] = offsets[index];
713 image->strides[index] = strides[index];
714 }
715
716 intel_setup_image_from_dimensions(image);
717
718 return image;
719 }
720
721 static __DRIimage *
722 intel_create_image_from_dma_bufs(__DRIscreen *screen,
723 int width, int height, int fourcc,
724 int *fds, int num_fds,
725 int *strides, int *offsets,
726 enum __DRIYUVColorSpace yuv_color_space,
727 enum __DRISampleRange sample_range,
728 enum __DRIChromaSiting horizontal_siting,
729 enum __DRIChromaSiting vertical_siting,
730 unsigned *error,
731 void *loaderPrivate)
732 {
733 __DRIimage *image;
734 struct intel_image_format *f = intel_image_format_lookup(fourcc);
735
736 /* For now only packed formats that have native sampling are supported. */
737 if (!f || f->nplanes != 1) {
738 *error = __DRI_IMAGE_ERROR_BAD_MATCH;
739 return NULL;
740 }
741
742 image = intel_create_image_from_fds(screen, width, height, fourcc, fds,
743 num_fds, strides, offsets,
744 loaderPrivate);
745
746 /*
747 * Invalid parameters and any inconsistencies between are assumed to be
748 * checked by the caller. Therefore besides unsupported formats one can fail
749 * only in allocation.
750 */
751 if (!image) {
752 *error = __DRI_IMAGE_ERROR_BAD_ALLOC;
753 return NULL;
754 }
755
756 image->dma_buf_imported = true;
757 image->yuv_color_space = yuv_color_space;
758 image->sample_range = sample_range;
759 image->horizontal_siting = horizontal_siting;
760 image->vertical_siting = vertical_siting;
761
762 *error = __DRI_IMAGE_ERROR_SUCCESS;
763 return image;
764 }
765
766 static __DRIimage *
767 intel_from_planar(__DRIimage *parent, int plane, void *loaderPrivate)
768 {
769 int width, height, offset, stride, dri_format, index;
770 struct intel_image_format *f;
771 uint32_t mask_x, mask_y;
772 __DRIimage *image;
773
774 if (parent == NULL || parent->planar_format == NULL)
775 return NULL;
776
777 f = parent->planar_format;
778
779 if (plane >= f->nplanes)
780 return NULL;
781
782 width = parent->region->width >> f->planes[plane].width_shift;
783 height = parent->region->height >> f->planes[plane].height_shift;
784 dri_format = f->planes[plane].dri_format;
785 index = f->planes[plane].buffer_index;
786 offset = parent->offsets[index];
787 stride = parent->strides[index];
788
789 image = intel_allocate_image(dri_format, loaderPrivate);
790 if (image == NULL)
791 return NULL;
792
793 if (offset + height * stride > parent->region->bo->size) {
794 _mesa_warning(NULL, "intel_create_sub_image: subimage out of bounds");
795 free(image);
796 return NULL;
797 }
798
799 image->region = calloc(sizeof(*image->region), 1);
800 if (image->region == NULL) {
801 free(image);
802 return NULL;
803 }
804
805 image->region->cpp = _mesa_get_format_bytes(image->format);
806 image->region->width = width;
807 image->region->height = height;
808 image->region->pitch = stride;
809 image->region->refcount = 1;
810 image->region->bo = parent->region->bo;
811 drm_intel_bo_reference(image->region->bo);
812 image->region->tiling = parent->region->tiling;
813 image->offset = offset;
814 intel_setup_image_from_dimensions(image);
815
816 intel_region_get_tile_masks(image->region, &mask_x, &mask_y, false);
817 if (offset & mask_x)
818 _mesa_warning(NULL,
819 "intel_create_sub_image: offset not on tile boundary");
820
821 return image;
822 }
823
824 static struct __DRIimageExtensionRec intelImageExtension = {
825 .base = { __DRI_IMAGE, 8 },
826
827 .createImageFromName = intel_create_image_from_name,
828 .createImageFromRenderbuffer = intel_create_image_from_renderbuffer,
829 .destroyImage = intel_destroy_image,
830 .createImage = intel_create_image,
831 .queryImage = intel_query_image,
832 .dupImage = intel_dup_image,
833 .validateUsage = intel_validate_usage,
834 .createImageFromNames = intel_create_image_from_names,
835 .fromPlanar = intel_from_planar,
836 .createImageFromTexture = intel_create_image_from_texture,
837 .createImageFromFds = intel_create_image_from_fds,
838 .createImageFromDmaBufs = intel_create_image_from_dma_bufs
839 };
840
841 static const __DRIextension *intelScreenExtensions[] = {
842 &intelTexBufferExtension.base,
843 &intelFlushExtension.base,
844 &intelImageExtension.base,
845 &dri2ConfigQueryExtension.base,
846 NULL
847 };
848
849 static bool
850 intel_get_param(__DRIscreen *psp, int param, int *value)
851 {
852 int ret;
853 struct drm_i915_getparam gp;
854
855 memset(&gp, 0, sizeof(gp));
856 gp.param = param;
857 gp.value = value;
858
859 ret = drmCommandWriteRead(psp->fd, DRM_I915_GETPARAM, &gp, sizeof(gp));
860 if (ret) {
861 if (ret != -EINVAL)
862 _mesa_warning(NULL, "drm_i915_getparam: %d", ret);
863 return false;
864 }
865
866 return true;
867 }
868
869 static bool
870 intel_get_boolean(__DRIscreen *psp, int param)
871 {
872 int value = 0;
873 return intel_get_param(psp, param, &value) && value;
874 }
875
876 static void
877 intelDestroyScreen(__DRIscreen * sPriv)
878 {
879 struct intel_screen *intelScreen = sPriv->driverPrivate;
880
881 dri_bufmgr_destroy(intelScreen->bufmgr);
882 driDestroyOptionInfo(&intelScreen->optionCache);
883
884 free(intelScreen);
885 sPriv->driverPrivate = NULL;
886 }
887
888
889 /**
890 * This is called when we need to set up GL rendering to a new X window.
891 */
892 static GLboolean
893 intelCreateBuffer(__DRIscreen * driScrnPriv,
894 __DRIdrawable * driDrawPriv,
895 const struct gl_config * mesaVis, GLboolean isPixmap)
896 {
897 struct intel_renderbuffer *rb;
898 struct intel_screen *screen = (struct intel_screen*) driScrnPriv->driverPrivate;
899 gl_format rgbFormat;
900 unsigned num_samples = intel_quantize_num_samples(screen, mesaVis->samples);
901 struct gl_framebuffer *fb;
902
903 if (isPixmap)
904 return false;
905
906 fb = CALLOC_STRUCT(gl_framebuffer);
907 if (!fb)
908 return false;
909
910 _mesa_initialize_window_framebuffer(fb, mesaVis);
911
912 if (mesaVis->redBits == 5)
913 rgbFormat = MESA_FORMAT_RGB565;
914 else if (mesaVis->sRGBCapable)
915 rgbFormat = MESA_FORMAT_SARGB8;
916 else if (mesaVis->alphaBits == 0)
917 rgbFormat = MESA_FORMAT_XRGB8888;
918 else {
919 rgbFormat = MESA_FORMAT_SARGB8;
920 fb->Visual.sRGBCapable = true;
921 }
922
923 /* setup the hardware-based renderbuffers */
924 rb = intel_create_renderbuffer(rgbFormat, num_samples);
925 _mesa_add_renderbuffer(fb, BUFFER_FRONT_LEFT, &rb->Base.Base);
926
927 if (mesaVis->doubleBufferMode) {
928 rb = intel_create_renderbuffer(rgbFormat, num_samples);
929 _mesa_add_renderbuffer(fb, BUFFER_BACK_LEFT, &rb->Base.Base);
930 }
931
932 /*
933 * Assert here that the gl_config has an expected depth/stencil bit
934 * combination: one of d24/s8, d16/s0, d0/s0. (See intelInitScreen2(),
935 * which constructs the advertised configs.)
936 */
937 if (mesaVis->depthBits == 24) {
938 assert(mesaVis->stencilBits == 8);
939
940 if (screen->devinfo->has_hiz_and_separate_stencil) {
941 rb = intel_create_private_renderbuffer(MESA_FORMAT_X8_Z24,
942 num_samples);
943 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
944 rb = intel_create_private_renderbuffer(MESA_FORMAT_S8,
945 num_samples);
946 _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &rb->Base.Base);
947 } else {
948 /*
949 * Use combined depth/stencil. Note that the renderbuffer is
950 * attached to two attachment points.
951 */
952 rb = intel_create_private_renderbuffer(MESA_FORMAT_S8_Z24,
953 num_samples);
954 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
955 _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &rb->Base.Base);
956 }
957 }
958 else if (mesaVis->depthBits == 16) {
959 assert(mesaVis->stencilBits == 0);
960 rb = intel_create_private_renderbuffer(MESA_FORMAT_Z16,
961 num_samples);
962 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
963 }
964 else {
965 assert(mesaVis->depthBits == 0);
966 assert(mesaVis->stencilBits == 0);
967 }
968
969 /* now add any/all software-based renderbuffers we may need */
970 _swrast_add_soft_renderbuffers(fb,
971 false, /* never sw color */
972 false, /* never sw depth */
973 false, /* never sw stencil */
974 mesaVis->accumRedBits > 0,
975 false, /* never sw alpha */
976 false /* never sw aux */ );
977 driDrawPriv->driverPrivate = fb;
978
979 return true;
980 }
981
982 static void
983 intelDestroyBuffer(__DRIdrawable * driDrawPriv)
984 {
985 struct gl_framebuffer *fb = driDrawPriv->driverPrivate;
986
987 _mesa_reference_framebuffer(&fb, NULL);
988 }
989
990 static bool
991 intel_init_bufmgr(struct intel_screen *intelScreen)
992 {
993 __DRIscreen *spriv = intelScreen->driScrnPriv;
994
995 intelScreen->no_hw = getenv("INTEL_NO_HW") != NULL;
996
997 intelScreen->bufmgr = intel_bufmgr_gem_init(spriv->fd, BATCH_SZ);
998 if (intelScreen->bufmgr == NULL) {
999 fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n",
1000 __func__, __LINE__);
1001 return false;
1002 }
1003
1004 drm_intel_bufmgr_gem_enable_fenced_relocs(intelScreen->bufmgr);
1005
1006 if (!intel_get_boolean(spriv, I915_PARAM_HAS_RELAXED_DELTA)) {
1007 fprintf(stderr, "[%s: %u] Kernel 2.6.39 required.\n", __func__, __LINE__);
1008 return false;
1009 }
1010
1011 return true;
1012 }
1013
1014 static bool
1015 intel_detect_swizzling(struct intel_screen *screen)
1016 {
1017 drm_intel_bo *buffer;
1018 unsigned long flags = 0;
1019 unsigned long aligned_pitch;
1020 uint32_t tiling = I915_TILING_X;
1021 uint32_t swizzle_mode = 0;
1022
1023 buffer = drm_intel_bo_alloc_tiled(screen->bufmgr, "swizzle test",
1024 64, 64, 4,
1025 &tiling, &aligned_pitch, flags);
1026 if (buffer == NULL)
1027 return false;
1028
1029 drm_intel_bo_get_tiling(buffer, &tiling, &swizzle_mode);
1030 drm_intel_bo_unreference(buffer);
1031
1032 if (swizzle_mode == I915_BIT_6_SWIZZLE_NONE)
1033 return false;
1034 else
1035 return true;
1036 }
1037
1038 static __DRIconfig**
1039 intel_screen_make_configs(__DRIscreen *dri_screen)
1040 {
1041 static const gl_format formats[] = {
1042 MESA_FORMAT_RGB565,
1043 MESA_FORMAT_ARGB8888
1044 };
1045
1046 /* GLX_SWAP_COPY_OML is not supported due to page flipping. */
1047 static const GLenum back_buffer_modes[] = {
1048 GLX_SWAP_UNDEFINED_OML, GLX_NONE,
1049 };
1050
1051 static const uint8_t singlesample_samples[1] = {0};
1052 static const uint8_t multisample_samples[2] = {4, 8};
1053
1054 struct intel_screen *screen = dri_screen->driverPrivate;
1055 const struct brw_device_info *devinfo = screen->devinfo;
1056 uint8_t depth_bits[4], stencil_bits[4];
1057 __DRIconfig **configs = NULL;
1058
1059 /* Generate singlesample configs without accumulation buffer. */
1060 for (int i = 0; i < ARRAY_SIZE(formats); i++) {
1061 __DRIconfig **new_configs;
1062 int num_depth_stencil_bits = 2;
1063
1064 /* Starting with DRI2 protocol version 1.1 we can request a depth/stencil
1065 * buffer that has a different number of bits per pixel than the color
1066 * buffer, gen >= 6 supports this.
1067 */
1068 depth_bits[0] = 0;
1069 stencil_bits[0] = 0;
1070
1071 if (formats[i] == MESA_FORMAT_RGB565) {
1072 depth_bits[1] = 16;
1073 stencil_bits[1] = 0;
1074 if (devinfo->gen >= 6) {
1075 depth_bits[2] = 24;
1076 stencil_bits[2] = 8;
1077 num_depth_stencil_bits = 3;
1078 }
1079 } else {
1080 depth_bits[1] = 24;
1081 stencil_bits[1] = 8;
1082 }
1083
1084 new_configs = driCreateConfigs(formats[i],
1085 depth_bits,
1086 stencil_bits,
1087 num_depth_stencil_bits,
1088 back_buffer_modes, 2,
1089 singlesample_samples, 1,
1090 false);
1091 configs = driConcatConfigs(configs, new_configs);
1092 }
1093
1094 /* Generate the minimum possible set of configs that include an
1095 * accumulation buffer.
1096 */
1097 for (int i = 0; i < ARRAY_SIZE(formats); i++) {
1098 __DRIconfig **new_configs;
1099
1100 if (formats[i] == MESA_FORMAT_RGB565) {
1101 depth_bits[0] = 16;
1102 stencil_bits[0] = 0;
1103 } else {
1104 depth_bits[0] = 24;
1105 stencil_bits[0] = 8;
1106 }
1107
1108 new_configs = driCreateConfigs(formats[i],
1109 depth_bits, stencil_bits, 1,
1110 back_buffer_modes, 1,
1111 singlesample_samples, 1,
1112 true);
1113 configs = driConcatConfigs(configs, new_configs);
1114 }
1115
1116 /* Generate multisample configs.
1117 *
1118 * This loop breaks early, and hence is a no-op, on gen < 6.
1119 *
1120 * Multisample configs must follow the singlesample configs in order to
1121 * work around an X server bug present in 1.12. The X server chooses to
1122 * associate the first listed RGBA888-Z24S8 config, regardless of its
1123 * sample count, with the 32-bit depth visual used for compositing.
1124 *
1125 * Only doublebuffer configs with GLX_SWAP_UNDEFINED_OML behavior are
1126 * supported. Singlebuffer configs are not supported because no one wants
1127 * them.
1128 */
1129 for (int i = 0; i < ARRAY_SIZE(formats); i++) {
1130 if (devinfo->gen < 6)
1131 break;
1132
1133 __DRIconfig **new_configs;
1134 const int num_depth_stencil_bits = 2;
1135 int num_msaa_modes = 0;
1136
1137 depth_bits[0] = 0;
1138 stencil_bits[0] = 0;
1139
1140 if (formats[i] == MESA_FORMAT_RGB565) {
1141 depth_bits[1] = 16;
1142 stencil_bits[1] = 0;
1143 } else {
1144 depth_bits[1] = 24;
1145 stencil_bits[1] = 8;
1146 }
1147
1148 if (devinfo->gen >= 7)
1149 num_msaa_modes = 2;
1150 else if (devinfo->gen == 6)
1151 num_msaa_modes = 1;
1152
1153 new_configs = driCreateConfigs(formats[i],
1154 depth_bits,
1155 stencil_bits,
1156 num_depth_stencil_bits,
1157 back_buffer_modes, 1,
1158 multisample_samples,
1159 num_msaa_modes,
1160 false);
1161 configs = driConcatConfigs(configs, new_configs);
1162 }
1163
1164 if (configs == NULL) {
1165 fprintf(stderr, "[%s:%u] Error creating FBConfig!\n", __func__,
1166 __LINE__);
1167 return NULL;
1168 }
1169
1170 return configs;
1171 }
1172
1173 static void
1174 set_max_gl_versions(struct intel_screen *screen)
1175 {
1176 __DRIscreen *psp = screen->driScrnPriv;
1177
1178 switch (screen->devinfo->gen) {
1179 case 7:
1180 psp->max_gl_core_version = 32;
1181 psp->max_gl_compat_version = 30;
1182 psp->max_gl_es1_version = 11;
1183 psp->max_gl_es2_version = 30;
1184 break;
1185 case 6:
1186 psp->max_gl_core_version = 31;
1187 psp->max_gl_compat_version = 30;
1188 psp->max_gl_es1_version = 11;
1189 psp->max_gl_es2_version = 30;
1190 break;
1191 case 5:
1192 case 4:
1193 psp->max_gl_core_version = 0;
1194 psp->max_gl_compat_version = 21;
1195 psp->max_gl_es1_version = 11;
1196 psp->max_gl_es2_version = 20;
1197 break;
1198 default:
1199 assert(!"unrecognized intel_screen::gen");
1200 break;
1201 }
1202 }
1203
1204 /**
1205 * This is the driver specific part of the createNewScreen entry point.
1206 * Called when using DRI2.
1207 *
1208 * \return the struct gl_config supported by this driver
1209 */
1210 static const
1211 __DRIconfig **intelInitScreen2(__DRIscreen *psp)
1212 {
1213 struct intel_screen *intelScreen;
1214
1215 if (psp->dri2.loader->base.version <= 2 ||
1216 psp->dri2.loader->getBuffersWithFormat == NULL) {
1217 fprintf(stderr,
1218 "\nERROR! DRI2 loader with getBuffersWithFormat() "
1219 "support required\n");
1220 return false;
1221 }
1222
1223 /* Allocate the private area */
1224 intelScreen = calloc(1, sizeof *intelScreen);
1225 if (!intelScreen) {
1226 fprintf(stderr, "\nERROR! Allocating private area failed\n");
1227 return false;
1228 }
1229 /* parse information in __driConfigOptions */
1230 driParseOptionInfo(&intelScreen->optionCache, __driConfigOptions);
1231
1232 intelScreen->driScrnPriv = psp;
1233 psp->driverPrivate = (void *) intelScreen;
1234
1235 if (!intel_init_bufmgr(intelScreen))
1236 return false;
1237
1238 intelScreen->deviceID = drm_intel_bufmgr_gem_get_devid(intelScreen->bufmgr);
1239 intelScreen->devinfo = brw_get_device_info(intelScreen->deviceID);
1240
1241 intelScreen->hw_must_use_separate_stencil = intelScreen->devinfo->gen >= 7;
1242
1243 intelScreen->hw_has_swizzling = intel_detect_swizzling(intelScreen);
1244
1245 set_max_gl_versions(intelScreen);
1246
1247 psp->extensions = intelScreenExtensions;
1248
1249 return (const __DRIconfig**) intel_screen_make_configs(psp);
1250 }
1251
1252 struct intel_buffer {
1253 __DRIbuffer base;
1254 struct intel_region *region;
1255 };
1256
1257 static __DRIbuffer *
1258 intelAllocateBuffer(__DRIscreen *screen,
1259 unsigned attachment, unsigned format,
1260 int width, int height)
1261 {
1262 struct intel_buffer *intelBuffer;
1263 struct intel_screen *intelScreen = screen->driverPrivate;
1264
1265 assert(attachment == __DRI_BUFFER_FRONT_LEFT ||
1266 attachment == __DRI_BUFFER_BACK_LEFT);
1267
1268 intelBuffer = calloc(1, sizeof *intelBuffer);
1269 if (intelBuffer == NULL)
1270 return NULL;
1271
1272 /* The front and back buffers are color buffers, which are X tiled. */
1273 intelBuffer->region = intel_region_alloc(intelScreen,
1274 I915_TILING_X,
1275 format / 8,
1276 width,
1277 height,
1278 true);
1279
1280 if (intelBuffer->region == NULL) {
1281 free(intelBuffer);
1282 return NULL;
1283 }
1284
1285 intel_region_flink(intelBuffer->region, &intelBuffer->base.name);
1286
1287 intelBuffer->base.attachment = attachment;
1288 intelBuffer->base.cpp = intelBuffer->region->cpp;
1289 intelBuffer->base.pitch = intelBuffer->region->pitch;
1290
1291 return &intelBuffer->base;
1292 }
1293
1294 static void
1295 intelReleaseBuffer(__DRIscreen *screen, __DRIbuffer *buffer)
1296 {
1297 struct intel_buffer *intelBuffer = (struct intel_buffer *) buffer;
1298
1299 intel_region_release(&intelBuffer->region);
1300 free(intelBuffer);
1301 }
1302
1303
1304 const struct __DriverAPIRec driDriverAPI = {
1305 .InitScreen = intelInitScreen2,
1306 .DestroyScreen = intelDestroyScreen,
1307 .CreateContext = brwCreateContext,
1308 .DestroyContext = intelDestroyContext,
1309 .CreateBuffer = intelCreateBuffer,
1310 .DestroyBuffer = intelDestroyBuffer,
1311 .MakeCurrent = intelMakeCurrent,
1312 .UnbindContext = intelUnbindContext,
1313 .AllocateBuffer = intelAllocateBuffer,
1314 .ReleaseBuffer = intelReleaseBuffer
1315 };
1316
1317 /* This is the table of extensions that the loader will dlsym() for. */
1318 PUBLIC const __DRIextension *__driDriverExtensions[] = {
1319 &driCoreExtension.base,
1320 &driDRI2Extension.base,
1321 NULL
1322 };