i965: Drop global bufmgr lock from brw_bo_map_* functions.
[mesa.git] / src / mesa / drivers / dri / i965 / intel_screen.h
1 /*
2 * Copyright 2003 VMware, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial portions
15 * of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
18 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
21 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
22 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
23 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 */
25
26 #ifndef _INTEL_INIT_H_
27 #define _INTEL_INIT_H_
28
29 #include <stdbool.h>
30 #include <sys/time.h>
31
32 #include <GL/internal/dri_interface.h>
33
34 #include "isl/isl.h"
35 #include "dri_util.h"
36 #include "brw_bufmgr.h"
37 #include "common/gen_device_info.h"
38 #include "i915_drm.h"
39 #include "xmlconfig.h"
40
41 #ifdef __cplusplus
42 extern "C" {
43 #endif
44
45 struct intel_screen
46 {
47 int deviceID;
48 struct gen_device_info devinfo;
49
50 __DRIscreen *driScrnPriv;
51
52 uint64_t max_gtt_map_object_size;
53
54 /** Bytes of aperture usage beyond which execbuf is likely to fail. */
55 uint64_t aperture_threshold;
56
57 bool no_hw;
58 bool hw_has_swizzling;
59 bool has_exec_fence; /**< I915_PARAM_HAS_EXEC_FENCE */
60
61 int hw_has_timestamp;
62
63 /**
64 * Does the kernel support context reset notifications?
65 */
66 bool has_context_reset_notification;
67
68 /**
69 * Does the kernel support features such as pipelined register access to
70 * specific registers?
71 */
72 unsigned kernel_features;
73 #define KERNEL_ALLOWS_SOL_OFFSET_WRITES (1<<0)
74 #define KERNEL_ALLOWS_PREDICATE_WRITES (1<<1)
75 #define KERNEL_ALLOWS_MI_MATH_AND_LRR (1<<2)
76 #define KERNEL_ALLOWS_HSW_SCRATCH1_AND_ROW_CHICKEN3 (1<<3)
77 #define KERNEL_ALLOWS_COMPUTE_DISPATCH (1<<4)
78 #define KERNEL_ALLOWS_EXEC_CAPTURE (1<<5)
79
80 struct brw_bufmgr *bufmgr;
81
82 /**
83 * A unique ID for shader programs.
84 */
85 unsigned program_id;
86
87 int winsys_msaa_samples_override;
88
89 struct brw_compiler *compiler;
90
91 /**
92 * Configuration cache with default values for all contexts
93 */
94 driOptionCache optionCache;
95
96 /**
97 * Version of the command parser reported by the
98 * I915_PARAM_CMD_PARSER_VERSION parameter
99 */
100 int cmd_parser_version;
101
102 /**
103 * Number of subslices reported by the I915_PARAM_SUBSLICE_TOTAL parameter
104 */
105 int subslice_total;
106
107 /**
108 * Number of EUs reported by the I915_PARAM_EU_TOTAL parameter
109 */
110 int eu_total;
111
112 bool mesa_format_supports_texture[MESA_FORMAT_COUNT];
113 bool mesa_format_supports_render[MESA_FORMAT_COUNT];
114 enum isl_format mesa_to_isl_render_format[MESA_FORMAT_COUNT];
115 };
116
117 extern void intelDestroyContext(__DRIcontext * driContextPriv);
118
119 extern GLboolean intelUnbindContext(__DRIcontext * driContextPriv);
120
121 PUBLIC const __DRIextension **__driDriverGetExtensions_i965(void);
122 extern const __DRI2fenceExtension intelFenceExtension;
123
124 extern GLboolean
125 intelMakeCurrent(__DRIcontext * driContextPriv,
126 __DRIdrawable * driDrawPriv,
127 __DRIdrawable * driReadPriv);
128
129 double get_time(void);
130
131 const int*
132 intel_supported_msaa_modes(const struct intel_screen *screen);
133
134 static inline bool
135 can_do_pipelined_register_writes(const struct intel_screen *screen)
136 {
137 return screen->kernel_features & KERNEL_ALLOWS_SOL_OFFSET_WRITES;
138 }
139
140 static inline bool
141 can_do_hsw_l3_atomics(const struct intel_screen *screen)
142 {
143 return screen->kernel_features & KERNEL_ALLOWS_HSW_SCRATCH1_AND_ROW_CHICKEN3;
144 }
145
146 static inline bool
147 can_do_mi_math_and_lrr(const struct intel_screen *screen)
148 {
149 return screen->kernel_features & KERNEL_ALLOWS_MI_MATH_AND_LRR;
150 }
151
152 static inline bool
153 can_do_compute_dispatch(const struct intel_screen *screen)
154 {
155 return screen->kernel_features & KERNEL_ALLOWS_COMPUTE_DISPATCH;
156 }
157
158 static inline bool
159 can_do_predicate_writes(const struct intel_screen *screen)
160 {
161 return screen->kernel_features & KERNEL_ALLOWS_PREDICATE_WRITES;
162 }
163
164 static inline bool
165 can_do_exec_capture(const struct intel_screen *screen)
166 {
167 return screen->kernel_features & KERNEL_ALLOWS_EXEC_CAPTURE;
168 }
169
170 #ifdef __cplusplus
171 }
172 #endif
173
174 #endif