i965: Enable EGL_KHR_gl_texture_3D_image
[mesa.git] / src / mesa / drivers / dri / i965 / intel_syncobj.c
1 /*
2 * Copyright © 2008 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
27
28 /**
29 * \file
30 * \brief Support for GL_ARB_sync and EGL_KHR_fence_sync.
31 *
32 * GL_ARB_sync is implemented by flushing the current batchbuffer and keeping a
33 * reference on it. We can then check for completion or wait for completion
34 * using the normal buffer object mechanisms. This does mean that if an
35 * application is using many sync objects, it will emit small batchbuffers
36 * which may end up being a significant overhead. In other tests of removing
37 * gratuitous batchbuffer syncs in Mesa, it hasn't appeared to be a significant
38 * performance bottleneck, though.
39 */
40
41 #include "main/imports.h"
42
43 #include "brw_context.h"
44 #include "intel_batchbuffer.h"
45
46 struct brw_fence {
47 struct brw_context *brw;
48 /** The fence waits for completion of this batch. */
49 drm_intel_bo *batch_bo;
50
51 mtx_t mutex;
52 bool signalled;
53 };
54
55 struct intel_gl_sync_object {
56 struct gl_sync_object Base;
57 struct brw_fence fence;
58 };
59
60 static void
61 brw_fence_finish(struct brw_fence *fence)
62 {
63 if (fence->batch_bo)
64 drm_intel_bo_unreference(fence->batch_bo);
65 }
66
67 static void
68 brw_fence_insert(struct brw_context *brw, struct brw_fence *fence)
69 {
70 assert(!fence->batch_bo);
71 assert(!fence->signalled);
72
73 brw_emit_mi_flush(brw);
74 fence->batch_bo = brw->batch.bo;
75 drm_intel_bo_reference(fence->batch_bo);
76 intel_batchbuffer_flush(brw);
77 }
78
79 static bool
80 brw_fence_has_completed_locked(struct brw_fence *fence)
81 {
82 if (fence->signalled)
83 return true;
84
85 if (fence->batch_bo && !drm_intel_bo_busy(fence->batch_bo)) {
86 drm_intel_bo_unreference(fence->batch_bo);
87 fence->batch_bo = NULL;
88 fence->signalled = true;
89 return true;
90 }
91
92 return false;
93 }
94
95 static bool
96 brw_fence_has_completed(struct brw_fence *fence)
97 {
98 bool ret;
99
100 mtx_lock(&fence->mutex);
101 ret = brw_fence_has_completed_locked(fence);
102 mtx_unlock(&fence->mutex);
103
104 return ret;
105 }
106
107 static bool
108 brw_fence_client_wait_locked(struct brw_context *brw, struct brw_fence *fence,
109 uint64_t timeout)
110 {
111 if (fence->signalled)
112 return true;
113
114 assert(fence->batch_bo);
115
116 /* DRM_IOCTL_I915_GEM_WAIT uses a signed 64 bit timeout and returns
117 * immediately for timeouts <= 0. The best we can do is to clamp the
118 * timeout to INT64_MAX. This limits the maximum timeout from 584 years to
119 * 292 years - likely not a big deal.
120 */
121 if (timeout > INT64_MAX)
122 timeout = INT64_MAX;
123
124 if (drm_intel_gem_bo_wait(fence->batch_bo, timeout) != 0)
125 return false;
126
127 fence->signalled = true;
128 drm_intel_bo_unreference(fence->batch_bo);
129 fence->batch_bo = NULL;
130
131 return true;
132 }
133
134 /**
135 * Return true if the function successfully signals or has already signalled.
136 * (This matches the behavior expected from __DRI2fence::client_wait_sync).
137 */
138 static bool
139 brw_fence_client_wait(struct brw_context *brw, struct brw_fence *fence,
140 uint64_t timeout)
141 {
142 bool ret;
143
144 mtx_lock(&fence->mutex);
145 ret = brw_fence_client_wait_locked(brw, fence, timeout);
146 mtx_unlock(&fence->mutex);
147
148 return ret;
149 }
150
151 static void
152 brw_fence_server_wait(struct brw_context *brw, struct brw_fence *fence)
153 {
154 /* We have nothing to do for WaitSync. Our GL command stream is sequential,
155 * so given that the sync object has already flushed the batchbuffer, any
156 * batchbuffers coming after this waitsync will naturally not occur until
157 * the previous one is done.
158 */
159 }
160
161 static struct gl_sync_object *
162 intel_gl_new_sync_object(struct gl_context *ctx, GLuint id)
163 {
164 struct intel_gl_sync_object *sync;
165
166 sync = calloc(1, sizeof(*sync));
167 if (!sync)
168 return NULL;
169
170 return &sync->Base;
171 }
172
173 static void
174 intel_gl_delete_sync_object(struct gl_context *ctx, struct gl_sync_object *s)
175 {
176 struct intel_gl_sync_object *sync = (struct intel_gl_sync_object *)s;
177
178 brw_fence_finish(&sync->fence);
179 free(sync);
180 }
181
182 static void
183 intel_gl_fence_sync(struct gl_context *ctx, struct gl_sync_object *s,
184 GLenum condition, GLbitfield flags)
185 {
186 struct brw_context *brw = brw_context(ctx);
187 struct intel_gl_sync_object *sync = (struct intel_gl_sync_object *)s;
188
189 brw_fence_insert(brw, &sync->fence);
190 }
191
192 static void
193 intel_gl_client_wait_sync(struct gl_context *ctx, struct gl_sync_object *s,
194 GLbitfield flags, GLuint64 timeout)
195 {
196 struct brw_context *brw = brw_context(ctx);
197 struct intel_gl_sync_object *sync = (struct intel_gl_sync_object *)s;
198
199 if (brw_fence_client_wait(brw, &sync->fence, timeout))
200 s->StatusFlag = 1;
201 }
202
203 static void
204 intel_gl_server_wait_sync(struct gl_context *ctx, struct gl_sync_object *s,
205 GLbitfield flags, GLuint64 timeout)
206 {
207 struct brw_context *brw = brw_context(ctx);
208 struct intel_gl_sync_object *sync = (struct intel_gl_sync_object *)s;
209
210 brw_fence_server_wait(brw, &sync->fence);
211 }
212
213 static void
214 intel_gl_check_sync(struct gl_context *ctx, struct gl_sync_object *s)
215 {
216 struct intel_gl_sync_object *sync = (struct intel_gl_sync_object *)s;
217
218 if (brw_fence_has_completed(&sync->fence))
219 s->StatusFlag = 1;
220 }
221
222 void
223 intel_init_syncobj_functions(struct dd_function_table *functions)
224 {
225 functions->NewSyncObject = intel_gl_new_sync_object;
226 functions->DeleteSyncObject = intel_gl_delete_sync_object;
227 functions->FenceSync = intel_gl_fence_sync;
228 functions->CheckSync = intel_gl_check_sync;
229 functions->ClientWaitSync = intel_gl_client_wait_sync;
230 functions->ServerWaitSync = intel_gl_server_wait_sync;
231 }
232
233 static void *
234 intel_dri_create_fence(__DRIcontext *ctx)
235 {
236 struct brw_context *brw = ctx->driverPrivate;
237 struct brw_fence *fence;
238
239 fence = calloc(1, sizeof(*fence));
240 if (!fence)
241 return NULL;
242
243 mtx_init(&fence->mutex, mtx_plain);
244 fence->brw = brw;
245 brw_fence_insert(brw, fence);
246
247 return fence;
248 }
249
250 static void
251 intel_dri_destroy_fence(__DRIscreen *dri_screen, void *driver_fence)
252 {
253 struct brw_fence *fence = driver_fence;
254
255 brw_fence_finish(fence);
256 free(fence);
257 }
258
259 static GLboolean
260 intel_dri_client_wait_sync(__DRIcontext *ctx, void *driver_fence, unsigned flags,
261 uint64_t timeout)
262 {
263 struct brw_fence *fence = driver_fence;
264
265 return brw_fence_client_wait(fence->brw, fence, timeout);
266 }
267
268 static void
269 intel_dri_server_wait_sync(__DRIcontext *ctx, void *driver_fence, unsigned flags)
270 {
271 struct brw_fence *fence = driver_fence;
272
273 /* We might be called here with a NULL fence as a result of WaitSyncKHR
274 * on a EGL_KHR_reusable_sync fence. Nothing to do here in such case.
275 */
276 if (!fence)
277 return;
278
279 brw_fence_server_wait(fence->brw, fence);
280 }
281
282 const __DRI2fenceExtension intelFenceExtension = {
283 .base = { __DRI2_FENCE, 1 },
284
285 .create_fence = intel_dri_create_fence,
286 .destroy_fence = intel_dri_destroy_fence,
287 .client_wait_sync = intel_dri_client_wait_sync,
288 .server_wait_sync = intel_dri_server_wait_sync,
289 .get_fence_from_cl_event = NULL,
290 };