2 * Copyright © 2008 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Eric Anholt <eric@anholt.net>
30 * \brief Support for GL_ARB_sync and EGL_KHR_fence_sync.
32 * GL_ARB_sync is implemented by flushing the current batchbuffer and keeping a
33 * reference on it. We can then check for completion or wait for completion
34 * using the normal buffer object mechanisms. This does mean that if an
35 * application is using many sync objects, it will emit small batchbuffers
36 * which may end up being a significant overhead. In other tests of removing
37 * gratuitous batchbuffer syncs in Mesa, it hasn't appeared to be a significant
38 * performance bottleneck, though.
41 #include "main/imports.h"
43 #include "brw_context.h"
44 #include "intel_batchbuffer.h"
47 struct brw_context
*brw
;
48 /** The fence waits for completion of this batch. */
49 drm_intel_bo
*batch_bo
;
55 struct intel_gl_sync_object
{
56 struct gl_sync_object Base
;
57 struct brw_fence fence
;
61 brw_fence_finish(struct brw_fence
*fence
)
64 drm_intel_bo_unreference(fence
->batch_bo
);
68 brw_fence_insert(struct brw_context
*brw
, struct brw_fence
*fence
)
70 assert(!fence
->batch_bo
);
71 assert(!fence
->signalled
);
73 brw_emit_mi_flush(brw
);
74 fence
->batch_bo
= brw
->batch
.bo
;
75 drm_intel_bo_reference(fence
->batch_bo
);
76 intel_batchbuffer_flush(brw
);
80 brw_fence_has_completed_locked(struct brw_fence
*fence
)
85 if (fence
->batch_bo
&& !drm_intel_bo_busy(fence
->batch_bo
)) {
86 drm_intel_bo_unreference(fence
->batch_bo
);
87 fence
->batch_bo
= NULL
;
88 fence
->signalled
= true;
96 brw_fence_has_completed(struct brw_fence
*fence
)
100 mtx_lock(&fence
->mutex
);
101 ret
= brw_fence_has_completed_locked(fence
);
102 mtx_unlock(&fence
->mutex
);
108 brw_fence_client_wait_locked(struct brw_context
*brw
, struct brw_fence
*fence
,
111 if (fence
->signalled
)
114 assert(fence
->batch_bo
);
116 /* DRM_IOCTL_I915_GEM_WAIT uses a signed 64 bit timeout and returns
117 * immediately for timeouts <= 0. The best we can do is to clamp the
118 * timeout to INT64_MAX. This limits the maximum timeout from 584 years to
119 * 292 years - likely not a big deal.
121 if (timeout
> INT64_MAX
)
124 if (drm_intel_gem_bo_wait(fence
->batch_bo
, timeout
) != 0)
127 fence
->signalled
= true;
128 drm_intel_bo_unreference(fence
->batch_bo
);
129 fence
->batch_bo
= NULL
;
135 * Return true if the function successfully signals or has already signalled.
136 * (This matches the behavior expected from __DRI2fence::client_wait_sync).
139 brw_fence_client_wait(struct brw_context
*brw
, struct brw_fence
*fence
,
144 mtx_lock(&fence
->mutex
);
145 ret
= brw_fence_client_wait_locked(brw
, fence
, timeout
);
146 mtx_unlock(&fence
->mutex
);
152 brw_fence_server_wait(struct brw_context
*brw
, struct brw_fence
*fence
)
154 /* We have nothing to do for WaitSync. Our GL command stream is sequential,
155 * so given that the sync object has already flushed the batchbuffer, any
156 * batchbuffers coming after this waitsync will naturally not occur until
157 * the previous one is done.
161 static struct gl_sync_object
*
162 intel_gl_new_sync_object(struct gl_context
*ctx
, GLuint id
)
164 struct intel_gl_sync_object
*sync
;
166 sync
= calloc(1, sizeof(*sync
));
174 intel_gl_delete_sync_object(struct gl_context
*ctx
, struct gl_sync_object
*s
)
176 struct intel_gl_sync_object
*sync
= (struct intel_gl_sync_object
*)s
;
178 brw_fence_finish(&sync
->fence
);
183 intel_gl_fence_sync(struct gl_context
*ctx
, struct gl_sync_object
*s
,
184 GLenum condition
, GLbitfield flags
)
186 struct brw_context
*brw
= brw_context(ctx
);
187 struct intel_gl_sync_object
*sync
= (struct intel_gl_sync_object
*)s
;
189 brw_fence_insert(brw
, &sync
->fence
);
193 intel_gl_client_wait_sync(struct gl_context
*ctx
, struct gl_sync_object
*s
,
194 GLbitfield flags
, GLuint64 timeout
)
196 struct brw_context
*brw
= brw_context(ctx
);
197 struct intel_gl_sync_object
*sync
= (struct intel_gl_sync_object
*)s
;
199 if (brw_fence_client_wait(brw
, &sync
->fence
, timeout
))
204 intel_gl_server_wait_sync(struct gl_context
*ctx
, struct gl_sync_object
*s
,
205 GLbitfield flags
, GLuint64 timeout
)
207 struct brw_context
*brw
= brw_context(ctx
);
208 struct intel_gl_sync_object
*sync
= (struct intel_gl_sync_object
*)s
;
210 brw_fence_server_wait(brw
, &sync
->fence
);
214 intel_gl_check_sync(struct gl_context
*ctx
, struct gl_sync_object
*s
)
216 struct intel_gl_sync_object
*sync
= (struct intel_gl_sync_object
*)s
;
218 if (brw_fence_has_completed(&sync
->fence
))
223 intel_init_syncobj_functions(struct dd_function_table
*functions
)
225 functions
->NewSyncObject
= intel_gl_new_sync_object
;
226 functions
->DeleteSyncObject
= intel_gl_delete_sync_object
;
227 functions
->FenceSync
= intel_gl_fence_sync
;
228 functions
->CheckSync
= intel_gl_check_sync
;
229 functions
->ClientWaitSync
= intel_gl_client_wait_sync
;
230 functions
->ServerWaitSync
= intel_gl_server_wait_sync
;
234 intel_dri_create_fence(__DRIcontext
*ctx
)
236 struct brw_context
*brw
= ctx
->driverPrivate
;
237 struct brw_fence
*fence
;
239 fence
= calloc(1, sizeof(*fence
));
243 mtx_init(&fence
->mutex
, mtx_plain
);
245 brw_fence_insert(brw
, fence
);
251 intel_dri_destroy_fence(__DRIscreen
*dri_screen
, void *driver_fence
)
253 struct brw_fence
*fence
= driver_fence
;
255 brw_fence_finish(fence
);
260 intel_dri_client_wait_sync(__DRIcontext
*ctx
, void *driver_fence
, unsigned flags
,
263 struct brw_fence
*fence
= driver_fence
;
265 return brw_fence_client_wait(fence
->brw
, fence
, timeout
);
269 intel_dri_server_wait_sync(__DRIcontext
*ctx
, void *driver_fence
, unsigned flags
)
271 struct brw_fence
*fence
= driver_fence
;
273 /* We might be called here with a NULL fence as a result of WaitSyncKHR
274 * on a EGL_KHR_reusable_sync fence. Nothing to do here in such case.
279 brw_fence_server_wait(fence
->brw
, fence
);
282 const __DRI2fenceExtension intelFenceExtension
= {
283 .base
= { __DRI2_FENCE
, 1 },
285 .create_fence
= intel_dri_create_fence
,
286 .destroy_fence
= intel_dri_destroy_fence
,
287 .client_wait_sync
= intel_dri_client_wait_sync
,
288 .server_wait_sync
= intel_dri_server_wait_sync
,
289 .get_fence_from_cl_event
= NULL
,