i965/fs: Handle CMP.nz ... 0 and AND.nz ... 1 similarly in cmod propagation
[mesa.git] / src / mesa / drivers / dri / i965 / intel_syncobj.c
1 /*
2 * Copyright © 2008 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
27
28 /** @file intel_syncobj.c
29 *
30 * Support for ARB_sync
31 *
32 * ARB_sync is implemented by flushing the current batchbuffer and keeping a
33 * reference on it. We can then check for completion or wait for completion
34 * using the normal buffer object mechanisms. This does mean that if an
35 * application is using many sync objects, it will emit small batchbuffers
36 * which may end up being a significant overhead. In other tests of removing
37 * gratuitous batchbuffer syncs in Mesa, it hasn't appeared to be a significant
38 * performance bottleneck, though.
39 */
40
41 #include "main/imports.h"
42
43 #include "brw_context.h"
44 #include "intel_batchbuffer.h"
45 #include "intel_reg.h"
46
47 static struct gl_sync_object *
48 intel_new_sync_object(struct gl_context *ctx, GLuint id)
49 {
50 struct intel_sync_object *sync;
51
52 sync = calloc(1, sizeof(struct intel_sync_object));
53
54 return &sync->Base;
55 }
56
57 static void
58 intel_delete_sync_object(struct gl_context *ctx, struct gl_sync_object *s)
59 {
60 struct intel_sync_object *sync = (struct intel_sync_object *)s;
61
62 drm_intel_bo_unreference(sync->bo);
63 free(sync);
64 }
65
66 static void
67 intel_fence_sync(struct gl_context *ctx, struct gl_sync_object *s,
68 GLenum condition, GLbitfield flags)
69 {
70 struct brw_context *brw = brw_context(ctx);
71 struct intel_sync_object *sync = (struct intel_sync_object *)s;
72
73 assert(condition == GL_SYNC_GPU_COMMANDS_COMPLETE);
74 intel_batchbuffer_emit_mi_flush(brw);
75
76 sync->bo = brw->batch.bo;
77 drm_intel_bo_reference(sync->bo);
78
79 intel_batchbuffer_flush(brw);
80 }
81
82 static void intel_client_wait_sync(struct gl_context *ctx, struct gl_sync_object *s,
83 GLbitfield flags, GLuint64 timeout)
84 {
85 struct intel_sync_object *sync = (struct intel_sync_object *)s;
86
87 /* DRM_IOCTL_I915_GEM_WAIT uses a signed 64 bit timeout and returns
88 * immediately for timeouts <= 0. The best we can do is to clamp the
89 * timeout to INT64_MAX. This limits the maximum timeout from 584 years to
90 * 292 years - likely not a big deal.
91 */
92 if (timeout > INT64_MAX)
93 timeout = INT64_MAX;
94
95 if (sync->bo && drm_intel_gem_bo_wait(sync->bo, timeout) == 0) {
96 s->StatusFlag = 1;
97 drm_intel_bo_unreference(sync->bo);
98 sync->bo = NULL;
99 }
100 }
101
102 /* We have nothing to do for WaitSync. Our GL command stream is sequential,
103 * so given that the sync object has already flushed the batchbuffer,
104 * any batchbuffers coming after this waitsync will naturally not occur until
105 * the previous one is done.
106 */
107 static void intel_server_wait_sync(struct gl_context *ctx, struct gl_sync_object *s,
108 GLbitfield flags, GLuint64 timeout)
109 {
110 }
111
112 static void intel_check_sync(struct gl_context *ctx, struct gl_sync_object *s)
113 {
114 struct intel_sync_object *sync = (struct intel_sync_object *)s;
115
116 if (sync->bo && !drm_intel_bo_busy(sync->bo)) {
117 drm_intel_bo_unreference(sync->bo);
118 sync->bo = NULL;
119 s->StatusFlag = 1;
120 }
121 }
122
123 void intel_init_syncobj_functions(struct dd_function_table *functions)
124 {
125 functions->NewSyncObject = intel_new_sync_object;
126 functions->DeleteSyncObject = intel_delete_sync_object;
127 functions->FenceSync = intel_fence_sync;
128 functions->CheckSync = intel_check_sync;
129 functions->ClientWaitSync = intel_client_wait_sync;
130 functions->ServerWaitSync = intel_server_wait_sync;
131 }