i965: Print more debuginfo in intel_texsubimage_memcpy()
[mesa.git] / src / mesa / drivers / dri / i965 / intel_tex_subimage.c
1
2 /**************************************************************************
3 *
4 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
5 * All Rights Reserved.
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the
9 * "Software"), to deal in the Software without restriction, including
10 * without limitation the rights to use, copy, modify, merge, publish,
11 * distribute, sub license, and/or sell copies of the Software, and to
12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial portions
17 * of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
23 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 *
27 **************************************************************************/
28
29 #include "main/bufferobj.h"
30 #include "main/image.h"
31 #include "main/macros.h"
32 #include "main/mtypes.h"
33 #include "main/pbo.h"
34 #include "main/texobj.h"
35 #include "main/texstore.h"
36 #include "main/texcompress.h"
37 #include "main/enums.h"
38
39 #include "brw_context.h"
40 #include "intel_batchbuffer.h"
41 #include "intel_tex.h"
42 #include "intel_mipmap_tree.h"
43 #include "intel_blit.h"
44
45 #define FILE_DEBUG_FLAG DEBUG_TEXTURE
46
47 #define ALIGN_DOWN(a, b) ROUND_DOWN_TO(a, b)
48 #define ALIGN_UP(a, b) ALIGN(a, b)
49
50 /* Tile dimensions.
51 * Width and span are in bytes, height is in pixels (i.e. unitless).
52 * A "span" is the most number of bytes we can copy from linear to tiled
53 * without needing to calculate a new destination address.
54 */
55 static const uint32_t xtile_width = 512;
56 static const uint32_t xtile_height = 8;
57 static const uint32_t xtile_span = 64;
58 static const uint32_t ytile_width = 128;
59 static const uint32_t ytile_height = 32;
60 static const uint32_t ytile_span = 16;
61
62 typedef void *(*mem_copy_fn)(void *dest, const void *src, size_t n);
63
64 /**
65 * Each row from y0 to y1 is copied in three parts: [x0,x1), [x1,x2), [x2,x3).
66 * These ranges are in bytes, i.e. pixels * bytes-per-pixel.
67 * The first and last ranges must be shorter than a "span" (the longest linear
68 * stretch within a tile) and the middle must equal a whole number of spans.
69 * Ranges may be empty. The region copied must land entirely within one tile.
70 * 'dst' is the start of the tile and 'src' is the corresponding
71 * address to copy from, though copying begins at (x0, y0).
72 * To enable swizzling 'swizzle_bit' must be 1<<6, otherwise zero.
73 * Swizzling flips bit 6 in the copy destination offset, when certain other
74 * bits are set in it.
75 */
76 typedef void (*tile_copy_fn)(uint32_t x0, uint32_t x1, uint32_t x2, uint32_t x3,
77 uint32_t y0, uint32_t y1,
78 char *dst, const char *src,
79 uint32_t src_pitch,
80 uint32_t swizzle_bit,
81 mem_copy_fn mem_copy);
82
83
84 static bool
85 intel_blit_texsubimage(struct gl_context * ctx,
86 struct gl_texture_image *texImage,
87 GLint xoffset, GLint yoffset,
88 GLint width, GLint height,
89 GLenum format, GLenum type, const void *pixels,
90 const struct gl_pixelstore_attrib *packing)
91 {
92 struct brw_context *brw = brw_context(ctx);
93 struct intel_texture_image *intelImage = intel_texture_image(texImage);
94
95 /* Try to do a blit upload of the subimage if the texture is
96 * currently busy.
97 */
98 if (!intelImage->mt)
99 return false;
100
101 /* The blitter can't handle Y tiling */
102 if (intelImage->mt->region->tiling == I915_TILING_Y)
103 return false;
104
105 if (texImage->TexObject->Target != GL_TEXTURE_2D)
106 return false;
107
108 /* On gen6, it's probably not worth swapping to the blit ring to do
109 * this because of all the overhead involved.
110 */
111 if (brw->gen >= 6)
112 return false;
113
114 if (!drm_intel_bo_busy(intelImage->mt->region->bo))
115 return false;
116
117 DBG("BLT subimage %s target %s level %d offset %d,%d %dx%d\n",
118 __FUNCTION__,
119 _mesa_lookup_enum_by_nr(texImage->TexObject->Target),
120 texImage->Level, xoffset, yoffset, width, height);
121
122 pixels = _mesa_validate_pbo_teximage(ctx, 2, width, height, 1,
123 format, type, pixels, packing,
124 "glTexSubImage");
125 if (!pixels)
126 return false;
127
128 struct intel_mipmap_tree *temp_mt =
129 intel_miptree_create(brw, GL_TEXTURE_2D, texImage->TexFormat,
130 0, 0,
131 width, height, 1,
132 false, 0, INTEL_MIPTREE_TILING_NONE);
133 if (!temp_mt)
134 goto err;
135
136 GLubyte *dst = intel_miptree_map_raw(brw, temp_mt);
137 if (!dst)
138 goto err;
139
140 if (!_mesa_texstore(ctx, 2, texImage->_BaseFormat,
141 texImage->TexFormat,
142 temp_mt->region->pitch,
143 &dst,
144 width, height, 1,
145 format, type, pixels, packing)) {
146 _mesa_error(ctx, GL_OUT_OF_MEMORY, "intelTexSubImage");
147 }
148
149 intel_miptree_unmap_raw(brw, temp_mt);
150
151 bool ret;
152
153 ret = intel_miptree_blit(brw,
154 temp_mt, 0, 0,
155 0, 0, false,
156 intelImage->mt, texImage->Level, texImage->Face,
157 xoffset, yoffset, false,
158 width, height, GL_COPY);
159 assert(ret);
160
161 intel_miptree_release(&temp_mt);
162 _mesa_unmap_teximage_pbo(ctx, packing);
163
164 return ret;
165
166 err:
167 _mesa_error(ctx, GL_OUT_OF_MEMORY, "intelTexSubImage");
168 intel_miptree_release(&temp_mt);
169 _mesa_unmap_teximage_pbo(ctx, packing);
170 return false;
171 }
172
173 #ifdef __SSSE3__
174 static const uint8_t rgba8_permutation[16] =
175 { 2,1,0,3, 6,5,4,7, 10,9,8,11, 14,13,12,15 };
176
177 typedef char v16 __attribute__((vector_size(16)));
178
179 /* NOTE: dst must be 16 byte aligned */
180 #define rgba8_copy_16(dst, src) \
181 *(v16*)(dst) = __builtin_ia32_pshufb128( \
182 (v16) __builtin_ia32_loadups((float*)(src)), \
183 *(v16*) rgba8_permutation \
184 )
185 #endif
186
187 /**
188 * Copy RGBA to BGRA - swap R and B.
189 */
190 static inline void *
191 rgba8_copy(void *dst, const void *src, size_t bytes)
192 {
193 uint8_t *d = dst;
194 uint8_t const *s = src;
195
196 #ifdef __SSSE3__
197 /* Fast copying for tile spans.
198 *
199 * As long as the destination texture is 16 aligned,
200 * any 16 or 64 spans we get here should also be 16 aligned.
201 */
202
203 if (bytes == 16) {
204 assert(!(((uintptr_t)dst) & 0xf));
205 rgba8_copy_16(d+ 0, s+ 0);
206 return dst;
207 }
208
209 if (bytes == 64) {
210 assert(!(((uintptr_t)dst) & 0xf));
211 rgba8_copy_16(d+ 0, s+ 0);
212 rgba8_copy_16(d+16, s+16);
213 rgba8_copy_16(d+32, s+32);
214 rgba8_copy_16(d+48, s+48);
215 return dst;
216 }
217 #endif
218
219 while (bytes >= 4) {
220 d[0] = s[2];
221 d[1] = s[1];
222 d[2] = s[0];
223 d[3] = s[3];
224 d += 4;
225 s += 4;
226 bytes -= 4;
227 }
228 return dst;
229 }
230
231 /**
232 * Copy texture data from linear to X tile layout.
233 *
234 * \copydoc tile_copy_fn
235 */
236 static inline void
237 xtile_copy(uint32_t x0, uint32_t x1, uint32_t x2, uint32_t x3,
238 uint32_t y0, uint32_t y1,
239 char *dst, const char *src,
240 uint32_t src_pitch,
241 uint32_t swizzle_bit,
242 mem_copy_fn mem_copy)
243 {
244 /* The copy destination offset for each range copied is the sum of
245 * an X offset 'x0' or 'xo' and a Y offset 'yo.'
246 */
247 uint32_t xo, yo;
248
249 src += y0 * src_pitch;
250
251 for (yo = y0 * xtile_width; yo < y1 * xtile_width; yo += xtile_width) {
252 /* Bits 9 and 10 of the copy destination offset control swizzling.
253 * Only 'yo' contributes to those bits in the total offset,
254 * so calculate 'swizzle' just once per row.
255 * Move bits 9 and 10 three and four places respectively down
256 * to bit 6 and xor them.
257 */
258 uint32_t swizzle = ((yo >> 3) ^ (yo >> 4)) & swizzle_bit;
259
260 mem_copy(dst + ((x0 + yo) ^ swizzle), src + x0, x1 - x0);
261
262 for (xo = x1; xo < x2; xo += xtile_span) {
263 mem_copy(dst + ((xo + yo) ^ swizzle), src + xo, xtile_span);
264 }
265
266 mem_copy(dst + ((xo + yo) ^ swizzle), src + x2, x3 - x2);
267
268 src += src_pitch;
269 }
270 }
271
272 /**
273 * Copy texture data from linear to Y tile layout.
274 *
275 * \copydoc tile_copy_fn
276 */
277 static inline void
278 ytile_copy(
279 uint32_t x0, uint32_t x1, uint32_t x2, uint32_t x3,
280 uint32_t y0, uint32_t y1,
281 char *dst, const char *src,
282 uint32_t src_pitch,
283 uint32_t swizzle_bit,
284 mem_copy_fn mem_copy)
285 {
286 /* Y tiles consist of columns that are 'ytile_span' wide (and the same height
287 * as the tile). Thus the destination offset for (x,y) is the sum of:
288 * (x % column_width) // position within column
289 * (x / column_width) * bytes_per_column // column number * bytes per column
290 * y * column_width
291 *
292 * The copy destination offset for each range copied is the sum of
293 * an X offset 'xo0' or 'xo' and a Y offset 'yo.'
294 */
295 const uint32_t column_width = ytile_span;
296 const uint32_t bytes_per_column = column_width * ytile_height;
297
298 uint32_t xo0 = (x0 % ytile_span) + (x0 / ytile_span) * bytes_per_column;
299 uint32_t xo1 = (x1 % ytile_span) + (x1 / ytile_span) * bytes_per_column;
300
301 /* Bit 9 of the destination offset control swizzling.
302 * Only the X offset contributes to bit 9 of the total offset,
303 * so swizzle can be calculated in advance for these X positions.
304 * Move bit 9 three places down to bit 6.
305 */
306 uint32_t swizzle0 = (xo0 >> 3) & swizzle_bit;
307 uint32_t swizzle1 = (xo1 >> 3) & swizzle_bit;
308
309 uint32_t x, yo;
310
311 src += y0 * src_pitch;
312
313 for (yo = y0 * column_width; yo < y1 * column_width; yo += column_width) {
314 uint32_t xo = xo1;
315 uint32_t swizzle = swizzle1;
316
317 mem_copy(dst + ((xo0 + yo) ^ swizzle0), src + x0, x1 - x0);
318
319 /* Step by spans/columns. As it happens, the swizzle bit flips
320 * at each step so we don't need to calculate it explicitly.
321 */
322 for (x = x1; x < x2; x += ytile_span) {
323 mem_copy(dst + ((xo + yo) ^ swizzle), src + x, ytile_span);
324 xo += bytes_per_column;
325 swizzle ^= swizzle_bit;
326 }
327
328 mem_copy(dst + ((xo + yo) ^ swizzle), src + x2, x3 - x2);
329
330 src += src_pitch;
331 }
332 }
333
334 /**
335 * Copy texture data from linear to X tile layout, faster.
336 *
337 * Same as \ref xtile_copy but faster, because it passes constant parameters
338 * for common cases, allowing the compiler to inline code optimized for those
339 * cases.
340 *
341 * \copydoc tile_copy_fn
342 */
343 static void
344 xtile_copy_faster(uint32_t x0, uint32_t x1, uint32_t x2, uint32_t x3,
345 uint32_t y0, uint32_t y1,
346 char *dst, const char *src,
347 uint32_t src_pitch,
348 uint32_t swizzle_bit,
349 mem_copy_fn mem_copy)
350 {
351 if (x0 == 0 && x3 == xtile_width && y0 == 0 && y1 == xtile_height) {
352 if (mem_copy == memcpy)
353 return xtile_copy(0, 0, xtile_width, xtile_width, 0, xtile_height,
354 dst, src, src_pitch, swizzle_bit, memcpy);
355 else if (mem_copy == rgba8_copy)
356 return xtile_copy(0, 0, xtile_width, xtile_width, 0, xtile_height,
357 dst, src, src_pitch, swizzle_bit, rgba8_copy);
358 } else {
359 if (mem_copy == memcpy)
360 return xtile_copy(x0, x1, x2, x3, y0, y1,
361 dst, src, src_pitch, swizzle_bit, memcpy);
362 else if (mem_copy == rgba8_copy)
363 return xtile_copy(x0, x1, x2, x3, y0, y1,
364 dst, src, src_pitch, swizzle_bit, rgba8_copy);
365 }
366 xtile_copy(x0, x1, x2, x3, y0, y1,
367 dst, src, src_pitch, swizzle_bit, mem_copy);
368 }
369
370 /**
371 * Copy texture data from linear to Y tile layout, faster.
372 *
373 * Same as \ref ytile_copy but faster, because it passes constant parameters
374 * for common cases, allowing the compiler to inline code optimized for those
375 * cases.
376 *
377 * \copydoc tile_copy_fn
378 */
379 static void
380 ytile_copy_faster(uint32_t x0, uint32_t x1, uint32_t x2, uint32_t x3,
381 uint32_t y0, uint32_t y1,
382 char *dst, const char *src,
383 uint32_t src_pitch,
384 uint32_t swizzle_bit,
385 mem_copy_fn mem_copy)
386 {
387 if (x0 == 0 && x3 == ytile_width && y0 == 0 && y1 == ytile_height) {
388 if (mem_copy == memcpy)
389 return ytile_copy(0, 0, ytile_width, ytile_width, 0, ytile_height,
390 dst, src, src_pitch, swizzle_bit, memcpy);
391 else if (mem_copy == rgba8_copy)
392 return ytile_copy(0, 0, ytile_width, ytile_width, 0, ytile_height,
393 dst, src, src_pitch, swizzle_bit, rgba8_copy);
394 } else {
395 if (mem_copy == memcpy)
396 return ytile_copy(x0, x1, x2, x3, y0, y1,
397 dst, src, src_pitch, swizzle_bit, memcpy);
398 else if (mem_copy == rgba8_copy)
399 return ytile_copy(x0, x1, x2, x3, y0, y1,
400 dst, src, src_pitch, swizzle_bit, rgba8_copy);
401 }
402 ytile_copy(x0, x1, x2, x3, y0, y1,
403 dst, src, src_pitch, swizzle_bit, mem_copy);
404 }
405
406 /**
407 * Copy from linear to tiled texture.
408 *
409 * Divide the region given by X range [xt1, xt2) and Y range [yt1, yt2) into
410 * pieces that do not cross tile boundaries and copy each piece with a tile
411 * copy function (\ref tile_copy_fn).
412 * The X range is in bytes, i.e. pixels * bytes-per-pixel.
413 * The Y range is in pixels (i.e. unitless).
414 * 'dst' is the start of the texture and 'src' is the corresponding
415 * address to copy from, though copying begins at (xt1, yt1).
416 */
417 static void
418 linear_to_tiled(uint32_t xt1, uint32_t xt2,
419 uint32_t yt1, uint32_t yt2,
420 char *dst, const char *src,
421 uint32_t dst_pitch, uint32_t src_pitch,
422 bool has_swizzling,
423 uint32_t tiling,
424 mem_copy_fn mem_copy)
425 {
426 tile_copy_fn tile_copy;
427 uint32_t xt0, xt3;
428 uint32_t yt0, yt3;
429 uint32_t xt, yt;
430 uint32_t tw, th, span;
431 uint32_t swizzle_bit = has_swizzling ? 1<<6 : 0;
432
433 if (tiling == I915_TILING_X) {
434 tw = xtile_width;
435 th = xtile_height;
436 span = xtile_span;
437 tile_copy = xtile_copy_faster;
438 } else if (tiling == I915_TILING_Y) {
439 tw = ytile_width;
440 th = ytile_height;
441 span = ytile_span;
442 tile_copy = ytile_copy_faster;
443 } else {
444 assert(!"unsupported tiling");
445 return;
446 }
447
448 /* Round out to tile boundaries. */
449 xt0 = ALIGN_DOWN(xt1, tw);
450 xt3 = ALIGN_UP (xt2, tw);
451 yt0 = ALIGN_DOWN(yt1, th);
452 yt3 = ALIGN_UP (yt2, th);
453
454 /* Loop over all tiles to which we have something to copy.
455 * 'xt' and 'yt' are the origin of the destination tile, whether copying
456 * copying a full or partial tile.
457 * tile_copy() copies one tile or partial tile.
458 * Looping x inside y is the faster memory access pattern.
459 */
460 for (yt = yt0; yt < yt3; yt += th) {
461 for (xt = xt0; xt < xt3; xt += tw) {
462 /* The area to update is [x0,x3) x [y0,y1).
463 * May not want the whole tile, hence the min and max.
464 */
465 uint32_t x0 = MAX2(xt1, xt);
466 uint32_t y0 = MAX2(yt1, yt);
467 uint32_t x3 = MIN2(xt2, xt + tw);
468 uint32_t y1 = MIN2(yt2, yt + th);
469
470 /* [x0,x3) is split into [x0,x1), [x1,x2), [x2,x3) such that
471 * the middle interval is the longest span-aligned part.
472 * The sub-ranges could be empty.
473 */
474 uint32_t x1, x2;
475 x1 = ALIGN_UP(x0, span);
476 if (x1 > x3)
477 x1 = x2 = x3;
478 else
479 x2 = ALIGN_DOWN(x3, span);
480
481 assert(x0 <= x1 && x1 <= x2 && x2 <= x3);
482 assert(x1 - x0 < span && x3 - x2 < span);
483 assert(x3 - x0 <= tw);
484 assert((x2 - x1) % span == 0);
485
486 /* Translate by (xt,yt) for single-tile copier. */
487 tile_copy(x0-xt, x1-xt, x2-xt, x3-xt,
488 y0-yt, y1-yt,
489 dst + xt * th + yt * dst_pitch,
490 src + xt + yt * src_pitch,
491 src_pitch,
492 swizzle_bit,
493 mem_copy);
494 }
495 }
496 }
497
498 /**
499 * \brief A fast path for glTexImage and glTexSubImage.
500 *
501 * \param for_glTexImage Was this called from glTexImage or glTexSubImage?
502 *
503 * This fast path is taken when the texture format is BGRA, RGBA,
504 * A or L and when the texture memory is X- or Y-tiled. It uploads
505 * the texture data by mapping the texture memory without a GTT fence, thus
506 * acquiring a tiled view of the memory, and then copying sucessive
507 * spans within each tile.
508 *
509 * This is a performance win over the conventional texture upload path because
510 * it avoids the performance penalty of writing through the write-combine
511 * buffer. In the conventional texture upload path,
512 * texstore.c:store_texsubimage(), the texture memory is mapped through a GTT
513 * fence, thus acquiring a linear view of the memory, then each row in the
514 * image is memcpy'd. In this fast path, we replace each row's copy with
515 * a sequence of copies over each linear span in tile.
516 *
517 * One use case is Google Chrome's paint rectangles. Chrome (as
518 * of version 21) renders each page as a tiling of 256x256 GL_BGRA textures.
519 * Each page's content is initially uploaded with glTexImage2D and damaged
520 * regions are updated with glTexSubImage2D. On some workloads, the
521 * performance gain of this fastpath on Sandybridge is over 5x.
522 */
523 bool
524 intel_texsubimage_tiled_memcpy(struct gl_context * ctx,
525 GLuint dims,
526 struct gl_texture_image *texImage,
527 GLint xoffset, GLint yoffset, GLint zoffset,
528 GLsizei width, GLsizei height, GLsizei depth,
529 GLenum format, GLenum type,
530 const GLvoid *pixels,
531 const struct gl_pixelstore_attrib *packing,
532 bool for_glTexImage)
533 {
534 struct brw_context *brw = brw_context(ctx);
535 struct intel_texture_image *image = intel_texture_image(texImage);
536 int src_pitch;
537
538 /* The miptree's buffer. */
539 drm_intel_bo *bo;
540
541 int error = 0;
542
543 uint32_t cpp;
544 mem_copy_fn mem_copy = NULL;
545
546 /* This fastpath is restricted to specific texture types: level 0 of
547 * a 2D BGRA, RGBA, L8 or A8 texture. It could be generalized to support
548 * more types.
549 *
550 * FINISHME: The restrictions below on packing alignment and packing row
551 * length are likely unneeded now because we calculate the source stride
552 * with _mesa_image_row_stride. However, before removing the restrictions
553 * we need tests.
554 */
555 if (!brw->has_llc ||
556 type != GL_UNSIGNED_BYTE ||
557 texImage->TexObject->Target != GL_TEXTURE_2D ||
558 texImage->Level != 0 ||
559 pixels == NULL ||
560 _mesa_is_bufferobj(packing->BufferObj) ||
561 packing->Alignment > 4 ||
562 packing->SkipPixels > 0 ||
563 packing->SkipRows > 0 ||
564 (packing->RowLength != 0 && packing->RowLength != width) ||
565 packing->SwapBytes ||
566 packing->LsbFirst ||
567 packing->Invert)
568 return false;
569
570 if ((texImage->TexFormat == MESA_FORMAT_L8 && format == GL_LUMINANCE) ||
571 (texImage->TexFormat == MESA_FORMAT_A8 && format == GL_ALPHA)) {
572 cpp = 1;
573 mem_copy = memcpy;
574 } else if (texImage->TexFormat == MESA_FORMAT_ARGB8888) {
575 cpp = 4;
576 if (format == GL_BGRA) {
577 mem_copy = memcpy;
578 } else if (format == GL_RGBA) {
579 mem_copy = rgba8_copy;
580 }
581 }
582 if (!mem_copy)
583 return false;
584
585 if (for_glTexImage)
586 ctx->Driver.AllocTextureImageBuffer(ctx, texImage);
587
588 if (!image->mt ||
589 (image->mt->region->tiling != I915_TILING_X &&
590 image->mt->region->tiling != I915_TILING_Y)) {
591 /* The algorithm is written only for X- or Y-tiled memory. */
592 return false;
593 }
594
595 /* Since we are going to write raw data to the miptree, we need to resolve
596 * any pending fast color clears before we start.
597 */
598 intel_miptree_resolve_color(brw, image->mt);
599
600 bo = image->mt->region->bo;
601
602 if (drm_intel_bo_references(brw->batch.bo, bo)) {
603 perf_debug("Flushing before mapping a referenced bo.\n");
604 intel_batchbuffer_flush(brw);
605 }
606
607 if (unlikely(brw->perf_debug)) {
608 if (drm_intel_bo_busy(bo)) {
609 perf_debug("Mapping a busy BO, causing a stall on the GPU.\n");
610 }
611 }
612
613 error = drm_intel_bo_map(bo, true /*write_enable*/);
614 if (error || bo->virtual == NULL) {
615 DBG("%s: failed to map bo\n", __FUNCTION__);
616 return false;
617 }
618
619 src_pitch = _mesa_image_row_stride(packing, width, format, type);
620
621 /* We postponed printing this message until having committed to executing
622 * the function.
623 */
624 DBG("%s: level=%d offset=(%d,%d) (w,h)=(%d,%d) format=0x%x type=0x%x "
625 "gl_format=0x%x tiling=%d "
626 "packing=(alignment=%d row_length=%d skip_pixels=%d skip_rows=%d) "
627 "for_glTexImage=%d\n",
628 __FUNCTION__, texImage->Level, xoffset, yoffset, width, height,
629 format, type, texImage->TexFormat, image->mt->region->tiling,
630 packing->Alignment, packing->RowLength, packing->SkipPixels,
631 packing->SkipRows, for_glTexImage);
632
633 linear_to_tiled(
634 xoffset * cpp, (xoffset + width) * cpp,
635 yoffset, yoffset + height,
636 bo->virtual, pixels - yoffset * src_pitch - xoffset * cpp,
637 image->mt->region->pitch, src_pitch,
638 brw->has_swizzling,
639 image->mt->region->tiling,
640 mem_copy
641 );
642
643 drm_intel_bo_unmap(bo);
644 return true;
645 }
646
647 static void
648 intelTexSubImage(struct gl_context * ctx,
649 GLuint dims,
650 struct gl_texture_image *texImage,
651 GLint xoffset, GLint yoffset, GLint zoffset,
652 GLsizei width, GLsizei height, GLsizei depth,
653 GLenum format, GLenum type,
654 const GLvoid * pixels,
655 const struct gl_pixelstore_attrib *packing)
656 {
657 bool ok;
658
659 ok = intel_texsubimage_tiled_memcpy(ctx, dims, texImage,
660 xoffset, yoffset, zoffset,
661 width, height, depth,
662 format, type, pixels, packing,
663 false /*for_glTexImage*/);
664 if (ok)
665 return;
666
667 /* The intel_blit_texsubimage() function only handles 2D images */
668 if (dims != 2 || !intel_blit_texsubimage(ctx, texImage,
669 xoffset, yoffset,
670 width, height,
671 format, type, pixels, packing)) {
672 _mesa_store_texsubimage(ctx, dims, texImage,
673 xoffset, yoffset, zoffset,
674 width, height, depth,
675 format, type, pixels, packing);
676 }
677 }
678
679 void
680 intelInitTextureSubImageFuncs(struct dd_function_table *functions)
681 {
682 functions->TexSubImage = intelTexSubImage;
683 }